[llvm] 96ab8ef - [X86][test] Merge the decoding tests for avx512_bf16_vl and unify the names
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 13 01:13:58 PST 2023
Author: Shengchen Kan
Date: 2023-12-13T17:13:23+08:00
New Revision: 96ab8ef999188e26c5d79521872826a199ee33ac
URL: https://github.com/llvm/llvm-project/commit/96ab8ef999188e26c5d79521872826a199ee33ac
DIFF: https://github.com/llvm/llvm-project/commit/96ab8ef999188e26c5d79521872826a199ee33ac.diff
LOG: [X86][test] Merge the decoding tests for avx512_bf16_vl and unify the names
Added:
llvm/test/MC/Disassembler/avx512_bf16_vl-32.txt
llvm/test/MC/Disassembler/avx512_bf16_vl-64.txt
llvm/test/MC/X86/avx512_bf16_vl-32-att.s
llvm/test/MC/X86/avx512_bf16_vl-32-intel.s
llvm/test/MC/X86/avx512_bf16_vl-64-att.s
llvm/test/MC/X86/avx512_bf16_vl-64-intel.s
Modified:
Removed:
llvm/test/MC/Disassembler/X86/avx512bf16vl-att.txt
llvm/test/MC/Disassembler/X86/avx512bf16vl-intel.txt
llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
llvm/test/MC/X86/avx512_bf16_vl-encoding.s
llvm/test/MC/X86/intel-syntax-avx512_bf16_vl.s
llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s
llvm/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s
################################################################################
diff --git a/llvm/test/MC/Disassembler/X86/avx512bf16vl-att.txt b/llvm/test/MC/Disassembler/X86/avx512bf16vl-att.txt
deleted file mode 100644
index ea5e84ffab46c3..00000000000000
--- a/llvm/test/MC/Disassembler/X86/avx512bf16vl-att.txt
+++ /dev/null
@@ -1,157 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2
-0x62,0xf2,0x67,0x28,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2 {%k7}
-0x62,0xf2,0x67,0x2f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x67,0xaf,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2
-0x62,0xf2,0x67,0x08,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2 {%k7}
-0x62,0xf2,0x67,0x0f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x67,0x8f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %ymm3, %ymm2
-0x62,0xf2,0x67,0x28,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
-0x62,0xf2,0x67,0x2f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 (%eax){1to8}, %ymm3, %ymm2
-0x62,0xf2,0x67,0x38,0x72,0x10
-
-# CHECK: vcvtne2ps2bf16 -1024(,%ebp,2), %ymm3, %ymm2
-0x62,0xf2,0x67,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x67,0xaf,0x72,0x51,0x7f
-
-# CHECK: vcvtne2ps2bf16 -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x67,0xbf,0x72,0x52,0x80
-
-# CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %xmm3, %xmm2
-0x62,0xf2,0x67,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
-0x62,0xf2,0x67,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 (%eax){1to4}, %xmm3, %xmm2
-0x62,0xf2,0x67,0x18,0x72,0x10
-
-# CHECK: vcvtne2ps2bf16 -512(,%ebp,2), %xmm3, %xmm2
-0x62,0xf2,0x67,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x67,0x8f,0x72,0x51,0x7f
-
-# CHECK: vcvtne2ps2bf16 -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x67,0x9f,0x72,0x52,0x80
-
-# CHECK: vcvtneps2bf16 %xmm3, %xmm2
-0x62,0xf2,0x7e,0x08,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 %xmm3, %xmm2 {%k7}
-0x62,0xf2,0x7e,0x0f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0x8f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 %ymm3, %xmm2
-0x62,0xf2,0x7e,0x28,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 %ymm3, %xmm2 {%k7}
-0x62,0xf2,0x7e,0x2f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 %ymm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0xaf,0x72,0xd3
-
-# CHECK: vcvtneps2bf16x 268435456(%esp,%esi,8), %xmm2
-0x62,0xf2,0x7e,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16x 291(%edi,%eax,4), %xmm2 {%k7}
-0x62,0xf2,0x7e,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16 (%eax){1to4}, %xmm2
-0x62,0xf2,0x7e,0x18,0x72,0x10
-
-# CHECK: vcvtneps2bf16x -512(,%ebp,2), %xmm2
-0x62,0xf2,0x7e,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtneps2bf16x 2032(%ecx), %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0x8f,0x72,0x51,0x7f
-
-# CHECK: vcvtneps2bf16 -512(%edx){1to4}, %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0x9f,0x72,0x52,0x80
-
-# CHECK: vcvtneps2bf16 (%eax){1to8}, %xmm2
-0x62,0xf2,0x7e,0x38,0x72,0x10
-
-# CHECK: vcvtneps2bf16y -1024(,%ebp,2), %xmm2
-0x62,0xf2,0x7e,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtneps2bf16y 4064(%ecx), %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0xaf,0x72,0x51,0x7f
-
-# CHECK: vcvtneps2bf16 -512(%edx){1to8}, %xmm2 {%k7} {z}
-0x62,0xf2,0x7e,0xbf,0x72,0x52,0x80
-
-# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2
-0x62,0xf2,0x66,0x28,0x52,0xd4
-
-# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2 {%k7}
-0x62,0xf2,0x66,0x2f,0x52,0xd4
-
-# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x66,0xaf,0x52,0xd4
-
-# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2
-0x62,0xf2,0x66,0x08,0x52,0xd4
-
-# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2 {%k7}
-0x62,0xf2,0x66,0x0f,0x52,0xd4
-
-# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x66,0x8f,0x52,0xd4
-
-# CHECK: vdpbf16ps 268435456(%esp,%esi,8), %ymm3, %ymm2
-0x62,0xf2,0x66,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
-0x62,0xf2,0x66,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps (%eax){1to8}, %ymm3, %ymm2
-0x62,0xf2,0x66,0x38,0x52,0x10
-
-# CHECK: vdpbf16ps -1024(,%ebp,2), %ymm3, %ymm2
-0x62,0xf2,0x66,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vdpbf16ps 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x66,0xaf,0x52,0x51,0x7f
-
-# CHECK: vdpbf16ps -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
-0x62,0xf2,0x66,0xbf,0x52,0x52,0x80
-
-# CHECK: vdpbf16ps 268435456(%esp,%esi,8), %xmm3, %xmm2
-0x62,0xf2,0x66,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
-0x62,0xf2,0x66,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps (%eax){1to4}, %xmm3, %xmm2
-0x62,0xf2,0x66,0x18,0x52,0x10
-
-# CHECK: vdpbf16ps -512(,%ebp,2), %xmm3, %xmm2
-0x62,0xf2,0x66,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vdpbf16ps 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x66,0x8f,0x52,0x51,0x7f
-
-# CHECK: vdpbf16ps -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
-0x62,0xf2,0x66,0x9f,0x52,0x52,0x80
diff --git a/llvm/test/MC/Disassembler/X86/avx512bf16vl-intel.txt b/llvm/test/MC/Disassembler/X86/avx512bf16vl-intel.txt
deleted file mode 100644
index 3d9dcb1879d445..00000000000000
--- a/llvm/test/MC/Disassembler/X86/avx512bf16vl-intel.txt
+++ /dev/null
@@ -1,157 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=i686 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymm4
-0x62,0xf2,0x67,0x28,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 ymm2 {k7}, ymm3, ymm4
-0x62,0xf2,0x67,0x2f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, ymm4
-0x62,0xf2,0x67,0xaf,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmm4
-0x62,0xf2,0x67,0x08,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 xmm2 {k7}, xmm3, xmm4
-0x62,0xf2,0x67,0x0f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, xmm4
-0x62,0xf2,0x67,0x8f,0x72,0xd4
-
-# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
-0x62,0xf2,0x67,0x28,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
-0x62,0xf2,0x67,0x2f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 ymm2, ymm3, dword ptr [eax]{1to8}
-0x62,0xf2,0x67,0x38,0x72,0x10
-
-# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
-0x62,0xf2,0x67,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
-0x62,0xf2,0x67,0xaf,0x72,0x51,0x7f
-
-# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
-0x62,0xf2,0x67,0xbf,0x72,0x52,0x80
-
-# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
-0x62,0xf2,0x67,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
-0x62,0xf2,0x67,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 xmm2, xmm3, dword ptr [eax]{1to4}
-0x62,0xf2,0x67,0x18,0x72,0x10
-
-# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmmword ptr [2*ebp - 512]
-0x62,0xf2,0x67,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
-0x62,0xf2,0x67,0x8f,0x72,0x51,0x7f
-
-# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
-0x62,0xf2,0x67,0x9f,0x72,0x52,0x80
-
-# CHECK: vcvtneps2bf16 xmm2, xmm3
-0x62,0xf2,0x7e,0x08,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2 {k7}, xmm3
-0x62,0xf2,0x7e,0x0f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, xmm3
-0x62,0xf2,0x7e,0x8f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2, ymm3
-0x62,0xf2,0x7e,0x28,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2 {k7}, ymm3
-0x62,0xf2,0x7e,0x2f,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, ymm3
-0x62,0xf2,0x7e,0xaf,0x72,0xd3
-
-# CHECK: vcvtneps2bf16 xmm2, xmmword ptr [esp + 8*esi + 268435456]
-0x62,0xf2,0x7e,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
-0x62,0xf2,0x7e,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16 xmm2, dword ptr [eax]{1to4}
-0x62,0xf2,0x7e,0x18,0x72,0x10
-
-# CHECK: vcvtneps2bf16 xmm2, xmmword ptr [2*ebp - 512]
-0x62,0xf2,0x7e,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
-0x62,0xf2,0x7e,0x8f,0x72,0x51,0x7f
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
-0x62,0xf2,0x7e,0x9f,0x72,0x52,0x80
-
-# CHECK: vcvtneps2bf16 xmm2, dword ptr [eax]{1to8}
-0x62,0xf2,0x7e,0x38,0x72,0x10
-
-# CHECK: vcvtneps2bf16 xmm2, ymmword ptr [2*ebp - 1024]
-0x62,0xf2,0x7e,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
-0x62,0xf2,0x7e,0xaf,0x72,0x51,0x7f
-
-# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, dword ptr [edx - 512]{1to8}
-0x62,0xf2,0x7e,0xbf,0x72,0x52,0x80
-
-# CHECK: vdpbf16ps ymm2, ymm3, ymm4
-0x62,0xf2,0x66,0x28,0x52,0xd4
-
-# CHECK: vdpbf16ps ymm2 {k7}, ymm3, ymm4
-0x62,0xf2,0x66,0x2f,0x52,0xd4
-
-# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, ymm4
-0x62,0xf2,0x66,0xaf,0x52,0xd4
-
-# CHECK: vdpbf16ps xmm2, xmm3, xmm4
-0x62,0xf2,0x66,0x08,0x52,0xd4
-
-# CHECK: vdpbf16ps xmm2 {k7}, xmm3, xmm4
-0x62,0xf2,0x66,0x0f,0x52,0xd4
-
-# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, xmm4
-0x62,0xf2,0x66,0x8f,0x52,0xd4
-
-# CHECK: vdpbf16ps ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
-0x62,0xf2,0x66,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
-0x62,0xf2,0x66,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps ymm2, ymm3, dword ptr [eax]{1to8}
-0x62,0xf2,0x66,0x38,0x52,0x10
-
-# CHECK: vdpbf16ps ymm2, ymm3, ymmword ptr [2*ebp - 1024]
-0x62,0xf2,0x66,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
-0x62,0xf2,0x66,0xaf,0x52,0x51,0x7f
-
-# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
-0x62,0xf2,0x66,0xbf,0x52,0x52,0x80
-
-# CHECK: vdpbf16ps xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
-0x62,0xf2,0x66,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
-0x62,0xf2,0x66,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps xmm2, xmm3, dword ptr [eax]{1to4}
-0x62,0xf2,0x66,0x18,0x52,0x10
-
-# CHECK: vdpbf16ps xmm2, xmm3, xmmword ptr [2*ebp - 512]
-0x62,0xf2,0x66,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
-0x62,0xf2,0x66,0x8f,0x52,0x51,0x7f
-
-# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
-0x62,0xf2,0x66,0x9f,0x52,0x52,0x80
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
deleted file mode 100644
index e2bfc98b13a107..00000000000000
--- a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
+++ /dev/null
@@ -1,158 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22
-0x62,0x82,0x47,0x20,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22 {%k7}
-0x62,0x82,0x47,0x27,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22 {%k7} {z}
-0x62,0x82,0x47,0xa7,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22
-0x62,0x82,0x47,0x00,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22 {%k7}
-0x62,0x82,0x47,0x07,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22 {%k7} {z}
-0x62,0x82,0x47,0x87,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 268435456(%rbp,%r14,8), %ymm23, %ymm22
-0x62,0xa2,0x47,0x20,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
-0x62,0xc2,0x47,0x27,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 (%rip){1to8}, %ymm23, %ymm22
-0x62,0xe2,0x47,0x30,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 -1024(,%rbp,2), %ymm23, %ymm22
-0x62,0xe2,0x47,0x20,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
-0x62,0xe2,0x47,0xa7,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16 -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
-0x62,0xe2,0x47,0xb7,0x72,0x72,0x80
-
-# CHECK: vcvtne2ps2bf16 268435456(%rbp,%r14,8), %xmm23, %xmm22
-0x62,0xa2,0x47,0x00,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
-0x62,0xc2,0x47,0x07,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 (%rip){1to4}, %xmm23, %xmm22
-0x62,0xe2,0x47,0x10,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 -512(,%rbp,2), %xmm23, %xmm22
-0x62,0xe2,0x47,0x00,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
-0x62,0xe2,0x47,0x87,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16 -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
-0x62,0xe2,0x47,0x97,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 %xmm23, %xmm22
-0x62,0xa2,0x7e,0x08,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %xmm23, %xmm22 {%k7}
-0x62,0xa2,0x7e,0x0f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %xmm23, %xmm22 {%k7} {z}
-0x62,0xa2,0x7e,0x8f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %ymm23, %xmm22
-0x62,0xa2,0x7e,0x28,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %ymm23, %xmm22 {%k7}
-0x62,0xa2,0x7e,0x2f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 %ymm23, %xmm22 {%k7} {z}
-0x62,0xa2,0x7e,0xaf,0x72,0xf7
-
-# CHECK: vcvtneps2bf16x 268435456(%rbp,%r14,8), %xmm22
-0x62,0xa2,0x7e,0x08,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16x 291(%r8,%rax,4), %xmm22 {%k7}
-0x62,0xc2,0x7e,0x0f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16 (%rip){1to4}, %xmm22
-0x62,0xe2,0x7e,0x18,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16x -512(,%rbp,2), %xmm22
-0x62,0xe2,0x7e,0x08,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtneps2bf16x 2032(%rcx), %xmm22 {%k7} {z}
-0x62,0xe2,0x7e,0x8f,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16 -512(%rdx){1to4}, %xmm22 {%k7} {z}
-0x62,0xe2,0x7e,0x9f,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 (%rip){1to8}, %xmm22
-0x62,0xe2,0x7e,0x38,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16y -1024(,%rbp,2), %xmm22
-0x62,0xe2,0x7e,0x28,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtneps2bf16y 4064(%rcx), %xmm22 {%k7} {z}
-0x62,0xe2,0x7e,0xaf,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16 -512(%rdx){1to8}, %xmm22 {%k7} {z}
-0x62,0xe2,0x7e,0xbf,0x72,0x72,0x80
-
-# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22
-0x62,0x82,0x46,0x20,0x52,0xf0
-
-# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22 {%k7}
-0x62,0x82,0x46,0x27,0x52,0xf0
-
-# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22 {%k7} {z}
-0x62,0x82,0x46,0xa7,0x52,0xf0
-
-# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22
-0x62,0x82,0x46,0x00,0x52,0xf0
-
-# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22 {%k7}
-0x62,0x82,0x46,0x07,0x52,0xf0
-
-# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22 {%k7} {z}
-0x62,0x82,0x46,0x87,0x52,0xf0
-
-# CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %ymm23, %ymm22
-0x62,0xa2,0x46,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
-0x62,0xc2,0x46,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps (%rip){1to8}, %ymm23, %ymm22
-0x62,0xe2,0x46,0x30,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps -1024(,%rbp,2), %ymm23, %ymm22
-0x62,0xe2,0x46,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vdpbf16ps 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
-0x62,0xe2,0x46,0xa7,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
-0x62,0xe2,0x46,0xb7,0x52,0x72,0x80
-
-# CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %xmm23, %xmm22
-0x62,0xa2,0x46,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
-0x62,0xc2,0x46,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps (%rip){1to4}, %xmm23, %xmm22
-0x62,0xe2,0x46,0x10,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps -512(,%rbp,2), %xmm23, %xmm22
-0x62,0xe2,0x46,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vdpbf16ps 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
-0x62,0xe2,0x46,0x87,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
-0x62,0xe2,0x46,0x97,0x52,0x72,0x80
-
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
deleted file mode 100644
index 4def95ed899273..00000000000000
--- a/llvm/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
+++ /dev/null
@@ -1,158 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
-
-# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymm24
-0x62,0x82,0x47,0x20,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 ymm22 {k7}, ymm23, ymm24
-0x62,0x82,0x47,0x27,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, ymm24
-0x62,0x82,0x47,0xa7,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmm24
-0x62,0x82,0x47,0x00,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 xmm22 {k7}, xmm23, xmm24
-0x62,0x82,0x47,0x07,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, xmm24
-0x62,0x82,0x47,0x87,0x72,0xf0
-
-# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x47,0x20,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x47,0x27,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 ymm22, ymm23, dword ptr [rip]{1to8}
-0x62,0xe2,0x47,0x30,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
-0x62,0xe2,0x47,0x20,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
-0x62,0xe2,0x47,0xa7,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
-0x62,0xe2,0x47,0xb7,0x72,0x72,0x80
-
-# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x47,0x00,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtne2ps2bf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x47,0x07,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 xmm22, xmm23, dword ptr [rip]{1to4}
-0x62,0xe2,0x47,0x10,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmmword ptr [2*rbp - 512]
-0x62,0xe2,0x47,0x00,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
-0x62,0xe2,0x47,0x87,0x72,0x71,0x7f
-
-# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
-0x62,0xe2,0x47,0x97,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 xmm22, xmm23
-0x62,0xa2,0x7e,0x08,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22 {k7}, xmm23
-0x62,0xa2,0x7e,0x0f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, xmm23
-0x62,0xa2,0x7e,0x8f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22, ymm23
-0x62,0xa2,0x7e,0x28,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22 {k7}, ymm23
-0x62,0xa2,0x7e,0x2f,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, ymm23
-0x62,0xa2,0x7e,0xaf,0x72,0xf7
-
-# CHECK: vcvtneps2bf16 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x7e,0x08,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vcvtneps2bf16 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x7e,0x0f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vcvtneps2bf16 xmm22, dword ptr [rip]{1to4}
-0x62,0xe2,0x7e,0x18,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16 xmm22, xmmword ptr [2*rbp - 512]
-0x62,0xe2,0x7e,0x08,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
-0x62,0xe2,0x7e,0x8f,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
-0x62,0xe2,0x7e,0x9f,0x72,0x72,0x80
-
-# CHECK: vcvtneps2bf16 xmm22, dword ptr [rip]{1to8}
-0x62,0xe2,0x7e,0x38,0x72,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vcvtneps2bf16 xmm22, ymmword ptr [2*rbp - 1024]
-0x62,0xe2,0x7e,0x28,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
-0x62,0xe2,0x7e,0xaf,0x72,0x71,0x7f
-
-# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
-0x62,0xe2,0x7e,0xbf,0x72,0x72,0x80
-
-# CHECK: vdpbf16ps ymm22, ymm23, ymm24
-0x62,0x82,0x46,0x20,0x52,0xf0
-
-# CHECK: vdpbf16ps ymm22 {k7}, ymm23, ymm24
-0x62,0x82,0x46,0x27,0x52,0xf0
-
-# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, ymm24
-0x62,0x82,0x46,0xa7,0x52,0xf0
-
-# CHECK: vdpbf16ps xmm22, xmm23, xmm24
-0x62,0x82,0x46,0x00,0x52,0xf0
-
-# CHECK: vdpbf16ps xmm22 {k7}, xmm23, xmm24
-0x62,0x82,0x46,0x07,0x52,0xf0
-
-# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, xmm24
-0x62,0x82,0x46,0x87,0x52,0xf0
-
-# CHECK: vdpbf16ps ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x46,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x46,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps ymm22, ymm23, dword ptr [rip]{1to8}
-0x62,0xe2,0x46,0x30,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps ymm22, ymm23, ymmword ptr [2*rbp - 1024]
-0x62,0xe2,0x46,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
-
-# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
-0x62,0xe2,0x46,0xa7,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
-0x62,0xe2,0x46,0xb7,0x52,0x72,0x80
-
-# CHECK: vdpbf16ps xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
-0x62,0xa2,0x46,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
-
-# CHECK: vdpbf16ps xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
-0x62,0xc2,0x46,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
-
-# CHECK: vdpbf16ps xmm22, xmm23, dword ptr [rip]{1to4}
-0x62,0xe2,0x46,0x10,0x52,0x35,0x00,0x00,0x00,0x00
-
-# CHECK: vdpbf16ps xmm22, xmm23, xmmword ptr [2*rbp - 512]
-0x62,0xe2,0x46,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
-
-# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
-0x62,0xe2,0x46,0x87,0x52,0x71,0x7f
-
-# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
-0x62,0xe2,0x46,0x97,0x52,0x72,0x80
-
diff --git a/llvm/test/MC/Disassembler/avx512_bf16_vl-32.txt b/llvm/test/MC/Disassembler/avx512_bf16_vl-32.txt
new file mode 100644
index 00000000000000..65ff8f73410f63
--- /dev/null
+++ b/llvm/test/MC/Disassembler/avx512_bf16_vl-32.txt
@@ -0,0 +1,170 @@
+# RUN: llvm-mc -triple i686-unknown-unknown -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple i686-unknown-unknown -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT: vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmm4
+0x62,0xf2,0x57,0x0f,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7} {z}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7} {z}, xmm5, xmm4
+0x62,0xf2,0x57,0x8f,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 (%ecx), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [ecx]
+0x62,0xf2,0x57,0x0f,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 291(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 291]
+0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ps2bf16 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ps2bf16 -16(%esp), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp - 16]
+0x62,0xf2,0x57,0x0f,0x72,0x74,0x24,0xff
+
+# ATT: vcvtne2ps2bf16 (%eax){1to4}, %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [eax]{1to4}
+0x62,0xf2,0x57,0x1f,0x72,0x30
+
+# ATT: vcvtne2ps2bf16 2032(%edx), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx + 2032]
+0x62,0xf2,0x57,0x0f,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -2048(%edx), %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx - 2048]
+0x62,0xf2,0x57,0x0f,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 508(%edx){1to4}, %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx + 508]{1to4}
+0x62,0xf2,0x57,0x1f,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -512(%edx){1to4}, %xmm5, %xmm6 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x57,0x1f,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymm4
+0x62,0xf2,0x57,0x2f,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7} {z}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7} {z}, ymm5, ymm4
+0x62,0xf2,0x57,0xaf,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 (%ecx), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [ecx]
+0x62,0xf2,0x57,0x2f,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 291(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 291]
+0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ps2bf16 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ps2bf16 -32(%esp), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp - 32]
+0x62,0xf2,0x57,0x2f,0x72,0x74,0x24,0xff
+
+# ATT: vcvtne2ps2bf16 (%eax){1to8}, %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [eax]{1to8}
+0x62,0xf2,0x57,0x3f,0x72,0x30
+
+# ATT: vcvtne2ps2bf16 4064(%edx), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx + 4064]
+0x62,0xf2,0x57,0x2f,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -4096(%edx), %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx - 4096]
+0x62,0xf2,0x57,0x2f,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 508(%edx){1to8}, %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx + 508]{1to8}
+0x62,0xf2,0x57,0x3f,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -512(%edx){1to8}, %ymm5, %ymm6 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x57,0x3f,0x72,0x72,0x80
+
+# ATT: vcvtneps2bf16 %xmm5, %xmm6
+# INTEL: vcvtneps2bf16 xmm6, xmm5
+0x62,0xf2,0x7e,0x08,0x72,0xf5
+
+# ATT: vcvtneps2bf16x 268435456(%esp,%esi,8), %xmm6 {%k7}
+# INTEL: vcvtneps2bf16 xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneps2bf16 (%ecx){1to4}, %xmm6
+# INTEL: vcvtneps2bf16 xmm6, dword ptr [ecx]{1to4}
+0x62,0xf2,0x7e,0x18,0x72,0x31
+
+# ATT: vcvtneps2bf16x 2032(%ecx), %xmm6
+# INTEL: vcvtneps2bf16 xmm6, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x7e,0x08,0x72,0x71,0x7f
+
+# ATT: vcvtneps2bf16 -512(%edx){1to4}, %xmm6 {%k7} {z}
+# INTEL: vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x7e,0x9f,0x72,0x72,0x80
+
+# ATT: vcvtneps2bf16 %ymm5, %xmm6
+# INTEL: vcvtneps2bf16 xmm6, ymm5
+0x62,0xf2,0x7e,0x28,0x72,0xf5
+
+# ATT: vcvtneps2bf16y 268435456(%esp,%esi,8), %xmm6 {%k7}
+# INTEL: vcvtneps2bf16 xmm6 {k7}, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneps2bf16 (%ecx){1to8}, %xmm6
+# INTEL: vcvtneps2bf16 xmm6, dword ptr [ecx]{1to8}
+0x62,0xf2,0x7e,0x38,0x72,0x31
+
+# ATT: vcvtneps2bf16y 4064(%ecx), %xmm6
+# INTEL: vcvtneps2bf16 xmm6, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x7e,0x28,0x72,0x71,0x7f
+
+# ATT: vcvtneps2bf16 -512(%edx){1to8}, %xmm6 {%k7} {z}
+# INTEL: vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x7e,0xbf,0x72,0x72,0x80
+
+# ATT: vdpbf16ps %ymm4, %ymm5, %ymm6
+# INTEL: vdpbf16ps ymm6, ymm5, ymm4
+0x62,0xf2,0x56,0x28,0x52,0xf4
+
+# ATT: vdpbf16ps 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+# INTEL: vdpbf16ps ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x56,0x2f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vdpbf16ps (%ecx){1to8}, %ymm5, %ymm6
+# INTEL: vdpbf16ps ymm6, ymm5, dword ptr [ecx]{1to8}
+0x62,0xf2,0x56,0x38,0x52,0x31
+
+# ATT: vdpbf16ps 4064(%ecx), %ymm5, %ymm6
+# INTEL: vdpbf16ps ymm6, ymm5, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x56,0x28,0x52,0x71,0x7f
+
+# ATT: vdpbf16ps -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z}
+# INTEL: vdpbf16ps ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x56,0xbf,0x52,0x72,0x80
+
+# ATT: vdpbf16ps %xmm4, %xmm5, %xmm6
+# INTEL: vdpbf16ps xmm6, xmm5, xmm4
+0x62,0xf2,0x56,0x08,0x52,0xf4
+
+# ATT: vdpbf16ps 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+# INTEL: vdpbf16ps xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x56,0x0f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vdpbf16ps (%ecx){1to4}, %xmm5, %xmm6
+# INTEL: vdpbf16ps xmm6, xmm5, dword ptr [ecx]{1to4}
+0x62,0xf2,0x56,0x18,0x52,0x31
+
+# ATT: vdpbf16ps 2032(%ecx), %xmm5, %xmm6
+# INTEL: vdpbf16ps xmm6, xmm5, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x56,0x08,0x52,0x71,0x7f
+
+# ATT: vdpbf16ps -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z}
+# INTEL: vdpbf16ps xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x56,0x9f,0x52,0x72,0x80
diff --git a/llvm/test/MC/Disassembler/avx512_bf16_vl-64.txt b/llvm/test/MC/Disassembler/avx512_bf16_vl-64.txt
new file mode 100644
index 00000000000000..d7fe10270cd3e9
--- /dev/null
+++ b/llvm/test/MC/Disassembler/avx512_bf16_vl-64.txt
@@ -0,0 +1,178 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmm28
+0x62,0x02,0x17,0x00,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7}
+# INTEL: vcvtne2ps2bf16 xmm30 {k7}, xmm29, xmm28
+0x62,0x02,0x17,0x07,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7} {z}
+# INTEL: vcvtne2ps2bf16 xmm30 {k7} {z}, xmm29, xmm28
+0x62,0x02,0x17,0x87,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 (%rcx), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rcx]
+0x62,0x62,0x17,0x00,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 291(%rax,%r14,8), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 291]
+0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ps2bf16 268435456(%rax,%r14,8), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 268435456]
+0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ps2bf16 -16(%rsp), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rsp - 16]
+0x62,0x62,0x17,0x00,0x72,0x74,0x24,0xff
+
+# ATT: vcvtne2ps2bf16 (%rcx){1to4}, %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rcx]{1to4}
+0x62,0x62,0x17,0x10,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 2032(%rdx), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx + 2032]
+0x62,0x62,0x17,0x00,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -2048(%rdx), %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx - 2048]
+0x62,0x62,0x17,0x00,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 508(%rdx){1to4}, %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx + 508]{1to4}
+0x62,0x62,0x17,0x10,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -512(%rdx){1to4}, %xmm29, %xmm30
+# INTEL: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx - 512]{1to4}
+0x62,0x62,0x17,0x10,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymm28
+0x62,0x02,0x17,0x20,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7}
+# INTEL: vcvtne2ps2bf16 ymm30 {k7}, ymm29, ymm28
+0x62,0x02,0x17,0x27,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7} {z}
+# INTEL: vcvtne2ps2bf16 ymm30 {k7} {z}, ymm29, ymm28
+0x62,0x02,0x17,0xa7,0x72,0xf4
+
+# ATT: vcvtne2ps2bf16 (%rcx), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rcx]
+0x62,0x62,0x17,0x20,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 291(%rax,%r14,8), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 291]
+0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ps2bf16 268435456(%rax,%r14,8), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 268435456]
+0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ps2bf16 -32(%rsp), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rsp - 32]
+0x62,0x62,0x17,0x20,0x72,0x74,0x24,0xff
+
+# ATT: vcvtne2ps2bf16 (%rcx){1to8}, %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rcx]{1to8}
+0x62,0x62,0x17,0x30,0x72,0x31
+
+# ATT: vcvtne2ps2bf16 4064(%rdx), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx + 4064]
+0x62,0x62,0x17,0x20,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -4096(%rdx), %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx - 4096]
+0x62,0x62,0x17,0x20,0x72,0x72,0x80
+
+# ATT: vcvtne2ps2bf16 508(%rdx){1to8}, %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx + 508]{1to8}
+0x62,0x62,0x17,0x30,0x72,0x72,0x7f
+
+# ATT: vcvtne2ps2bf16 -512(%rdx){1to8}, %ymm29, %ymm30
+# INTEL: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx - 512]{1to8}
+0x62,0x62,0x17,0x30,0x72,0x72,0x80
+
+# ATT: vcvtneps2bf16 %xmm29, %xmm30
+# INTEL: vcvtneps2bf16 xmm30, xmm29
+0x62,0x02,0x7e,0x08,0x72,0xf5
+
+# ATT: vcvtneps2bf16x 268435456(%rbp,%r14,8), %xmm30 {%k7}
+# INTEL: vcvtneps2bf16 xmm30 {k7}, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x7e,0x0f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneps2bf16 (%r9){1to4}, %xmm30
+# INTEL: vcvtneps2bf16 xmm30, dword ptr [r9]{1to4}
+0x62,0x42,0x7e,0x18,0x72,0x31
+
+# ATT: vcvtneps2bf16x 2032(%rcx), %xmm30
+# INTEL: vcvtneps2bf16 xmm30, xmmword ptr [rcx + 2032]
+0x62,0x62,0x7e,0x08,0x72,0x71,0x7f
+
+# ATT: vcvtneps2bf16 -512(%rdx){1to4}, %xmm30 {%k7} {z}
+# INTEL: vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0x62,0x7e,0x9f,0x72,0x72,0x80
+
+# ATT: vcvtneps2bf16 %ymm29, %xmm30
+# INTEL: vcvtneps2bf16 xmm30, ymm29
+0x62,0x02,0x7e,0x28,0x72,0xf5
+
+# ATT: vcvtneps2bf16y 268435456(%rbp,%r14,8), %xmm30 {%k7}
+# INTEL: vcvtneps2bf16 xmm30 {k7}, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x7e,0x2f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneps2bf16 (%r9){1to8}, %xmm30
+# INTEL: vcvtneps2bf16 xmm30, dword ptr [r9]{1to8}
+0x62,0x42,0x7e,0x38,0x72,0x31
+
+# ATT: vcvtneps2bf16y 4064(%rcx), %xmm30
+# INTEL: vcvtneps2bf16 xmm30, ymmword ptr [rcx + 4064]
+0x62,0x62,0x7e,0x28,0x72,0x71,0x7f
+
+# ATT: vcvtneps2bf16 -512(%rdx){1to8}, %xmm30 {%k7} {z}
+# INTEL: vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0x62,0x7e,0xbf,0x72,0x72,0x80
+
+# ATT: vdpbf16ps %ymm28, %ymm29, %ymm30
+# INTEL: vdpbf16ps ymm30, ymm29, ymm28
+0x62,0x02,0x16,0x20,0x52,0xf4
+
+# ATT: vdpbf16ps 268435456(%rbp,%r14,8), %ymm29, %ymm30 {%k7}
+# INTEL: vdpbf16ps ymm30 {k7}, ymm29, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x16,0x27,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vdpbf16ps (%r9){1to8}, %ymm29, %ymm30
+# INTEL: vdpbf16ps ymm30, ymm29, dword ptr [r9]{1to8}
+0x62,0x42,0x16,0x30,0x52,0x31
+
+# ATT: vdpbf16ps 4064(%rcx), %ymm29, %ymm30
+# INTEL: vdpbf16ps ymm30, ymm29, ymmword ptr [rcx + 4064]
+0x62,0x62,0x16,0x20,0x52,0x71,0x7f
+
+# ATT: vdpbf16ps -512(%rdx){1to8}, %ymm29, %ymm30 {%k7} {z}
+# INTEL: vdpbf16ps ymm30 {k7} {z}, ymm29, dword ptr [rdx - 512]{1to8}
+0x62,0x62,0x16,0xb7,0x52,0x72,0x80
+
+# ATT: vdpbf16ps %xmm28, %xmm29, %xmm30
+# INTEL: vdpbf16ps xmm30, xmm29, xmm28
+0x62,0x02,0x16,0x00,0x52,0xf4
+
+# ATT: vdpbf16ps 268435456(%rbp,%r14,8), %xmm29, %xmm30 {%k7}
+# INTEL: vdpbf16ps xmm30 {k7}, xmm29, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0x22,0x16,0x07,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vdpbf16ps (%r9){1to4}, %xmm29, %xmm30
+# INTEL: vdpbf16ps xmm30, xmm29, dword ptr [r9]{1to4}
+0x62,0x42,0x16,0x10,0x52,0x31
+
+# ATT: vdpbf16ps 2032(%rcx), %xmm29, %xmm30
+# INTEL: vdpbf16ps xmm30, xmm29, xmmword ptr [rcx + 2032]
+0x62,0x62,0x16,0x00,0x52,0x71,0x7f
+
+# ATT: vdpbf16ps -512(%rdx){1to4}, %xmm29, %xmm30 {%k7} {z}
+# INTEL: vdpbf16ps xmm30 {k7} {z}, xmm29, dword ptr [rdx - 512]{1to4}
+0x62,0x62,0x16,0x97,0x52,0x72,0x80
diff --git a/llvm/test/MC/X86/avx512_bf16_vl-encoding.s b/llvm/test/MC/X86/avx512_bf16_vl-32-att.s
similarity index 100%
rename from llvm/test/MC/X86/avx512_bf16_vl-encoding.s
rename to llvm/test/MC/X86/avx512_bf16_vl-32-att.s
diff --git a/llvm/test/MC/X86/intel-syntax-avx512_bf16_vl.s b/llvm/test/MC/X86/avx512_bf16_vl-32-intel.s
similarity index 100%
rename from llvm/test/MC/X86/intel-syntax-avx512_bf16_vl.s
rename to llvm/test/MC/X86/avx512_bf16_vl-32-intel.s
diff --git a/llvm/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s b/llvm/test/MC/X86/avx512_bf16_vl-64-att.s
similarity index 100%
rename from llvm/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s
rename to llvm/test/MC/X86/avx512_bf16_vl-64-att.s
diff --git a/llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s b/llvm/test/MC/X86/avx512_bf16_vl-64-intel.s
similarity index 100%
rename from llvm/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s
rename to llvm/test/MC/X86/avx512_bf16_vl-64-intel.s
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