[llvm] f2b3e7c - [X86][test] Add missing encoding/decoding tests for avx512dq_vl
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 23:57:19 PST 2023
Author: Shengchen Kan
Date: 2023-12-13T15:57:06+08:00
New Revision: f2b3e7c711ba440e87194002e9487c41d9bcf7d2
URL: https://github.com/llvm/llvm-project/commit/f2b3e7c711ba440e87194002e9487c41d9bcf7d2
DIFF: https://github.com/llvm/llvm-project/commit/f2b3e7c711ba440e87194002e9487c41d9bcf7d2.diff
LOG: [X86][test] Add missing encoding/decoding tests for avx512dq_vl
Found in #75288
Added:
llvm/test/MC/Disassembler/X86/avx512dq_vl.txt
llvm/test/MC/X86/avx512dq_vl-att.s
llvm/test/MC/X86/avx512dq_vl-intel.s
Modified:
Removed:
llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s
################################################################################
diff --git a/llvm/test/MC/Disassembler/X86/avx512dq_vl.txt b/llvm/test/MC/Disassembler/X86/avx512dq_vl.txt
new file mode 100644
index 0000000000000..c709a63d38100
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx512dq_vl.txt
@@ -0,0 +1,194 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# INTEL: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# INTEL: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2
+# INTEL: vcvtps2qq xmm2, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1
+# INTEL: vcvttps2qq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1
+# INTEL: vcvtps2uqq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x79,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1
+# INTEL: vcvttps2uqq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x78,0x49,0x10
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# INTEL: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# INTEL: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10
+
+# ATT: vcvtps2qq 128(%rcx), %xmm2
+# INTEL: vcvtps2qq xmm2, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10
+
+# ATT: vcvttps2qq 128(%rcx), %xmm1
+# INTEL: vcvttps2qq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10
+
+# ATT: vcvtps2uqq 128(%rcx), %xmm1
+# INTEL: vcvtps2uqq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x79,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# INTEL: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# INTEL: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10
+
+# ATT: vcvttps2uqq 128(%rcx), %xmm1
+# INTEL: vcvttps2uqq xmm1, qword ptr [rcx + 128]
+0x62,0xf1,0x7d,0x08,0x78,0x49,0x10
+
+# ATT: vfpclasspd $171, %xmm18, %k2
+# INTEL: vfpclasspd k2, xmm18, 171
+0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab
+
+# ATT: vfpclasspd $171, %xmm18, %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, xmm18, 171
+0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab
+
+# ATT: vfpclasspdx $123, (%rcx), %k2
+# INTEL: vfpclasspd k2, xmmword ptr [rcx], 123
+0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b
+
+# ATT: vfpclasspdx $123, (%rcx), %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, xmmword ptr [rcx], 123
+0x62,0xf3,0xfd,0x0f,0x66,0x11,0x7b
+
+# ATT: vfpclasspd $123, (%rcx){1to2}, %k2
+# INTEL: vfpclasspd k2, qword ptr [rcx]{1to2}, 123
+0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b
+
+# ATT: vfpclasspd $123, (%rcx){1to2}, %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 123
+0x62,0xf3,0xfd,0x1f,0x66,0x11,0x7b
+
+# ATT: vfpclassps $171, %xmm18, %k2
+# INTEL: vfpclassps k2, xmm18, 171
+0x62,0xb3,0x7d,0x08,0x66,0xd2,0xab
+
+# ATT: vfpclassps $171, %xmm18, %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, xmm18, 171
+0x62,0xb3,0x7d,0x0f,0x66,0xd2,0xab
+
+# ATT: vfpclasspsx $123, (%rcx), %k2
+# INTEL: vfpclassps k2, xmmword ptr [rcx], 123
+0x62,0xf3,0x7d,0x08,0x66,0x11,0x7b
+
+# ATT: vfpclasspsx $123, (%rcx), %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, xmmword ptr [rcx], 123
+0x62,0xf3,0x7d,0x0f,0x66,0x11,0x7b
+
+# ATT: vfpclassps $123, (%rcx){1to4}, %k2
+# INTEL: vfpclassps k2, dword ptr [rcx]{1to4}, 123
+0x62,0xf3,0x7d,0x18,0x66,0x11,0x7b
+
+# ATT: vfpclassps $123, (%rcx){1to4}, %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 123
+0x62,0xf3,0x7d,0x1f,0x66,0x11,0x7b
+
+# ATT: vfpclasspd $171, %ymm18, %k2
+# INTEL: vfpclasspd k2, ymm18, 171
+0x62,0xb3,0xfd,0x28,0x66,0xd2,0xab
+
+# ATT: vfpclasspd $171, %ymm18, %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, ymm18, 171
+0x62,0xb3,0xfd,0x2f,0x66,0xd2,0xab
+
+# ATT: vfpclasspdy $123, (%rcx), %k2
+# INTEL: vfpclasspd k2, ymmword ptr [rcx], 123
+0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b
+
+# ATT: vfpclasspdy $123, (%rcx), %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, ymmword ptr [rcx], 123
+0x62,0xf3,0xfd,0x2f,0x66,0x11,0x7b
+
+# ATT: vfpclasspd $123, (%rcx){1to4}, %k2
+# INTEL: vfpclasspd k2, qword ptr [rcx]{1to4}, 123
+0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b
+
+# ATT: vfpclasspd $123, (%rcx){1to4}, %k2 {%k7}
+# INTEL: vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 123
+0x62,0xf3,0xfd,0x3f,0x66,0x11,0x7b
+
+# ATT: vfpclassps $171, %ymm18, %k2
+# INTEL: vfpclassps k2, ymm18, 171
+0x62,0xb3,0x7d,0x28,0x66,0xd2,0xab
+
+# ATT: vfpclassps $171, %ymm18, %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, ymm18, 171
+0x62,0xb3,0x7d,0x2f,0x66,0xd2,0xab
+
+# ATT: vfpclasspsy $123, (%rcx), %k2
+# INTEL: vfpclassps k2, ymmword ptr [rcx], 123
+0x62,0xf3,0x7d,0x28,0x66,0x11,0x7b
+
+# ATT: vfpclasspsy $123, (%rcx), %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, ymmword ptr [rcx], 123
+0x62,0xf3,0x7d,0x2f,0x66,0x11,0x7b
+
+# ATT: vfpclassps $123, (%rcx){1to8}, %k2
+# INTEL: vfpclassps k2, dword ptr [rcx]{1to8}, 123
+0x62,0xf3,0x7d,0x38,0x66,0x11,0x7b
+
+# ATT: vfpclassps $123, (%rcx){1to8}, %k2 {%k7}
+# INTEL: vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 123
+0x62,0xf3,0x7d,0x3f,0x66,0x11,0x7b
diff --git a/llvm/test/MC/X86/avx512dq_vl-att.s b/llvm/test/MC/X86/avx512dq_vl-att.s
new file mode 100644
index 0000000000000..2590a4b5ffa73
--- /dev/null
+++ b/llvm/test/MC/X86/avx512dq_vl-att.s
@@ -0,0 +1,146 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+
+# CHECK: vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# CHECK: vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# CHECK: vcvtps2qq 128(%rcx), %xmm2
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2
+# CHECK: vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvttps2qq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1
+# CHECK: vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2 {%k2} {z}
+# CHECK: vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2 {%k2}
+# CHECK: vcvtps2qq 128(%rcx), %xmm2
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
+ vcvtps2qq 128(%rcx), %xmm2
+# CHECK: vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvttps2qq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
+ vcvttps2qq 128(%rcx), %xmm1
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvtps2uqq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
+ vcvtps2uqq 128(%rcx), %xmm1
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1 {%k2} {z}
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1 {%k2}
+# CHECK: vcvttps2uqq 128(%rcx), %xmm1
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
+ vcvttps2uqq 128(%rcx), %xmm1
+# CHECK: vfpclasspd $171, %xmm18, %k2
+# CHECK: encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab]
+ vfpclasspd $171, %xmm18, %k2
+# CHECK: vfpclasspd $171, %xmm18, %k2 {%k7}
+# CHECK: encoding: [0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab]
+ vfpclasspd $171, %xmm18, %k2 {%k7}
+# CHECK: vfpclasspdx $123, (%rcx), %k2
+# CHECK: encoding: [0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b]
+ vfpclasspdx $123, (%rcx), %k2
+# CHECK: vfpclasspdx $123, (%rcx), %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0xfd,0x0f,0x66,0x11,0x7b]
+ vfpclasspdx $123, (%rcx), %k2 {%k7}
+# CHECK: vfpclasspd $123, (%rcx){1to2}, %k2
+# CHECK: encoding: [0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b]
+ vfpclasspd $123, (%rcx){1to2}, %k2
+# CHECK: vfpclasspd $123, (%rcx){1to2}, %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0xfd,0x1f,0x66,0x11,0x7b]
+ vfpclasspd $123, (%rcx){1to2}, %k2 {%k7}
+# CHECK: vfpclassps $171, %xmm18, %k2
+# CHECK: encoding: [0x62,0xb3,0x7d,0x08,0x66,0xd2,0xab]
+ vfpclassps $171, %xmm18, %k2
+# CHECK: vfpclassps $171, %xmm18, %k2 {%k7}
+# CHECK: encoding: [0x62,0xb3,0x7d,0x0f,0x66,0xd2,0xab]
+ vfpclassps $171, %xmm18, %k2 {%k7}
+# CHECK: vfpclasspsx $123, (%rcx), %k2
+# CHECK: encoding: [0x62,0xf3,0x7d,0x08,0x66,0x11,0x7b]
+ vfpclasspsx $123, (%rcx), %k2
+# CHECK: vfpclasspsx $123, (%rcx), %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0x7d,0x0f,0x66,0x11,0x7b]
+ vfpclasspsx $123, (%rcx), %k2 {%k7}
+# CHECK: vfpclassps $123, (%rcx){1to4}, %k2
+# CHECK: encoding: [0x62,0xf3,0x7d,0x18,0x66,0x11,0x7b]
+ vfpclassps $123, (%rcx){1to4}, %k2
+# CHECK: vfpclassps $123, (%rcx){1to4}, %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0x7d,0x1f,0x66,0x11,0x7b]
+ vfpclassps $123, (%rcx){1to4}, %k2 {%k7}
+# CHECK: vfpclasspd $171, %ymm18, %k2
+# CHECK: encoding: [0x62,0xb3,0xfd,0x28,0x66,0xd2,0xab]
+ vfpclasspd $171, %ymm18, %k2
+# CHECK: vfpclasspd $171, %ymm18, %k2 {%k7}
+# CHECK: encoding: [0x62,0xb3,0xfd,0x2f,0x66,0xd2,0xab]
+ vfpclasspd $171, %ymm18, %k2 {%k7}
+# CHECK: vfpclasspdy $123, (%rcx), %k2
+# CHECK: encoding: [0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b]
+ vfpclasspdy $123, (%rcx), %k2
+# CHECK: vfpclasspdy $123, (%rcx), %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0xfd,0x2f,0x66,0x11,0x7b]
+ vfpclasspdy $123, (%rcx), %k2 {%k7}
+# CHECK: vfpclasspd $123, (%rcx){1to4}, %k2
+# CHECK: encoding: [0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b]
+ vfpclasspd $123, (%rcx){1to4}, %k2
+# CHECK: vfpclasspd $123, (%rcx){1to4}, %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0xfd,0x3f,0x66,0x11,0x7b]
+ vfpclasspd $123, (%rcx){1to4}, %k2 {%k7}
+# CHECK: vfpclassps $171, %ymm18, %k2
+# CHECK: encoding: [0x62,0xb3,0x7d,0x28,0x66,0xd2,0xab]
+ vfpclassps $171, %ymm18, %k2
+# CHECK: vfpclassps $171, %ymm18, %k2 {%k7}
+# CHECK: encoding: [0x62,0xb3,0x7d,0x2f,0x66,0xd2,0xab]
+ vfpclassps $171, %ymm18, %k2 {%k7}
+# CHECK: vfpclasspsy $123, (%rcx), %k2
+# CHECK: encoding: [0x62,0xf3,0x7d,0x28,0x66,0x11,0x7b]
+ vfpclasspsy $123, (%rcx), %k2
+# CHECK: vfpclasspsy $123, (%rcx), %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0x7d,0x2f,0x66,0x11,0x7b]
+ vfpclasspsy $123, (%rcx), %k2 {%k7}
+# CHECK: vfpclassps $123, (%rcx){1to8}, %k2
+# CHECK: encoding: [0x62,0xf3,0x7d,0x38,0x66,0x11,0x7b]
+ vfpclassps $123, (%rcx){1to8}, %k2
+# CHECK: vfpclassps $123, (%rcx){1to8}, %k2 {%k7}
+# CHECK: encoding: [0x62,0xf3,0x7d,0x3f,0x66,0x11,0x7b]
+ vfpclassps $123, (%rcx){1to8}, %k2 {%k7}
diff --git a/llvm/test/MC/X86/avx512dq_vl-intel.s b/llvm/test/MC/X86/avx512dq_vl-intel.s
new file mode 100644
index 0000000000000..6604e1344fac9
--- /dev/null
+++ b/llvm/test/MC/X86/avx512dq_vl-intel.s
@@ -0,0 +1,146 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
+ vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
+ vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
+ vcvtps2qq xmm2, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
+ vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
+ vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
+ vcvttps2qq xmm1, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
+ vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
+ vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
+ vcvtps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
+ vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
+ vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
+ vcvttps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
+ vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
+ vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
+ vcvtps2qq xmm2, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
+ vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
+ vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
+ vcvttps2qq xmm1, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
+ vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
+ vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
+ vcvtps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
+ vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
+ vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
+# CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
+ vcvttps2uqq xmm1, qword ptr [rcx + 128]
+# CHECK: vfpclasspd k2, xmm18, 171
+# CHECK: encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab]
+ vfpclasspd k2, xmm18, 171
+# CHECK: vfpclasspd k2 {k7}, xmm18, 171
+# CHECK: encoding: [0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab]
+ vfpclasspd k2 {k7}, xmm18, 171
+# CHECK: vfpclasspd k2, xmmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b]
+ vfpclasspd k2, xmmword ptr [rcx], 123
+# CHECK: vfpclasspd k2 {k7}, xmmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x0f,0x66,0x11,0x7b]
+ vfpclasspd k2 {k7}, xmmword ptr [rcx], 123
+# CHECK: vfpclasspd k2, qword ptr [rcx]{1to2}, 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b]
+ vfpclasspd k2, qword ptr [rcx]{1to2}, 123
+# CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x1f,0x66,0x11,0x7b]
+ vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 123
+# CHECK: vfpclassps k2, xmm18, 171
+# CHECK: encoding: [0x62,0xb3,0x7d,0x08,0x66,0xd2,0xab]
+ vfpclassps k2, xmm18, 171
+# CHECK: vfpclassps k2 {k7}, xmm18, 171
+# CHECK: encoding: [0x62,0xb3,0x7d,0x0f,0x66,0xd2,0xab]
+ vfpclassps k2 {k7}, xmm18, 171
+# CHECK: vfpclassps k2, xmmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x08,0x66,0x11,0x7b]
+ vfpclassps k2, xmmword ptr [rcx], 123
+# CHECK: vfpclassps k2 {k7}, xmmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x0f,0x66,0x11,0x7b]
+ vfpclassps k2 {k7}, xmmword ptr [rcx], 123
+# CHECK: vfpclassps k2, dword ptr [rcx]{1to4}, 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x18,0x66,0x11,0x7b]
+ vfpclassps k2, dword ptr [rcx]{1to4}, 123
+# CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x1f,0x66,0x11,0x7b]
+ vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 123
+# CHECK: vfpclasspd k2, ymm18, 171
+# CHECK: encoding: [0x62,0xb3,0xfd,0x28,0x66,0xd2,0xab]
+ vfpclasspd k2, ymm18, 171
+# CHECK: vfpclasspd k2 {k7}, ymm18, 171
+# CHECK: encoding: [0x62,0xb3,0xfd,0x2f,0x66,0xd2,0xab]
+ vfpclasspd k2 {k7}, ymm18, 171
+# CHECK: vfpclasspd k2, ymmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b]
+ vfpclasspd k2, ymmword ptr [rcx], 123
+# CHECK: vfpclasspd k2 {k7}, ymmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x2f,0x66,0x11,0x7b]
+ vfpclasspd k2 {k7}, ymmword ptr [rcx], 123
+# CHECK: vfpclasspd k2, qword ptr [rcx]{1to4}, 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b]
+ vfpclasspd k2, qword ptr [rcx]{1to4}, 123
+# CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 123
+# CHECK: encoding: [0x62,0xf3,0xfd,0x3f,0x66,0x11,0x7b]
+ vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 123
+# CHECK: vfpclassps k2, ymm18, 171
+# CHECK: encoding: [0x62,0xb3,0x7d,0x28,0x66,0xd2,0xab]
+ vfpclassps k2, ymm18, 171
+# CHECK: vfpclassps k2 {k7}, ymm18, 171
+# CHECK: encoding: [0x62,0xb3,0x7d,0x2f,0x66,0xd2,0xab]
+ vfpclassps k2 {k7}, ymm18, 171
+# CHECK: vfpclassps k2, ymmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x28,0x66,0x11,0x7b]
+ vfpclassps k2, ymmword ptr [rcx], 123
+# CHECK: vfpclassps k2 {k7}, ymmword ptr [rcx], 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x2f,0x66,0x11,0x7b]
+ vfpclassps k2 {k7}, ymmword ptr [rcx], 123
+# CHECK: vfpclassps k2, dword ptr [rcx]{1to8}, 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x38,0x66,0x11,0x7b]
+ vfpclassps k2, dword ptr [rcx]{1to8}, 123
+# CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 123
+# CHECK: encoding: [0x62,0xf3,0x7d,0x3f,0x66,0x11,0x7b]
+ vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 123
diff --git a/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s b/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s
deleted file mode 100644
index e2d6850623a98..0000000000000
--- a/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s
+++ /dev/null
@@ -1,193 +0,0 @@
-// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-
-// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
- vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
- vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
- vcvtps2qq xmm2, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
- vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
- vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
- vcvttps2qq xmm1, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
- vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-
-// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
- vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-
-// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
- vcvtps2uqq xmm1, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
- vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
- vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
- vcvttps2uqq xmm1, qword ptr [rcx + 128]
-
-// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
- vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
- vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
- vcvtps2qq xmm2, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
- vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
- vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80]
-
-// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
- vcvttps2qq xmm1, qword ptr [rcx + 0x80]
-
-// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
- vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-
-// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
- vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-
-// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
- vcvtps2uqq xmm1, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
- vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
- vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
-
-// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
-// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
- vcvttps2uqq xmm1, qword ptr [rcx + 128]
-
-// CHECK: vfpclasspd k2, xmm18, 171
-// CHECK: encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab]
- vfpclasspd k2, xmm18, 0xab
-
-// CHECK: vfpclasspd k2 {k7}, xmm18, 171
-// CHECK: encoding: [0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab]
- vfpclasspd k2 {k7}, xmm18, 0xab
-
-// CHECK: vfpclasspd k2, xmmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b]
- vfpclasspd k2, xmmword ptr [rcx], 0x7b
-
-// CHECK: vfpclasspd k2 {k7}, xmmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x0f,0x66,0x11,0x7b]
- vfpclasspd k2 {k7}, xmmword ptr [rcx], 0x7b
-
-// CHECK: vfpclasspd k2, qword ptr [rcx]{1to2}, 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b]
- vfpclasspd k2, qword ptr [rcx]{1to2}, 0x7b
-
-// CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x1f,0x66,0x11,0x7b]
- vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 0x7b
-
-// CHECK: vfpclassps k2, xmm18, 171
-// CHECK: encoding: [0x62,0xb3,0x7d,0x08,0x66,0xd2,0xab]
- vfpclassps k2, xmm18, 0xab
-
-// CHECK: vfpclassps k2 {k7}, xmm18, 171
-// CHECK: encoding: [0x62,0xb3,0x7d,0x0f,0x66,0xd2,0xab]
- vfpclassps k2 {k7}, xmm18, 0xab
-
-// CHECK: vfpclassps k2, xmmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x08,0x66,0x11,0x7b]
- vfpclassps k2, xmmword ptr [rcx], 0x7b
-
-// CHECK: vfpclassps k2 {k7}, xmmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x0f,0x66,0x11,0x7b]
- vfpclassps k2 {k7}, xmmword ptr [rcx], 0x7b
-
-// CHECK: vfpclassps k2, dword ptr [rcx]{1to4}, 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x18,0x66,0x11,0x7b]
- vfpclassps k2, dword ptr [rcx]{1to4}, 0x7b
-
-// CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x1f,0x66,0x11,0x7b]
- vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 0x7b
-
-// CHECK: vfpclasspd k2, ymm18, 171
-// CHECK: encoding: [0x62,0xb3,0xfd,0x28,0x66,0xd2,0xab]
- vfpclasspd k2, ymm18, 0xab
-
-// CHECK: vfpclasspd k2 {k7}, ymm18, 171
-// CHECK: encoding: [0x62,0xb3,0xfd,0x2f,0x66,0xd2,0xab]
- vfpclasspd k2 {k7}, ymm18, 0xab
-
-// CHECK: vfpclasspd k2, ymmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b]
- vfpclasspd k2, ymmword ptr [rcx], 0x7b
-
-// CHECK: vfpclasspd k2 {k7}, ymmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x2f,0x66,0x11,0x7b]
- vfpclasspd k2 {k7}, ymmword ptr [rcx], 0x7b
-
-// CHECK: vfpclasspd k2, qword ptr [rcx]{1to4}, 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b]
- vfpclasspd k2, qword ptr [rcx]{1to4}, 0x7b
-
-// CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 123
-// CHECK: encoding: [0x62,0xf3,0xfd,0x3f,0x66,0x11,0x7b]
- vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 0x7b
-
-// CHECK: vfpclassps k2, ymm18, 171
-// CHECK: encoding: [0x62,0xb3,0x7d,0x28,0x66,0xd2,0xab]
- vfpclassps k2, ymm18, 0xab
-
-// CHECK: vfpclassps k2 {k7}, ymm18, 171
-// CHECK: encoding: [0x62,0xb3,0x7d,0x2f,0x66,0xd2,0xab]
- vfpclassps k2 {k7}, ymm18, 0xab
-
-// CHECK: vfpclassps k2, ymmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x28,0x66,0x11,0x7b]
- vfpclassps k2, ymmword ptr [rcx], 0x7b
-
-// CHECK: vfpclassps k2 {k7}, ymmword ptr [rcx], 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x2f,0x66,0x11,0x7b]
- vfpclassps k2 {k7}, ymmword ptr [rcx], 0x7b
-
-// CHECK: vfpclassps k2, dword ptr [rcx]{1to8}, 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x38,0x66,0x11,0x7b]
- vfpclassps k2, dword ptr [rcx]{1to8}, 0x7b
-
-// CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 123
-// CHECK: encoding: [0x62,0xf3,0x7d,0x3f,0x66,0x11,0x7b]
- vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 0x7b
More information about the llvm-commits
mailing list