[llvm] [LLVM] Make use of s_flbit_i32_b64 and s_ff1_i32_b64 (PR #75158)
Thomas Symalla via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 10:34:22 PST 2023
================
@@ -7834,6 +7843,56 @@ void SIInstrInfo::splitScalar64BitBFE(SIInstrWorklist &Worklist,
addUsersToMoveToVALUWorklist(ResultReg, MRI, Worklist);
}
+void SIInstrInfo::splitScalar64BitCountOp(SIInstrWorklist &Worklist,
+ MachineInstr &Instr, unsigned Opcode,
+ MachineDominatorTree *MDT) const {
+ MachineBasicBlock &MBB = *Instr.getParent();
+ MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
+
+ MachineBasicBlock::iterator MII = Instr;
+ const DebugLoc &DL = Instr.getDebugLoc();
+
+ MachineOperand &Dest = Instr.getOperand(0);
+ MachineOperand &Src = Instr.getOperand(1);
+
+ const MCInstrDesc &InstDesc = get(Opcode);
+ bool isCtlz = Opcode == AMDGPU::S_FLBIT_I32_B32;
----------------
tsymalla wrote:
Should start with capital `I` (`IsCtlz`)
https://github.com/llvm/llvm-project/pull/75158
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