[llvm] 23d0a30 - [CVP] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 02:26:09 PST 2023
Author: Nikita Popov
Date: 2023-12-12T11:26:00+01:00
New Revision: 23d0a3044cdb6a6b543a58bb9278f62a1c9810db
URL: https://github.com/llvm/llvm-project/commit/23d0a3044cdb6a6b543a58bb9278f62a1c9810db
DIFF: https://github.com/llvm/llvm-project/commit/23d0a3044cdb6a6b543a58bb9278f62a1c9810db.diff
LOG: [CVP] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/CorrelatedValuePropagation/add.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/add.ll b/llvm/test/Transforms/CorrelatedValuePropagation/add.ll
index 9ddb7dace104ea..d2b543168253a4 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/add.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/add.ll
@@ -1,13 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
-; CHECK-LABEL: @test0(
define void @test0(i32 %a) {
+; CHECK-LABEL: define void @test0(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 100
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp slt i32 %a, 100
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -15,14 +25,23 @@ exit:
ret void
}
-; CHECK-LABEL: @test1(
define void @test1(i32 %a) {
+; CHECK-LABEL: define void @test1(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], 100
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp ult i32 %a, 100
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nuw nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -30,14 +49,23 @@ exit:
ret void
}
-; CHECK-LABEL: @test2(
define void @test2(i32 %a) {
+; CHECK-LABEL: define void @test2(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A]], -1
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp ult i32 %a, -1
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nuw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -45,14 +73,23 @@ exit:
ret void
}
-; CHECK-LABEL: @test3(
define void @test3(i32 %a) {
+; CHECK-LABEL: define void @test3(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[A]], -1
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp ule i32 %a, -1
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -60,14 +97,23 @@ exit:
ret void
}
-; CHECK-LABEL: @test4(
define void @test4(i32 %a) {
+; CHECK-LABEL: define void @test4(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 2147483647
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp slt i32 %a, 2147483647
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -75,14 +121,23 @@ exit:
ret void
}
-; CHECK-LABEL: @test5(
define void @test5(i32 %a) {
+; CHECK-LABEL: define void @test5(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[A]], 2147483647
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp = icmp sle i32 %a, 2147483647
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -95,6 +150,12 @@ exit:
; assertion in this case.
@b = global i32 0, align 4
define void @test6(i32 %a) {
+; CHECK-LABEL: define void @test6(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], ptrtoint (ptr @b to i32)
+; CHECK-NEXT: ret void
+;
bb:
%add = add i32 %a, ptrtoint (ptr @b to i32)
ret void
@@ -102,15 +163,25 @@ bb:
; Check that we can gather information for conditions is the form of
; and ( i s< 100, Unknown )
-; CHECK-LABEL: @test7(
define void @test7(i32 %a, i1 %flag) {
+; CHECK-LABEL: define void @test7(
+; CHECK-SAME: i32 [[A:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A]], 100
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp slt i32 %a, 100
%cmp = and i1 %cmp.1, %flag
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -120,8 +191,20 @@ exit:
; Check that we can gather information for conditions is the form of
; and ( i s< 100, i s> 0 )
-; CHECK-LABEL: @test8(
define void @test8(i32 %a) {
+; CHECK-LABEL: define void @test8(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp slt i32 %a, 100
%cmp.2 = icmp sgt i32 %a, 0
@@ -129,7 +212,6 @@ entry:
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nuw nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -139,8 +221,20 @@ exit:
; Check that for conditions is the form of cond1 && cond2 we don't mistakenly
; assume that !cond1 && !cond2 holds down to false path.
-; CHECK-LABEL: @test8_neg(
define void @test8_neg(i32 %a) {
+; CHECK-LABEL: define void @test8_neg(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp sge i32 %a, 100
%cmp.2 = icmp sle i32 %a, 0
@@ -148,7 +242,6 @@ entry:
br i1 %cmp, label %exit, label %bb
bb:
-; CHECK: %add = add i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -158,8 +251,21 @@ exit:
; Check that we can gather information for conditions is the form of
; and ( i s< 100, and (i s> 0, Unknown )
-; CHECK-LABEL: @test9(
define void @test9(i32 %a, i1 %flag) {
+; CHECK-LABEL: define void @test9(
+; CHECK-SAME: i32 [[A:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
+; CHECK-NEXT: [[CMP_3:%.*]] = and i1 [[CMP_2]], [[FLAG]]
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_3]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp slt i32 %a, 100
%cmp.2 = icmp sgt i32 %a, 0
@@ -168,7 +274,6 @@ entry:
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nuw nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -178,15 +283,25 @@ exit:
; Check that we can gather information for conditions is the form of
; and ( i s< Unknown, ... )
-; CHECK-LABEL: @test10(
define void @test10(i32 %a, i32 %b, i1 %flag) {
+; CHECK-LABEL: define void @test10(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A]], [[B]]
+; CHECK-NEXT: [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp slt i32 %a, %b
%cmp = and i1 %cmp.1, %flag
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -195,8 +310,21 @@ exit:
}
@limit = external global i32
-; CHECK-LABEL: @test11(
define i32 @test11(ptr %p, i32 %i) {
+; CHECK-LABEL: define i32 @test11(
+; CHECK-SAME: ptr [[P:%.*]], i32 [[I:%.*]]) {
+; CHECK-NEXT: [[LIMIT:%.*]] = load i32, ptr [[P]], align 4, !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[WITHIN_1:%.*]] = icmp ugt i32 [[LIMIT]], [[I]]
+; CHECK-NEXT: [[I_PLUS_7:%.*]] = add i32 [[I]], 7
+; CHECK-NEXT: [[WITHIN_2:%.*]] = icmp ugt i32 [[LIMIT]], [[I_PLUS_7]]
+; CHECK-NEXT: [[WITHIN:%.*]] = and i1 [[WITHIN_1]], [[WITHIN_2]]
+; CHECK-NEXT: br i1 [[WITHIN]], label [[THEN:%.*]], label [[ELSE:%.*]]
+; CHECK: then:
+; CHECK-NEXT: [[I_PLUS_6:%.*]] = add nuw nsw i32 [[I]], 6
+; CHECK-NEXT: ret i32 [[I_PLUS_6]]
+; CHECK: else:
+; CHECK-NEXT: ret i32 0
+;
%limit = load i32, ptr %p, !range !{i32 0, i32 2147483647}
%within.1 = icmp ugt i32 %limit, %i
%i.plus.7 = add i32 %i, 7
@@ -205,7 +333,6 @@ define i32 @test11(ptr %p, i32 %i) {
br i1 %within, label %then, label %else
then:
-; CHECK: %i.plus.6 = add nuw nsw i32 %i, 6
%i.plus.6 = add i32 %i, 6
ret i32 %i.plus.6
@@ -215,15 +342,25 @@ else:
; Check that we can gather information for conditions is the form of
; or ( i s>= 100, Unknown )
-; CHECK-LABEL: @test12(
define void @test12(i32 %a, i1 %flag) {
+; CHECK-LABEL: define void @test12(
+; CHECK-SAME: i32 [[A:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A]], 100
+; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp sge i32 %a, 100
%cmp = or i1 %cmp.1, %flag
br i1 %cmp, label %exit, label %bb
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -233,8 +370,20 @@ exit:
; Check that we can gather information for conditions is the form of
; or ( i s>= 100, i s<= 0 )
-; CHECK-LABEL: @test13(
define void @test13(i32 %a) {
+; CHECK-LABEL: define void @test13(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
+; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp sge i32 %a, 100
%cmp.2 = icmp sle i32 %a, 0
@@ -242,7 +391,6 @@ entry:
br i1 %cmp, label %exit, label %bb
bb:
-; CHECK: %add = add nuw nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -252,8 +400,20 @@ exit:
; Check that for conditions is the form of cond1 || cond2 we don't mistakenly
; assume that cond1 || cond2 holds down to true path.
-; CHECK-LABEL: @test13_neg(
define void @test13_neg(i32 %a) {
+; CHECK-LABEL: define void @test13_neg(
+; CHECK-SAME: i32 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp slt i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
+; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
+; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp slt i32 %a, 100
%cmp.2 = icmp sgt i32 %a, 0
@@ -261,7 +421,6 @@ entry:
br i1 %cmp, label %bb, label %exit
bb:
-; CHECK: %add = add i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -271,8 +430,21 @@ exit:
; Check that we can gather information for conditions is the form of
; or ( i s>=100, or (i s<= 0, Unknown )
-; CHECK-LABEL: @test14(
define void @test14(i32 %a, i1 %flag) {
+; CHECK-LABEL: define void @test14(
+; CHECK-SAME: i32 [[A:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A]], 100
+; CHECK-NEXT: [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
+; CHECK-NEXT: [[CMP_3:%.*]] = or i1 [[CMP_2]], [[FLAG]]
+; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_3]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp sge i32 %a, 100
%cmp.2 = icmp sle i32 %a, 0
@@ -281,7 +453,6 @@ entry:
br i1 %cmp, label %exit, label %bb
bb:
-; CHECK: %add = add nuw nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -291,15 +462,25 @@ exit:
; Check that we can gather information for conditions is the form of
; or ( i s>= Unknown, ... )
-; CHECK-LABEL: @test15(
define void @test15(i32 %a, i32 %b, i1 %flag) {
+; CHECK-LABEL: define void @test15(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i1 [[FLAG:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_1:%.*]] = icmp sge i32 [[A]], [[B]]
+; CHECK-NEXT: [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
+; CHECK: bb:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
%cmp.1 = icmp sge i32 %a, %b
%cmp = or i1 %cmp.1, %flag
br i1 %cmp, label %exit, label %bb
bb:
-; CHECK: %add = add nsw i32 %a, 1
%add = add i32 %a, 1
br label %exit
@@ -310,13 +491,28 @@ exit:
; single basic block loop
; because the loop exit condition is SLT, we can supplement the iv add
; (iv.next def) with an nsw.
-; CHECK-LABEL: @test16(
define i32 @test16(ptr %n, ptr %a) {
+; CHECK-LABEL: define i32 @test16(
+; CHECK-SAME: ptr [[N:%.*]], ptr [[A:%.*]]) {
+; CHECK-NEXT: preheader:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[ACC_CURR:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr [[A]] unordered, align 8
+; CHECK-NEXT: fence acquire
+; CHECK-NEXT: [[ACC_CURR]] = add i32 [[ACC]], [[X]]
+; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
+; CHECK-NEXT: [[NVAL:%.*]] = load atomic i32, ptr [[N]] unordered, align 8
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[IV_NEXT]], [[NVAL]]
+; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 [[ACC_CURR]]
+;
preheader:
br label %loop
loop:
-; CHECK: %iv.next = add nsw i32 %iv, 1
%iv = phi i32 [ 0, %preheader ], [ %iv.next, %loop ]
%acc = phi i32 [ 0, %preheader ], [ %acc.curr, %loop ]
%x = load atomic i32, ptr %a unordered, align 8
@@ -330,3 +526,7 @@ loop:
exit:
ret i32 %acc.curr
}
+
+;.
+; CHECK: [[RNG0]] = !{i32 0, i32 2147483647}
+;.
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