[compiler-rt] [llvm] [X86] Add CPU detection for more znver2 CPUs (PR #74955)

[Aiden Grossman via llvm-commits]

https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/74955

>From 44d0e0adab93d5d29264fc74f8f23a29e3eb1544 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <agrossman154 at yahoo.com>
Date: Sat, 9 Dec 2023 16:26:36 -0800
Subject: [PATCH 1/2] [X86] Add detection for more znver2 CPUs

This patch adds proper detection support for more znver2 CPUs.

Specifically, this adds in support for CPUs codenamed Renoir, Lucienne,
and Mendocino.

This was originally proposedfor Renoir  in https://reviews.llvm.org/D96220 and
got approved, but slipped through the cracks. However, there is still a
demand for this feature.

Fixes https://github.com/llvm/llvm-project/issues/74934.
---
 compiler-rt/lib/builtins/cpu_model.c | 10 ++++++++--
 llvm/lib/TargetParser/Host.cpp       | 10 ++++++++--
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
index b0ec5e51e96d49..55e286f07d7f3e 100644
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -667,10 +667,16 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
   case 23:
     CPU = "znver1";
     *Type = AMDFAM17H;
-    if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
+    if (Model == 0x31 || Model == 0x60 || Model == 0x68 || Model == 0x71 ||
+        (Model >= 0xA0 && Model <= 0XAf)) {
+      // Family 17h model 31h - Zen2 Rome/Castle Peak
+      // Family 17h model 60h - Zen2 Renoir
+      // Family 17h model 68h - Zen2 Lucienne
+      // Family 17h model 71h - Zen2 Matisse
+      // Family 17h models A0h-Afh - Zen2 Mendocino
       CPU = "znver2";
       *Subtype = AMDFAM17H_ZNVER2;
-      break; // 30h-3fh, 71h: Zen2
+      break; // 30h-3fh, 60h, 71h: Zen2
     }
     if (Model <= 0x0f) {
       *Subtype = AMDFAM17H_ZNVER1;
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 40f4ba0be5503a..16658765e3dff2 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1131,10 +1131,16 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
   case 23:
     CPU = "znver1";
     *Type = X86::AMDFAM17H;
-    if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
+    if (Model == 0x31 || Model == 0x60 || Model == 0x68 || Model == 0x71 ||
+        (Model >= 0xA0 && Model <= 0XAf)) {
+      // Family 17h model 31h - Zen2 Rome/Castle Peak
+      // Family 17h model 60h - Zen2 Renoir
+      // Family 17h model 68h - Zen2 Lucienne
+      // Family 17h model 71h - Zen2 Matisse
+      // Family 17h models A0h-Afh - Zen2 Mendocino
       CPU = "znver2";
       *Subtype = X86::AMDFAM17H_ZNVER2;
-      break; // 30h-3fh, 71h: Zen2
+      break;
     }
     if (Model <= 0x0f) {
       *Subtype = X86::AMDFAM17H_ZNVER1;

>From ae76073d57102bb276d2fc2e23c0ae1f237b3962 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <agrossman154 at yahoo.com>
Date: Mon, 11 Dec 2023 19:05:41 -0800
Subject: [PATCH 2/2] Remove moved comment

---
 compiler-rt/lib/builtins/cpu_model.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/compiler-rt/lib/builtins/cpu_model.c b/compiler-rt/lib/builtins/cpu_model.c
index 55e286f07d7f3e..bad264210b2668 100644
--- a/compiler-rt/lib/builtins/cpu_model.c
+++ b/compiler-rt/lib/builtins/cpu_model.c
@@ -676,7 +676,7 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
       // Family 17h models A0h-Afh - Zen2 Mendocino
       CPU = "znver2";
       *Subtype = AMDFAM17H_ZNVER2;
-      break; // 30h-3fh, 60h, 71h: Zen2
+      break;
     }
     if (Model <= 0x0f) {
       *Subtype = AMDFAM17H_ZNVER1;