[llvm] [VPlan] Add a test for testing unused interleave recipes (PR #75026)

[Shih-Po Hung via llvm-commits]

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@@ -0,0 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
+; RUN: opt -passes=loop-vectorize -S -force-vector-width=4 -enable-interleaved-mem-accesses=true -debug-only=loop-vectorize < %s 2>&1 | FileCheck %s
+
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arcbbb wrote:

Fixed. Thanks for the reminding!

https://github.com/llvm/llvm-project/pull/75026