[llvm] [RISCV][GlobalISel] Legalize G_ADD, G_SUB, G_AND, G_OR, G_XOR on RISC-V Vector Extension (PR #71400)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,213 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+zve32x -run-pass=legalizer %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+zve32x -run-pass=legalizer %s -o - | FileCheck %s
+---
+name:  test_nxv2s8
+body:   |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_nxv2s8
+    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v9
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 2 x s8>) = G_ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 2 x s8>)
+    %0:_(<vscale x 2 x s8>) = COPY $v8
+    %1:_(<vscale x 2 x s8>) = COPY $v9
+    %2:_(<vscale x 2 x s8>) = G_ADD %0, %1
+    PseudoRET implicit %2
+...
+---
+name:  test_nxv4s8
+body:   |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_nxv4s8
+    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v9
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 4 x s8>) = G_ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 4 x s8>)
+    %0:_(<vscale x 4 x s8>) = COPY $v8
+    %1:_(<vscale x 4 x s8>) = COPY $v9
+    %2:_(<vscale x 4 x s8>) = G_ADD %0, %1
+    PseudoRET implicit %2
+...
+---
+name:  test_nxv8s8
+body:   |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_nxv8s8
+    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v8
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v9
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 8 x s8>) = G_ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 8 x s8>)
+    %0:_(<vscale x 8 x s8>) = COPY $v8
+    %1:_(<vscale x 8 x s8>) = COPY $v9
+    %2:_(<vscale x 8 x s8>) = G_ADD %0, %1
+    PseudoRET implicit %2
+...
+---
+name:  test_nxv16s8
+body:   |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_nxv16s8
+    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v9
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 16 x s8>) = G_ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 16 x s8>)
+    %0:_(<vscale x 16 x s8>) = COPY $v8
----------------
topperc wrote:

For LMUL=8 you should use $v8m8 and $v16m8.

I recommend writing an IR test for all types for one opcode and use `llc -global-isel -stop-before=legalizer -simplify-mir` to get a correct MIR file. You'll need to do some additional cleanup, but it will generate a good starting point.

https://github.com/llvm/llvm-project/pull/71400