[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)

[Craig Topper via llvm-commits]

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@@ -100,6 +100,10 @@ static cl::opt<bool> EnableMISchedLoadClustering(
     cl::desc("Enable load clustering in the machine scheduler"),
     cl::init(false));
 
+static cl::opt<bool> EnableVSETVLIAfterRVVRegAlloc(
+    "riscv-vsetvli-after-rvv-regalloc", cl::Hidden,
+    cl::desc("vsetvl insertion after rvv regalloc"), cl::init(true));
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topperc wrote:

Should we split this into 2 patches. One where this defaults to false with some directed tests that set it to true on the command line. Then a second patch that changes the default?

https://github.com/llvm/llvm-project/pull/70549