[llvm] [X86][MC] Support Enc/Dec for EGPR for promoted MOVDIR instruction (PR #74713)

[Phoebe Wang via llvm-commits]

================
@@ -0,0 +1,10 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT:   movdir64b	291(%r28d,%r29d,4), %r18d
+# INTEL: movdir64b	r18d, zmmword ptr [r28d + 4*r29d + 291]
+0x67,0x62,0x8c,0x79,0x08,0xf8,0x94,0xac,0x23,0x01,0x00,0x00
----------------
phoebewang wrote:

I don't understand why `ATTR_ADSIZE` only matters to this instruction.
I think either all APX instructions need special handling for address size override prefix or nothing to do here.

I also compared with existing instruction that has `ATTR_EVEX` and `ATTR_OPSIZE`, e.g.,
```
EVEX.128.66.0F.W0 78 /r VCVTTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst
```
We can decode correctly w/ and w/o address size override prefix without define a IC_EVEX_OPSIZE_ADSIZE, e.g.,
```
$ echo '0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10' | llvm-mc --show-encoding --disassemble
        .text
        vcvttps2uqq     128(%rcx), %xmm1 {%k2}  # encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
$ echo '0x67,0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10' | llvm-mc --show-encoding --disassemble
        .text
        vcvttps2uqq     128(%ecx), %xmm1 {%k2}  # encoding: [0x67,0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
```

Does it still work with this patch?

https://github.com/llvm/llvm-project/pull/74713