[llvm] [GlobalISel][AArch64] Tail call libcalls. (PR #74929)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 9 04:03:29 PST 2023
https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/74929
I wrote this a little while ago, and recently managed to update it to hopefully fix mismatching return types, by checking they produce similar results. See the donttailcall test for example.
>From 3336eefdb1c4e81e3b2377deaef5bf7b4e7d4de0 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Fri, 8 Dec 2023 22:02:27 +0000
Subject: [PATCH] [GlobalISel][AArch64] Tail call libcalls.
I wrote this a little while ago, and recently updated it to hopefully fix
mismatching return types. Im not sure its perfect.
---
.../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 15 +-
.../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 5 +-
.../CodeGen/GlobalISel/LegalizerHelper.cpp | 142 ++++++++++++-----
.../AArch64/GISel/AArch64LegalizerInfo.cpp | 5 +-
.../AArch64/GISel/AArch64LegalizerInfo.h | 3 +-
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 5 +-
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 +-
llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 10 +-
llvm/lib/Target/ARM/ARMLegalizerInfo.h | 3 +-
llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 5 +-
llvm/lib/Target/Mips/MipsLegalizerInfo.h | 3 +-
.../Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 5 +-
.../Target/RISCV/GISel/RISCVLegalizerInfo.h | 3 +-
llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp | 5 +-
llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h | 3 +-
llvm/test/CodeGen/AArch64/fexplog.ll | 150 ++++--------------
llvm/test/CodeGen/AArch64/fpow.ll | 30 +---
llvm/test/CodeGen/AArch64/frem.ll | 30 +---
llvm/test/CodeGen/AArch64/fsincos.ll | 78 ++++-----
llvm/test/CodeGen/AArch64/llvm.exp10.ll | 30 +---
.../GlobalISel/LegalizerHelperTest.cpp | 4 +-
21 files changed, 228 insertions(+), 309 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
index 365d2223a81c1d..48f3d63ddb6489 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
@@ -288,11 +288,14 @@ class LegalizerHelper {
// Implements floating-point environment read/write via library function call.
LegalizeResult createGetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI);
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver);
LegalizeResult createSetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI);
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver);
LegalizeResult createResetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI);
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver);
public:
/// Return the alignment to use for a stack temporary object with the given
@@ -439,13 +442,15 @@ class LegalizerHelper {
LegalizerHelper::LegalizeResult
createLibcall(MachineIRBuilder &MIRBuilder, const char *Name,
const CallLowering::ArgInfo &Result,
- ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC);
+ ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC,
+ LostDebugLocObserver &LocObserver, MachineInstr *MI = nullptr);
/// Helper function that creates the given libcall.
LegalizerHelper::LegalizeResult
createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
const CallLowering::ArgInfo &Result,
- ArrayRef<CallLowering::ArgInfo> Args);
+ ArrayRef<CallLowering::ArgInfo> Args,
+ LostDebugLocObserver &LocObserver, MachineInstr *MI = nullptr);
/// Create a libcall to memcpy et al.
LegalizerHelper::LegalizeResult
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
index e51a3ec9400543..9880e82dd5e15e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
@@ -35,6 +35,7 @@ extern cl::opt<bool> DisableGISelLegalityCheck;
class MachineFunction;
class raw_ostream;
class LegalizerHelper;
+class LostDebugLocObserver;
class MachineInstr;
class MachineRegisterInfo;
class MCInstrInfo;
@@ -1288,8 +1289,8 @@ class LegalizerInfo {
const MachineRegisterInfo &MRI) const;
/// Called for instructions with the Custom LegalizationAction.
- virtual bool legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+ virtual bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
llvm_unreachable("must implement this if custom action is used");
}
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 045fc78218daef..e1f6da96d18b07 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -149,7 +149,8 @@ LegalizerHelper::legalizeInstrStep(MachineInstr &MI,
return moreElementsVector(MI, Step.TypeIdx, Step.NewType);
case Custom:
LLVM_DEBUG(dbgs() << ".. Custom legalization\n");
- return LI.legalizeCustom(*this, MI) ? Legalized : UnableToLegalize;
+ return LI.legalizeCustom(*this, MI, LocObserver) ? Legalized
+ : UnableToLegalize;
default:
LLVM_DEBUG(dbgs() << ".. Unable to legalize\n");
return UnableToLegalize;
@@ -565,9 +566,29 @@ static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) {
llvm_unreachable("Unknown libcall function");
}
+static bool isCompatibleForRetType(const CallLowering::ArgInfo &Result,
+ const MachineFunction *MF,
+ MachineRegisterInfo &MRI) {
+ auto &TLI = *MF->getSubtarget().getTargetLowering();
+ const Function &F = MF->getFunction();
+ const DataLayout &DL = MF->getDataLayout();
+ CallingConv::ID CC = F.getCallingConv();
+
+ // Check that the decomposed types are the same between function and the
+ // libcall.
+ SmallVector<ISD::OutputArg, 4> OutsFn;
+ GetReturnInfo(CC, F.getReturnType(), F.getAttributes(), OutsFn, TLI, DL);
+ SmallVector<ISD::OutputArg, 4> OutsLibcall;
+ GetReturnInfo(CC, Result.Ty, F.getAttributes(), OutsLibcall, TLI, DL);
+ return OutsFn.size() == OutsLibcall.size() &&
+ all_of(zip(OutsFn, OutsLibcall),
+ [](auto P) { return get<0>(P).VT == get<1>(P).VT; });
+}
+
/// True if an instruction is in tail position in its caller. Intended for
/// legalizing libcalls as tail calls when possible.
-static bool isLibCallInTailPosition(MachineInstr &MI,
+static bool isLibCallInTailPosition(const CallLowering::ArgInfo &Result,
+ MachineInstr &MI,
const TargetInstrInfo &TII,
MachineRegisterInfo &MRI) {
MachineBasicBlock &MBB = *MI.getParent();
@@ -588,6 +609,11 @@ static bool isLibCallInTailPosition(MachineInstr &MI,
CallerAttrs.hasRetAttr(Attribute::SExt))
return false;
+ if (MI.getOpcode() == TargetOpcode::G_GET_FPMODE ||
+ MI.getOpcode() == TargetOpcode::G_SET_FPMODE ||
+ MI.getOpcode() == TargetOpcode::G_RESET_FPMODE)
+ return false;
+
// Only tail call if the following instruction is a standard return or if we
// have a `thisreturn` callee, and a sequence like:
//
@@ -596,23 +622,19 @@ static bool isLibCallInTailPosition(MachineInstr &MI,
// RET_ReallyLR implicit $x0
auto Next = next_nodbg(MI.getIterator(), MBB.instr_end());
if (Next != MBB.instr_end() && Next->isCopy()) {
- switch (MI.getOpcode()) {
- default:
- llvm_unreachable("unsupported opcode");
- case TargetOpcode::G_BZERO:
+ if (MI.getOpcode() == TargetOpcode::G_BZERO)
return false;
- case TargetOpcode::G_MEMCPY:
- case TargetOpcode::G_MEMMOVE:
- case TargetOpcode::G_MEMSET:
- break;
- }
+ // For MEMCPY/MOMMOVE/MEMSET these will be the first use (the dst), as the
+ // mempy/etc routines return the same parameter. For other it will be the
+ // returned value.
Register VReg = MI.getOperand(0).getReg();
if (!VReg.isVirtual() || VReg != Next->getOperand(1).getReg())
return false;
Register PReg = Next->getOperand(0).getReg();
- if (!PReg.isPhysical())
+ if (!PReg.isPhysical() ||
+ !isCompatibleForRetType(Result, MBB.getParent(), MRI))
return false;
auto Ret = next_nodbg(Next, MBB.instr_end());
@@ -622,7 +644,7 @@ static bool isLibCallInTailPosition(MachineInstr &MI,
if (Ret->getNumImplicitOperands() != 1)
return false;
- if (PReg != Ret->getOperand(0).getReg())
+ if (!Ret->getOperand(0).isReg() || PReg != Ret->getOperand(0).getReg())
return false;
// Skip over the COPY that we just validated.
@@ -639,34 +661,61 @@ LegalizerHelper::LegalizeResult
llvm::createLibcall(MachineIRBuilder &MIRBuilder, const char *Name,
const CallLowering::ArgInfo &Result,
ArrayRef<CallLowering::ArgInfo> Args,
- const CallingConv::ID CC) {
+ const CallingConv::ID CC, LostDebugLocObserver &LocObserver,
+ MachineInstr *MI) {
auto &CLI = *MIRBuilder.getMF().getSubtarget().getCallLowering();
CallLowering::CallLoweringInfo Info;
Info.CallConv = CC;
Info.Callee = MachineOperand::CreateES(Name);
Info.OrigRet = Result;
+ if (MI)
+ Info.IsTailCall = isLibCallInTailPosition(Result, *MI, MIRBuilder.getTII(),
+ *MIRBuilder.getMRI());
+
std::copy(Args.begin(), Args.end(), std::back_inserter(Info.OrigArgs));
if (!CLI.lowerCall(MIRBuilder, Info))
return LegalizerHelper::UnableToLegalize;
+ if (MI && Info.LoweredTailCall) {
+ assert(Info.IsTailCall && "Lowered tail call when it wasn't a tail call?");
+
+ // Check debug locations before removing the return.
+ LocObserver.checkpoint(true);
+
+ // We must have a return following the call (or debug insts) to get past
+ // isLibCallInTailPosition.
+ do {
+ MachineInstr *Next = MI->getNextNode();
+ assert(Next &&
+ (Next->isCopy() || Next->isReturn() || Next->isDebugInstr()) &&
+ "Expected instr following MI to be return or debug inst?");
+ // We lowered a tail call, so the call is now the return from the block.
+ // Delete the old return.
+ Next->eraseFromParent();
+ } while (MI->getNextNode());
+
+ // We expect to lose the debug location from the return.
+ LocObserver.checkpoint(false);
+ }
return LegalizerHelper::Legalized;
}
LegalizerHelper::LegalizeResult
llvm::createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
const CallLowering::ArgInfo &Result,
- ArrayRef<CallLowering::ArgInfo> Args) {
+ ArrayRef<CallLowering::ArgInfo> Args,
+ LostDebugLocObserver &LocObserver, MachineInstr *MI) {
auto &TLI = *MIRBuilder.getMF().getSubtarget().getTargetLowering();
const char *Name = TLI.getLibcallName(Libcall);
const CallingConv::ID CC = TLI.getLibcallCallingConv(Libcall);
- return createLibcall(MIRBuilder, Name, Result, Args, CC);
+ return createLibcall(MIRBuilder, Name, Result, Args, CC, LocObserver, MI);
}
// Useful for libcalls where all operands have the same type.
static LegalizerHelper::LegalizeResult
simpleLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size,
- Type *OpType) {
+ Type *OpType, LostDebugLocObserver &LocObserver) {
auto Libcall = getRTLibDesc(MI.getOpcode(), Size);
// FIXME: What does the original arg index mean here?
@@ -674,7 +723,8 @@ simpleLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size,
for (const MachineOperand &MO : llvm::drop_begin(MI.operands()))
Args.push_back({MO.getReg(), OpType, 0});
return createLibcall(MIRBuilder, Libcall,
- {MI.getOperand(0).getReg(), OpType, 0}, Args);
+ {MI.getOperand(0).getReg(), OpType, 0}, Args,
+ LocObserver, &MI);
}
LegalizerHelper::LegalizeResult
@@ -733,8 +783,9 @@ llvm::createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
Info.CallConv = TLI.getLibcallCallingConv(RTLibcall);
Info.Callee = MachineOperand::CreateES(Name);
Info.OrigRet = CallLowering::ArgInfo({0}, Type::getVoidTy(Ctx), 0);
- Info.IsTailCall = MI.getOperand(MI.getNumOperands() - 1).getImm() &&
- isLibCallInTailPosition(MI, MIRBuilder.getTII(), MRI);
+ Info.IsTailCall =
+ MI.getOperand(MI.getNumOperands() - 1).getImm() &&
+ isLibCallInTailPosition(Info.OrigRet, MI, MIRBuilder.getTII(), MRI);
std::copy(Args.begin(), Args.end(), std::back_inserter(Info.OrigArgs));
if (!CLI.lowerCall(MIRBuilder, Info))
@@ -789,11 +840,11 @@ static RTLIB::Libcall getConvRTLibDesc(unsigned Opcode, Type *ToType,
static LegalizerHelper::LegalizeResult
conversionLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, Type *ToType,
- Type *FromType) {
+ Type *FromType, LostDebugLocObserver &LocObserver) {
RTLIB::Libcall Libcall = getConvRTLibDesc(MI.getOpcode(), ToType, FromType);
- return createLibcall(MIRBuilder, Libcall,
- {MI.getOperand(0).getReg(), ToType, 0},
- {{MI.getOperand(1).getReg(), FromType, 0}});
+ return createLibcall(
+ MIRBuilder, Libcall, {MI.getOperand(0).getReg(), ToType, 0},
+ {{MI.getOperand(1).getReg(), FromType, 0}}, LocObserver, &MI);
}
static RTLIB::Libcall
@@ -829,7 +880,8 @@ getStateLibraryFunctionFor(MachineInstr &MI, const TargetLowering &TLI) {
//
LegalizerHelper::LegalizeResult
LegalizerHelper::createGetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI) {
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) {
const DataLayout &DL = MIRBuilder.getDataLayout();
auto &MF = MIRBuilder.getMF();
auto &MRI = *MIRBuilder.getMRI();
@@ -847,10 +899,10 @@ LegalizerHelper::createGetStateLibcall(MachineIRBuilder &MIRBuilder,
unsigned TempAddrSpace = DL.getAllocaAddrSpace();
Type *StatePtrTy = PointerType::get(Ctx, TempAddrSpace);
RTLIB::Libcall RTLibcall = getStateLibraryFunctionFor(MI, TLI);
- auto Res =
- createLibcall(MIRBuilder, RTLibcall,
- CallLowering::ArgInfo({0}, Type::getVoidTy(Ctx), 0),
- CallLowering::ArgInfo({Temp.getReg(0), StatePtrTy, 0}));
+ auto Res = createLibcall(
+ MIRBuilder, RTLibcall,
+ CallLowering::ArgInfo({0}, Type::getVoidTy(Ctx), 0),
+ CallLowering::ArgInfo({Temp.getReg(0), StatePtrTy, 0}), LocObserver, &MI);
if (Res != LegalizerHelper::Legalized)
return Res;
@@ -867,7 +919,8 @@ LegalizerHelper::createGetStateLibcall(MachineIRBuilder &MIRBuilder,
// content of memory region.
LegalizerHelper::LegalizeResult
LegalizerHelper::createSetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI) {
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) {
const DataLayout &DL = MIRBuilder.getDataLayout();
auto &MF = MIRBuilder.getMF();
auto &MRI = *MIRBuilder.getMRI();
@@ -892,7 +945,8 @@ LegalizerHelper::createSetStateLibcall(MachineIRBuilder &MIRBuilder,
RTLIB::Libcall RTLibcall = getStateLibraryFunctionFor(MI, TLI);
return createLibcall(MIRBuilder, RTLibcall,
CallLowering::ArgInfo({0}, Type::getVoidTy(Ctx), 0),
- CallLowering::ArgInfo({Temp.getReg(0), StatePtrTy, 0}));
+ CallLowering::ArgInfo({Temp.getReg(0), StatePtrTy, 0}),
+ LocObserver, &MI);
}
// The function is used to legalize operations that set default environment
@@ -902,7 +956,8 @@ LegalizerHelper::createSetStateLibcall(MachineIRBuilder &MIRBuilder,
// it is not true, the target must provide custom lowering.
LegalizerHelper::LegalizeResult
LegalizerHelper::createResetStateLibcall(MachineIRBuilder &MIRBuilder,
- MachineInstr &MI) {
+ MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) {
const DataLayout &DL = MIRBuilder.getDataLayout();
auto &MF = MIRBuilder.getMF();
auto &Ctx = MF.getFunction().getContext();
@@ -919,7 +974,8 @@ LegalizerHelper::createResetStateLibcall(MachineIRBuilder &MIRBuilder,
RTLIB::Libcall RTLibcall = getStateLibraryFunctionFor(MI, TLI);
return createLibcall(MIRBuilder, RTLibcall,
CallLowering::ArgInfo({0}, Type::getVoidTy(Ctx), 0),
- CallLowering::ArgInfo({ Dest.getReg(), StatePtrTy, 0}));
+ CallLowering::ArgInfo({Dest.getReg(), StatePtrTy, 0}),
+ LocObserver, &MI);
}
LegalizerHelper::LegalizeResult
@@ -938,7 +994,7 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
LLT LLTy = MRI.getType(MI.getOperand(0).getReg());
unsigned Size = LLTy.getSizeInBits();
Type *HLTy = IntegerType::get(Ctx, Size);
- auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy);
+ auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy, LocObserver);
if (Status != Legalized)
return Status;
break;
@@ -974,7 +1030,7 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
LLVM_DEBUG(dbgs() << "No libcall available for type " << LLTy << ".\n");
return UnableToLegalize;
}
- auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy);
+ auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy, LocObserver);
if (Status != Legalized)
return Status;
break;
@@ -985,7 +1041,8 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
Type *ToTy = getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(0).getReg()));
if (!FromTy || !ToTy)
return UnableToLegalize;
- LegalizeResult Status = conversionLibcall(MI, MIRBuilder, ToTy, FromTy );
+ LegalizeResult Status =
+ conversionLibcall(MI, MIRBuilder, ToTy, FromTy, LocObserver);
if (Status != Legalized)
return Status;
break;
@@ -1000,7 +1057,8 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
LegalizeResult Status = conversionLibcall(
MI, MIRBuilder,
ToSize == 32 ? Type::getInt32Ty(Ctx) : Type::getInt64Ty(Ctx),
- FromSize == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx));
+ FromSize == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx),
+ LocObserver);
if (Status != Legalized)
return Status;
break;
@@ -1015,7 +1073,8 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
LegalizeResult Status = conversionLibcall(
MI, MIRBuilder,
ToSize == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx),
- FromSize == 32 ? Type::getInt32Ty(Ctx) : Type::getInt64Ty(Ctx));
+ FromSize == 32 ? Type::getInt32Ty(Ctx) : Type::getInt64Ty(Ctx),
+ LocObserver);
if (Status != Legalized)
return Status;
break;
@@ -1032,19 +1091,20 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
return Result;
}
case TargetOpcode::G_GET_FPMODE: {
- LegalizeResult Result = createGetStateLibcall(MIRBuilder, MI);
+ LegalizeResult Result = createGetStateLibcall(MIRBuilder, MI, LocObserver);
if (Result != Legalized)
return Result;
break;
}
case TargetOpcode::G_SET_FPMODE: {
- LegalizeResult Result = createSetStateLibcall(MIRBuilder, MI);
+ LegalizeResult Result = createSetStateLibcall(MIRBuilder, MI, LocObserver);
if (Result != Legalized)
return Result;
break;
}
case TargetOpcode::G_RESET_FPMODE: {
- LegalizeResult Result = createResetStateLibcall(MIRBuilder, MI);
+ LegalizeResult Result =
+ createResetStateLibcall(MIRBuilder, MI, LocObserver);
if (Result != Legalized)
return Result;
break;
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 21a412e9360dce..5e7d4c06174c05 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1131,8 +1131,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
verify(*ST.getInstrInfo());
}
-bool AArch64LegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool AArch64LegalizerInfo::legalizeCustom(
+ LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
MachineRegisterInfo &MRI = *MIRBuilder.getMRI();
GISelChangeObserver &Observer = Helper.Observer;
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
index 6fd859d334cd81..928fee975ce370 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
@@ -28,7 +28,8 @@ class AArch64LegalizerInfo : public LegalizerInfo {
public:
AArch64LegalizerInfo(const AArch64Subtarget &ST);
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
bool legalizeIntrinsic(LegalizerHelper &Helper,
MachineInstr &MI) const override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index ccdbd3216e2604..4f4447d2f0d03a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1976,8 +1976,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
verify(*ST.getInstrInfo());
}
-bool AMDGPULegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool AMDGPULegalizerInfo::legalizeCustom(
+ LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
MachineIRBuilder &B = Helper.MIRBuilder;
MachineRegisterInfo &MRI = *B.getMRI();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
index 855fa0ddc214fe..1fa064891a2d93 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
@@ -35,7 +35,8 @@ class AMDGPULegalizerInfo final : public LegalizerInfo {
AMDGPULegalizerInfo(const GCNSubtarget &ST,
const GCNTargetMachine &TM);
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
Register getSegmentAperture(unsigned AddrSpace,
MachineRegisterInfo &MRI,
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 3ffde86ce1bb25..abea0fef5cdc5f 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -362,8 +362,8 @@ ARMLegalizerInfo::getFCmpLibcalls(CmpInst::Predicate Predicate,
llvm_unreachable("Unsupported size for FCmp predicate");
}
-bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
using namespace TargetOpcode;
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
@@ -392,7 +392,8 @@ bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
OriginalResult};
auto Status = createLibcall(MIRBuilder, Libcall, {RetRegs, RetTy, 0},
{{MI.getOperand(1).getReg(), ArgTy, 0},
- {MI.getOperand(2).getReg(), ArgTy, 0}});
+ {MI.getOperand(2).getReg(), ArgTy, 0}},
+ LocObserver, &MI);
if (Status != LegalizerHelper::Legalized)
return false;
break;
@@ -428,7 +429,8 @@ bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
auto Status = createLibcall(MIRBuilder, Libcall.LibcallID,
{LibcallResult, RetTy, 0},
{{MI.getOperand(2).getReg(), ArgTy, 0},
- {MI.getOperand(3).getReg(), ArgTy, 0}});
+ {MI.getOperand(3).getReg(), ArgTy, 0}},
+ LocObserver, &MI);
if (Status != LegalizerHelper::Legalized)
return false;
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.h b/llvm/lib/Target/ARM/ARMLegalizerInfo.h
index f1c2e9c943360e..3636cc6402b810 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.h
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.h
@@ -28,7 +28,8 @@ class ARMLegalizerInfo : public LegalizerInfo {
public:
ARMLegalizerInfo(const ARMSubtarget &ST);
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
private:
void setFCmpLibcallsGNU();
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
index 14f26201e6c09b..f5e94235859a06 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -330,8 +330,9 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
verify(*ST.getInstrInfo());
}
-bool MipsLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool MipsLegalizerInfo::legalizeCustom(
+ LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
using namespace TargetOpcode;
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.h b/llvm/lib/Target/Mips/MipsLegalizerInfo.h
index 05027b718a857d..63daebf264701c 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.h
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.h
@@ -25,7 +25,8 @@ class MipsLegalizerInfo : public LegalizerInfo {
public:
MipsLegalizerInfo(const MipsSubtarget &ST);
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
bool legalizeIntrinsic(LegalizerHelper &Helper,
MachineInstr &MI) const override;
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 570b9802a2f512..8cfaa71ff22837 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -360,8 +360,9 @@ bool RISCVLegalizerInfo::legalizeVAStart(MachineInstr &MI,
return true;
}
-bool RISCVLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool RISCVLegalizerInfo::legalizeCustom(
+ LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
GISelChangeObserver &Observer = Helper.Observer;
switch (MI.getOpcode()) {
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
index 246ea90dcd7490..5db9643df3ada2 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
@@ -30,7 +30,8 @@ class RISCVLegalizerInfo : public LegalizerInfo {
public:
RISCVLegalizerInfo(const RISCVSubtarget &ST);
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
private:
bool legalizeShlAshrLshr(MachineInstr &MI, MachineIRBuilder &MIRBuilder,
diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
index faaf7f0e254891..061bc967423712 100644
--- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
@@ -289,8 +289,9 @@ static Register convertPtrToInt(Register Reg, LLT ConvTy, SPIRVType *SpirvType,
return ConvReg;
}
-bool SPIRVLegalizerInfo::legalizeCustom(LegalizerHelper &Helper,
- MachineInstr &MI) const {
+bool SPIRVLegalizerInfo::legalizeCustom(
+ LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const {
auto Opc = MI.getOpcode();
MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
if (!isTypeFoldingSupported(Opc)) {
diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
index 2541ff29edb0fc..f18b15b7f16964 100644
--- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
+++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
@@ -29,7 +29,8 @@ class SPIRVLegalizerInfo : public LegalizerInfo {
SPIRVGlobalRegistry *GR;
public:
- bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
+ bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
+ LostDebugLocObserver &LocObserver) const override;
SPIRVLegalizerInfo(const SPIRVSubtarget &ST);
};
} // namespace llvm
diff --git a/llvm/test/CodeGen/AArch64/fexplog.ll b/llvm/test/CodeGen/AArch64/fexplog.ll
index 26c0b68307b32b..2848a6bde3204e 100644
--- a/llvm/test/CodeGen/AArch64/fexplog.ll
+++ b/llvm/test/CodeGen/AArch64/fexplog.ll
@@ -3,36 +3,18 @@
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define double @exp_f64(double %a) {
-; CHECK-SD-LABEL: exp_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b exp
-;
-; CHECK-GI-LABEL: exp_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl exp
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: exp_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b exp
entry:
%c = call double @llvm.exp.f64(double %a)
ret double %c
}
define float @exp_f32(float %a) {
-; CHECK-SD-LABEL: exp_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b expf
-;
-; CHECK-GI-LABEL: exp_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl expf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: exp_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b expf
entry:
%c = call float @llvm.exp.f32(float %a)
ret float %c
@@ -1280,36 +1262,18 @@ entry:
}
define double @exp2_f64(double %a) {
-; CHECK-SD-LABEL: exp2_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b exp2
-;
-; CHECK-GI-LABEL: exp2_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl exp2
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: exp2_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b exp2
entry:
%c = call double @llvm.exp2.f64(double %a)
ret double %c
}
define float @exp2_f32(float %a) {
-; CHECK-SD-LABEL: exp2_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b exp2f
-;
-; CHECK-GI-LABEL: exp2_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl exp2f
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: exp2_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b exp2f
entry:
%c = call float @llvm.exp2.f32(float %a)
ret float %c
@@ -2557,36 +2521,18 @@ entry:
}
define double @log_f64(double %a) {
-; CHECK-SD-LABEL: log_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b log
-;
-; CHECK-GI-LABEL: log_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl log
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b log
entry:
%c = call double @llvm.log.f64(double %a)
ret double %c
}
define float @log_f32(float %a) {
-; CHECK-SD-LABEL: log_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b logf
-;
-; CHECK-GI-LABEL: log_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl logf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b logf
entry:
%c = call float @llvm.log.f32(float %a)
ret float %c
@@ -3834,36 +3780,18 @@ entry:
}
define double @log2_f64(double %a) {
-; CHECK-SD-LABEL: log2_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b log2
-;
-; CHECK-GI-LABEL: log2_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl log2
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log2_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b log2
entry:
%c = call double @llvm.log2.f64(double %a)
ret double %c
}
define float @log2_f32(float %a) {
-; CHECK-SD-LABEL: log2_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b log2f
-;
-; CHECK-GI-LABEL: log2_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl log2f
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log2_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b log2f
entry:
%c = call float @llvm.log2.f32(float %a)
ret float %c
@@ -5111,36 +5039,18 @@ entry:
}
define double @log10_f64(double %a) {
-; CHECK-SD-LABEL: log10_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b log10
-;
-; CHECK-GI-LABEL: log10_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl log10
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log10_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b log10
entry:
%c = call double @llvm.log10.f64(double %a)
ret double %c
}
define float @log10_f32(float %a) {
-; CHECK-SD-LABEL: log10_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b log10f
-;
-; CHECK-GI-LABEL: log10_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl log10f
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: log10_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b log10f
entry:
%c = call float @llvm.log10.f32(float %a)
ret float %c
diff --git a/llvm/test/CodeGen/AArch64/fpow.ll b/llvm/test/CodeGen/AArch64/fpow.ll
index 7681ab510b3099..a55c0dbffae2bd 100644
--- a/llvm/test/CodeGen/AArch64/fpow.ll
+++ b/llvm/test/CodeGen/AArch64/fpow.ll
@@ -3,36 +3,18 @@
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define double @pow_f64(double %a, double %b) {
-; CHECK-SD-LABEL: pow_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b pow
-;
-; CHECK-GI-LABEL: pow_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl pow
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: pow_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b pow
entry:
%c = call double @llvm.pow.f64(double %a, double %b)
ret double %c
}
define float @pow_f32(float %a, float %b) {
-; CHECK-SD-LABEL: pow_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b powf
-;
-; CHECK-GI-LABEL: pow_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl powf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: pow_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b powf
entry:
%c = call float @llvm.pow.f32(float %a, float %b)
ret float %c
diff --git a/llvm/test/CodeGen/AArch64/frem.ll b/llvm/test/CodeGen/AArch64/frem.ll
index ed0f6c442ece17..eb26128d6469f9 100644
--- a/llvm/test/CodeGen/AArch64/frem.ll
+++ b/llvm/test/CodeGen/AArch64/frem.ll
@@ -5,36 +5,18 @@
; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define double @frem_f64(double %a, double %b) {
-; CHECK-SD-LABEL: frem_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b fmod
-;
-; CHECK-GI-LABEL: frem_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl fmod
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: frem_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b fmod
entry:
%c = frem double %a, %b
ret double %c
}
define float @frem_f32(float %a, float %b) {
-; CHECK-SD-LABEL: frem_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b fmodf
-;
-; CHECK-GI-LABEL: frem_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl fmodf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: frem_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b fmodf
entry:
%c = frem float %a, %b
ret float %c
diff --git a/llvm/test/CodeGen/AArch64/fsincos.ll b/llvm/test/CodeGen/AArch64/fsincos.ll
index 9784b9ea9b65f5..aef0b2e29243e7 100644
--- a/llvm/test/CodeGen/AArch64/fsincos.ll
+++ b/llvm/test/CodeGen/AArch64/fsincos.ll
@@ -3,36 +3,18 @@
; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define double @sin_f64(double %a) {
-; CHECK-SD-LABEL: sin_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b sin
-;
-; CHECK-GI-LABEL: sin_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl sin
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: sin_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b sin
entry:
%c = call double @llvm.sin.f64(double %a)
ret double %c
}
define float @sin_f32(float %a) {
-; CHECK-SD-LABEL: sin_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b sinf
-;
-; CHECK-GI-LABEL: sin_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl sinf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: sin_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b sinf
entry:
%c = call float @llvm.sin.f32(float %a)
ret float %c
@@ -1280,36 +1262,18 @@ entry:
}
define double @cos_f64(double %a) {
-; CHECK-SD-LABEL: cos_f64:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b cos
-;
-; CHECK-GI-LABEL: cos_f64:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl cos
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: cos_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b cos
entry:
%c = call double @llvm.cos.f64(double %a)
ret double %c
}
define float @cos_f32(float %a) {
-; CHECK-SD-LABEL: cos_f32:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: b cosf
-;
-; CHECK-GI-LABEL: cos_f32:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
-; CHECK-GI-NEXT: .cfi_offset w30, -16
-; CHECK-GI-NEXT: bl cosf
-; CHECK-GI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: cos_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b cosf
entry:
%c = call float @llvm.cos.f32(float %a)
ret float %c
@@ -2556,6 +2520,24 @@ entry:
ret <16 x half> %c
}
+; This is testing that we do not produce incorrect tailcall lowerings
+define i64 @donttailcall(double noundef %x, double noundef %y) {
+; CHECK-LABEL: donttailcall:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: bl sin
+; CHECK-NEXT: fmov x0, d0
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
+entry:
+ %call = tail call double @llvm.sin.f64(double noundef %x)
+ %0 = bitcast double %call to i64
+ ret i64 %0
+}
+
+
declare <16 x half> @llvm.cos.v16f16(<16 x half>)
declare <16 x half> @llvm.sin.v16f16(<16 x half>)
declare <2 x double> @llvm.cos.v2f64(<2 x double>)
diff --git a/llvm/test/CodeGen/AArch64/llvm.exp10.ll b/llvm/test/CodeGen/AArch64/llvm.exp10.ll
index c3f14b0dcff71e..8e6b15c8ba8d47 100644
--- a/llvm/test/CodeGen/AArch64/llvm.exp10.ll
+++ b/llvm/test/CodeGen/AArch64/llvm.exp10.ll
@@ -298,18 +298,9 @@ define <4 x half> @exp10_v4f16(<4 x half> %x) {
}
define float @exp10_f32(float %x) {
-; SDAG-LABEL: exp10_f32:
-; SDAG: // %bb.0:
-; SDAG-NEXT: b exp10f
-;
-; GISEL-LABEL: exp10_f32:
-; GISEL: // %bb.0:
-; GISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; GISEL-NEXT: .cfi_def_cfa_offset 16
-; GISEL-NEXT: .cfi_offset w30, -16
-; GISEL-NEXT: bl exp10f
-; GISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; GISEL-NEXT: ret
+; CHECK-LABEL: exp10_f32:
+; CHECK: // %bb.0:
+; CHECK-NEXT: b exp10f
%r = call float @llvm.exp10.f32(float %x)
ret float %r
}
@@ -541,18 +532,9 @@ define <4 x float> @exp10_v4f32(<4 x float> %x) {
}
define double @exp10_f64(double %x) {
-; SDAG-LABEL: exp10_f64:
-; SDAG: // %bb.0:
-; SDAG-NEXT: b exp10
-;
-; GISEL-LABEL: exp10_f64:
-; GISEL: // %bb.0:
-; GISEL-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; GISEL-NEXT: .cfi_def_cfa_offset 16
-; GISEL-NEXT: .cfi_offset w30, -16
-; GISEL-NEXT: bl exp10
-; GISEL-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; GISEL-NEXT: ret
+; CHECK-LABEL: exp10_f64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: b exp10
%r = call double @llvm.exp10.f64(double %x)
ret double %r
}
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index 3fb10db7f66657..d7876b7ce87490 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -3656,12 +3656,14 @@ TEST_F(AArch64GISelMITest, CreateLibcall) {
AInfo Info(MF->getSubtarget());
DummyGISelObserver Observer;
+ LostDebugLocObserver DummyLocObserver("");
LLVMContext &Ctx = MF->getFunction().getContext();
auto *RetTy = Type::getVoidTy(Ctx);
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
- createLibcall(B, "abort", {{}, RetTy, 0}, {}, CallingConv::C));
+ createLibcall(B, "abort", {{}, RetTy, 0}, {}, CallingConv::C,
+ DummyLocObserver, nullptr));
auto CheckStr = R"(
CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
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