[llvm] [ValueTracking] Support dominating known bits condition in and/or (PR #74728)

[via llvm-commits]

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@@ -705,28 +705,40 @@ static void computeKnownBitsFromCmp(const Value *V, CmpInst::Predicate Pred,
   }
 }
 
+static void computeKnownBitsFromCond(const Value *V, Value *Cond,
+                                     KnownBits &Known, unsigned Depth,
+                                     const SimplifyQuery &SQ, bool Invert) {
+  Value *A, *B;
+  if (Depth < MaxAnalysisRecursionDepth &&
+      (Invert ? match(Cond, m_LogicalOr(m_Value(A), m_Value(B)))
+              : match(Cond, m_LogicalAnd(m_Value(A), m_Value(B))))) {
+    computeKnownBitsFromCond(V, A, Known, Depth + 1, SQ, Invert);
+    computeKnownBitsFromCond(V, B, Known, Depth + 1, SQ, Invert);
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goldsteinn wrote:

Can we potentially return conflict if we are analyzing something like `if(A > 0 || A < 0)`? Seems `computeKNownBitsFromCmp` will set both signbit in both zero/one.


https://github.com/llvm/llvm-project/pull/74728