[llvm] 3894a11 - [X86] combineConcatVectorOps - handle the load combines in the same place
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 8 06:55:09 PST 2023
Author: Simon Pilgrim
Date: 2023-12-08T14:54:50Z
New Revision: 3894a11acd1c8907c4d8a19a96d1ea398463af65
URL: https://github.com/llvm/llvm-project/commit/3894a11acd1c8907c4d8a19a96d1ea398463af65
DIFF: https://github.com/llvm/llvm-project/commit/3894a11acd1c8907c4d8a19a96d1ea398463af65.diff
LOG: [X86] combineConcatVectorOps - handle the load combines in the same place
The intention is to merge some of the concat folds of vector constant data to address some of the remaining regressions in #73509
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 6d7c279f85935..f6c7cabdf64c0 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -54490,25 +54490,6 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
if (Op0.getOpcode() == X86ISD::VBROADCAST)
return DAG.getNode(Op0.getOpcode(), DL, VT, Op0.getOperand(0));
- // If this simple subvector or scalar/subvector broadcast_load is inserted
- // into both halves, use a larger broadcast_load. Update other uses to use
- // an extracted subvector.
- if (ISD::isNormalLoad(Op0.getNode()) ||
- Op0.getOpcode() == X86ISD::VBROADCAST_LOAD ||
- Op0.getOpcode() == X86ISD::SUBV_BROADCAST_LOAD) {
- auto *Mem = cast<MemSDNode>(Op0);
- unsigned Opc = Op0.getOpcode() == X86ISD::VBROADCAST_LOAD
- ? X86ISD::VBROADCAST_LOAD
- : X86ISD::SUBV_BROADCAST_LOAD;
- if (SDValue BcastLd =
- getBROADCAST_LOAD(Opc, DL, VT, Mem->getMemoryVT(), Mem, 0, DAG)) {
- SDValue BcastSrc =
- extractSubVector(BcastLd, 0, DAG, DL, Op0.getValueSizeInBits());
- DAG.ReplaceAllUsesOfValueWith(Op0, BcastSrc);
- return BcastLd;
- }
- }
-
// concat_vectors(movddup(x),movddup(x)) -> broadcast(x)
if (Op0.getOpcode() == X86ISD::MOVDDUP && VT == MVT::v4f64 &&
(Subtarget.hasAVX2() ||
@@ -54995,6 +54976,28 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
}
}
+ // If this simple subvector or scalar/subvector broadcast_load is inserted
+ // into both halves, use a larger broadcast_load. Update other uses to use
+ // an extracted subvector.
+ if (IsSplat &&
+ (VT.is256BitVector() || (VT.is512BitVector() && Subtarget.hasAVX512()))) {
+ if (ISD::isNormalLoad(Op0.getNode()) ||
+ Op0.getOpcode() == X86ISD::VBROADCAST_LOAD ||
+ Op0.getOpcode() == X86ISD::SUBV_BROADCAST_LOAD) {
+ auto *Mem = cast<MemSDNode>(Op0);
+ unsigned Opc = Op0.getOpcode() == X86ISD::VBROADCAST_LOAD
+ ? X86ISD::VBROADCAST_LOAD
+ : X86ISD::SUBV_BROADCAST_LOAD;
+ if (SDValue BcastLd =
+ getBROADCAST_LOAD(Opc, DL, VT, Mem->getMemoryVT(), Mem, 0, DAG)) {
+ SDValue BcastSrc =
+ extractSubVector(BcastLd, 0, DAG, DL, Op0.getValueSizeInBits());
+ DAG.ReplaceAllUsesOfValueWith(Op0, BcastSrc);
+ return BcastLd;
+ }
+ }
+ }
+
// Attempt to fold target constant loads.
if (all_of(Ops, [](SDValue Op) { return getTargetConstantFromNode(Op); })) {
SmallVector<APInt> EltBits;
More information about the llvm-commits
mailing list