[llvm] [AMDGPU] Form V_MAD_U64_U32 from mul24 (PR #72393)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 8 03:55:30 PST 2023
================
@@ -676,6 +676,16 @@ multiclass IMAD32_Pats <VOP3_Pseudo inst> {
(ThreeOpFragSDAG<mul, add> i32:$src0, i32:$src1, (i32 imm:$src2)),
(EXTRACT_SUBREG (inst $src0, $src1, (i64 (as_i64imm $src2)), 0 /* clamp */), sub0)
>;
+
+ // Handle cases where amdgpu-codegenprepare-mul24 made a mul24 instead of a normal mul.
+ def : GCNPat <
+ (i64 (add (i64 (AMDGPUmul_u24 i32:$src0, i32:$src1)), i64:$src2)),
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jayfoad wrote:
Do you also want the signed (AMDGPUmul_i24) equivalent of this? I guess this is a pre-existing problem since IMAD32_Pats above only handles the unsigned case too.
https://github.com/llvm/llvm-project/pull/72393
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