[llvm] [TableGen] Integrate TableGen-based macro fusion (PR #73115)
Wang Pengcheng via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 8 02:19:55 PST 2023
https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/73115
>From f137309d3772b18b83e0a587c7d4065ec4f610b8 Mon Sep 17 00:00:00 2001
From: wangpc <wangpengcheng.pp at bytedance.com>
Date: Fri, 10 Nov 2023 17:58:00 +0800
Subject: [PATCH 1/3] [MacroFusion] Support multiple predicators
The user can provide multiple predicators to MacroFusion and the
DAG mutation will be applied if one of them is evalated to true.
`ShouldSchedulePredTy` is renamed to `MacroFusionPredTy`.
---
llvm/include/llvm/CodeGen/MacroFusion.h | 20 +++++++------
llvm/lib/CodeGen/MacroFusion.cpp | 37 +++++++++++++++++--------
llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | 4 +--
3 files changed, 38 insertions(+), 23 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MacroFusion.h b/llvm/include/llvm/CodeGen/MacroFusion.h
index ea2c7a5faae385..a359fca6042600 100644
--- a/llvm/include/llvm/CodeGen/MacroFusion.h
+++ b/llvm/include/llvm/CodeGen/MacroFusion.h
@@ -14,7 +14,7 @@
#ifndef LLVM_CODEGEN_MACROFUSION_H
#define LLVM_CODEGEN_MACROFUSION_H
-#include <functional>
+#include "llvm/ADT/ArrayRef.h"
#include <memory>
namespace llvm {
@@ -29,10 +29,10 @@ class SUnit;
/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
-using ShouldSchedulePredTy = std::function<bool(const TargetInstrInfo &TII,
- const TargetSubtargetInfo &TSI,
- const MachineInstr *FirstMI,
- const MachineInstr &SecondMI)>;
+using MacroFusionPredTy = bool (*)(const TargetInstrInfo &TII,
+ const TargetSubtargetInfo &STI,
+ const MachineInstr *FirstMI,
+ const MachineInstr &SecondMI);
/// Checks if the number of cluster edges between SU and its predecessors is
/// less than FuseLimit
@@ -48,15 +48,17 @@ bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU,
/// Create a DAG scheduling mutation to pair instructions back to back
/// for instructions that benefit according to the target-specific
-/// shouldScheduleAdjacent predicate function.
+/// predicate functions. shouldScheduleAdjacent will be true if any of the
+/// provided predicates are true.
std::unique_ptr<ScheduleDAGMutation>
-createMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent);
+createMacroFusionDAGMutation(ArrayRef<MacroFusionPredTy> Predicates);
/// Create a DAG scheduling mutation to pair branch instructions with one
/// of their predecessors back to back for instructions that benefit according
-/// to the target-specific shouldScheduleAdjacent predicate function.
+/// to the target-specific predicate functions. shouldScheduleAdjacent will be
+/// true if any of the provided predicates are true.
std::unique_ptr<ScheduleDAGMutation>
-createBranchMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent);
+createBranchMacroFusionDAGMutation(ArrayRef<MacroFusionPredTy> Predicates);
} // end namespace llvm
diff --git a/llvm/lib/CodeGen/MacroFusion.cpp b/llvm/lib/CodeGen/MacroFusion.cpp
index fa5df68b8abcc0..30affc93d4adc0 100644
--- a/llvm/lib/CodeGen/MacroFusion.cpp
+++ b/llvm/lib/CodeGen/MacroFusion.cpp
@@ -137,19 +137,34 @@ namespace {
/// Post-process the DAG to create cluster edges between instrs that may
/// be fused by the processor into a single operation.
class MacroFusion : public ScheduleDAGMutation {
- ShouldSchedulePredTy shouldScheduleAdjacent;
+ std::vector<MacroFusionPredTy> Predicates;
bool FuseBlock;
bool scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU);
public:
- MacroFusion(ShouldSchedulePredTy shouldScheduleAdjacent, bool FuseBlock)
- : shouldScheduleAdjacent(shouldScheduleAdjacent), FuseBlock(FuseBlock) {}
+ MacroFusion(ArrayRef<MacroFusionPredTy> Predicates, bool FuseBlock)
+ : Predicates(Predicates.begin(), Predicates.end()), FuseBlock(FuseBlock) {
+ }
void apply(ScheduleDAGInstrs *DAGInstrs) override;
+
+ bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
+ const TargetSubtargetInfo &STI,
+ const MachineInstr *FirstMI,
+ const MachineInstr &SecondMI);
};
} // end anonymous namespace
+bool MacroFusion::shouldScheduleAdjacent(const TargetInstrInfo &TII,
+ const TargetSubtargetInfo &STI,
+ const MachineInstr *FirstMI,
+ const MachineInstr &SecondMI) {
+ return llvm::any_of(Predicates, [&](MacroFusionPredTy Predicate) {
+ return Predicate(TII, STI, FirstMI, SecondMI);
+ });
+}
+
void MacroFusion::apply(ScheduleDAGInstrs *DAG) {
if (FuseBlock)
// For each of the SUnits in the scheduling block, try to fuse the instr in
@@ -197,17 +212,15 @@ bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGInstrs &DAG, SUnit &AnchorSU)
}
std::unique_ptr<ScheduleDAGMutation>
-llvm::createMacroFusionDAGMutation(
- ShouldSchedulePredTy shouldScheduleAdjacent) {
- if(EnableMacroFusion)
- return std::make_unique<MacroFusion>(shouldScheduleAdjacent, true);
+llvm::createMacroFusionDAGMutation(ArrayRef<MacroFusionPredTy> Predicates) {
+ if (EnableMacroFusion)
+ return std::make_unique<MacroFusion>(std::move(Predicates), true);
return nullptr;
}
-std::unique_ptr<ScheduleDAGMutation>
-llvm::createBranchMacroFusionDAGMutation(
- ShouldSchedulePredTy shouldScheduleAdjacent) {
- if(EnableMacroFusion)
- return std::make_unique<MacroFusion>(shouldScheduleAdjacent, false);
+std::unique_ptr<ScheduleDAGMutation> llvm::createBranchMacroFusionDAGMutation(
+ ArrayRef<MacroFusionPredTy> Predicates) {
+ if (EnableMacroFusion)
+ return std::make_unique<MacroFusion>(std::move(Predicates), false);
return nullptr;
}
diff --git a/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp b/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
index 29c9b9ccf27614..0bddeeef9e9b1a 100644
--- a/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
@@ -142,10 +142,10 @@ namespace {
/// be turned into VOPD instructions
/// Greedily pairs instruction candidates. O(n^2) algorithm.
struct VOPDPairingMutation : ScheduleDAGMutation {
- ShouldSchedulePredTy shouldScheduleAdjacent; // NOLINT: function pointer
+ MacroFusionPredTy shouldScheduleAdjacent; // NOLINT: function pointer
VOPDPairingMutation(
- ShouldSchedulePredTy shouldScheduleAdjacent) // NOLINT: function pointer
+ MacroFusionPredTy shouldScheduleAdjacent) // NOLINT: function pointer
: shouldScheduleAdjacent(shouldScheduleAdjacent) {}
void apply(ScheduleDAGInstrs *DAG) override {
>From b1d75ceb3d7e85edb4b31b626a3f9a2929cfbe59 Mon Sep 17 00:00:00 2001
From: wangpc <wangpengcheng.pp at bytedance.com>
Date: Fri, 10 Nov 2023 18:18:18 +0800
Subject: [PATCH 2/3] [TableGen] Add a backend to generate MacroFusion
predicators
`FusionPredicate` is used to predicate if target instruction matches
the requirement. The targets can be firstMI, secondMI or both.
The `Fusion` contains a list of `FusionPredicate`. The generated code
will be like:
```
bool isNAME(const TargetInstrInfo &TII,
const TargetSubtargetInfo &STI,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI) {
auto &MRI = SecondMI.getMF()->getRegInfo();
/* Predicates */
return true;
}
```
A boilerplate class called `SimpleFusion` is added. `SimpleFusion` has
a predefined structure of predicates and accepts predicate for
`firstMI`, predicate for `secondMI` and epilog/prolog as arguments.
The generated code for `SimpleFusion` will be like:
```
bool isNAME(const TargetInstrInfo &TII,
const TargetSubtargetInfo &STI,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI) {
auto &MRI = SecondMI.getMF()->getRegInfo();
/* Prolog */
/* Predicate for `SecondMI` */
/* Wildcard */
/* Predicate for `FirstMI` */
/* Check One Use */
/* Tie registers */
/* Epilog */
return true;
}
```
---
.../llvm/Target/TargetInstrPredicate.td | 6 +
llvm/include/llvm/Target/TargetSchedule.td | 113 +++++++++
llvm/test/TableGen/MacroFusion.td | 97 +++++++
llvm/utils/TableGen/CMakeLists.txt | 1 +
.../TableGen/MacroFusionPredicatorEmitter.cpp | 236 ++++++++++++++++++
llvm/utils/TableGen/PredicateExpander.cpp | 8 +
llvm/utils/TableGen/PredicateExpander.h | 1 +
7 files changed, 462 insertions(+)
create mode 100644 llvm/test/TableGen/MacroFusion.td
create mode 100644 llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
diff --git a/llvm/include/llvm/Target/TargetInstrPredicate.td b/llvm/include/llvm/Target/TargetInstrPredicate.td
index 9f2cde9d923050..82c4c7b23a49b6 100644
--- a/llvm/include/llvm/Target/TargetInstrPredicate.td
+++ b/llvm/include/llvm/Target/TargetInstrPredicate.td
@@ -95,6 +95,12 @@ class MCOperandPredicate<int Index> : MCInstPredicate {
// Return true if machine operand at position `Index` is a register operand.
class CheckIsRegOperand<int Index> : MCOperandPredicate<Index>;
+// Return true if machine operand at position `Index` is a virtual register operand.
+class CheckIsVRegOperand<int Index> : MCOperandPredicate<Index>;
+
+// Return true if machine operand at position `Index` is not a virtual register operand.
+class CheckIsNotVRegOperand<int Index> : CheckNot<CheckIsVRegOperand<Index>>;
+
// Return true if machine operand at position `Index` is an immediate operand.
class CheckIsImmOperand<int Index> : MCOperandPredicate<Index>;
diff --git a/llvm/include/llvm/Target/TargetSchedule.td b/llvm/include/llvm/Target/TargetSchedule.td
index 949baa5d2105c4..74c9cd085b4ee2 100644
--- a/llvm/include/llvm/Target/TargetSchedule.td
+++ b/llvm/include/llvm/Target/TargetSchedule.td
@@ -584,3 +584,116 @@ class MemoryQueue<ProcResourceKind PR> {
class LoadQueue<ProcResourceKind LDQueue> : MemoryQueue<LDQueue>;
class StoreQueue<ProcResourceKind STQueue> : MemoryQueue<STQueue>;
+
+// The target instruction that FusionPredicate will be evaluated on.
+class FusionTarget;
+def first : FusionTarget;
+def second : FusionTarget;
+def both : FusionTarget;
+
+// Base class of FusionPredicate, etc. The avaliable variables are:
+// * const TargetInstrInfo &TII
+// * const TargetSubtargetInfo &STI
+// * const MachineRegisterInfo &MRI
+// * const MachineInstr *FirstMI
+// * const MachineInstr &SecondMI
+class FusionPredicate<FusionTarget target> {
+ FusionTarget Target = target;
+}
+class FirstFusionPredicate: FusionPredicate<first>;
+class SecondFusionPredicate: FusionPredicate<second>;
+class BothFusionPredicate: FusionPredicate<both>;
+
+// FusionPredicate with raw code predicate.
+class FusionPredicateWithCode<code pred> : FusionPredicate<both> {
+ code Predicate = pred;
+}
+
+// FusionPredicate with MCInstPredicate.
+class FusionPredicateWithMCInstPredicate<FusionTarget target, MCInstPredicate pred>
+ : FusionPredicate<target> {
+ MCInstPredicate Predicate = pred;
+}
+class FirstFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<first, pred>;
+class SecondFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<second, pred>;
+// The pred will be applied on both firstMI and secondMI.
+class BothFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<second, pred>;
+
+// Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
+// `firstOpIdx` should be the same as the operand of `SecondMI` at position
+// `secondOpIdx`.
+class TieReg<int firstOpIdx, int secondOpIdx> : BothFusionPredicate {
+ int FirstOpIdx = firstOpIdx;
+ int SecondOpIdx = secondOpIdx;
+}
+
+// A predicate for wildcard. The generated code will be like:
+// ```
+// if (!FirstMI)
+// return ReturnValue;
+// ```
+class WildcardPred<bit ret> : FirstFusionPredicate {
+ bit ReturnValue = ret;
+}
+def WildcardFalse : WildcardPred<0>;
+def WildcardTrue : WildcardPred<1>;
+
+// Indicates that the destination register of `FirstMI` should have one use if
+// it is a virtual register.
+class OneUsePred : FirstFusionPredicate;
+def OneUse : OneUsePred;
+
+// Handled by MacroFusionPredicatorEmitter backend.
+// The generated predicator will be like:
+// ```
+// bool isNAME(const TargetInstrInfo &TII,
+// const TargetSubtargetInfo &STI,
+// const MachineInstr *FirstMI,
+// const MachineInstr &SecondMI) {
+// auto &MRI = SecondMI.getMF()->getRegInfo();
+// /* Predicates */
+// return true;
+// }
+// ```
+class Fusion<list<FusionPredicate> predicates> {
+ list<FusionPredicate> Predicates = predicates;
+}
+
+// The generated predicator will be like:
+// ```
+// bool isNAME(const TargetInstrInfo &TII,
+// const TargetSubtargetInfo &STI,
+// const MachineInstr *FirstMI,
+// const MachineInstr &SecondMI) {
+// auto &MRI = SecondMI.getMF()->getRegInfo();
+// /* Prolog */
+// /* Predicate for `SecondMI` */
+// /* Wildcard */
+// /* Predicate for `FirstMI` */
+// /* Check One Use */
+// /* Tie registers */
+// /* Epilog */
+// return true;
+// }
+// ```
+class SimpleFusion<MCInstPredicate firstPred, MCInstPredicate secondPred,
+ list<FusionPredicate> prolog = [],
+ list<FusionPredicate> epilog = []>
+ : Fusion<!listconcat(
+ prolog,
+ [
+ SecondFusionPredicateWithMCInstPredicate<secondPred>,
+ WildcardTrue,
+ FirstFusionPredicateWithMCInstPredicate<firstPred>,
+ SecondFusionPredicateWithMCInstPredicate<
+ CheckAny<[
+ CheckIsVRegOperand<0>,
+ CheckSameRegOperand<0, 1>
+ ]>>,
+ OneUse,
+ TieReg<0, 1>,
+ ],
+ epilog)>;
diff --git a/llvm/test/TableGen/MacroFusion.td b/llvm/test/TableGen/MacroFusion.td
new file mode 100644
index 00000000000000..72b0d1e19144f7
--- /dev/null
+++ b/llvm/test/TableGen/MacroFusion.td
@@ -0,0 +1,97 @@
+// RUN: llvm-tblgen -gen-macro-fusion-pred -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-PREDICATOR
+
+include "llvm/Target/Target.td"
+
+def TestInstrInfo : InstrInfo { }
+def TestAsmWriter : AsmWriter {
+ int PassSubtarget = 1;
+}
+
+def Test : Target {
+ let InstructionSet = TestInstrInfo;
+ let AssemblyWriters = [TestAsmWriter];
+}
+
+let Namespace = "Test" in {
+ foreach i = 0-32 in {
+ def X#i : Register<"x"#i>;
+ }
+
+ def GPR : RegisterClass<"GPR", [i32], 32, (sequence "X%u", 0, 32)>;
+
+ class TestInst<int Opc> : Instruction {
+ field bits<32> Inst;
+ field bits<32> SoftFail = 0;
+ let Size = 4;
+ let Inst = Opc;
+ let OutOperandList = (outs);
+ let InOperandList = (ins);
+ let AsmString = NAME;
+ }
+}
+
+def Inst0 : TestInst<0>;
+def Inst1 : TestInst<1>;
+
+def TestFusion: SimpleFusion<CheckOpcode<[Inst0]>,
+ CheckAll<[
+ CheckOpcode<[Inst1]>,
+ CheckRegOperand<0, X0>
+ ]>>;
+
+// CHECK-PREDICATOR: #ifdef GET_Test_MACRO_FUSION_PRED_DECL
+// CHECK-PREDICATOR-NEXT: #undef GET_Test_MACRO_FUSION_PRED_DECL
+// CHECK-PREDICATOR-EMPTY:
+// CHECK-PREDICATOR-NEXT: namespace llvm {
+// CHECK-PREDICATOR-NEXT: bool isTestFusion(const TargetInstrInfo &, const TargetSubtargetInfo &, const MachineInstr *, const MachineInstr &);
+// CHECK-PREDICATOR-NEXT: } // end namespace llvm
+// CHECK-PREDICATOR-EMPTY:
+// CHECK-PREDICATOR-NEXT: #endif
+
+// CHECK-PREDICATOR: #ifdef GET_Test_MACRO_FUSION_PRED_IMPL
+// CHECK-PREDICATOR-NEXT: #undef GET_Test_MACRO_FUSION_PRED_IMPL
+// CHECK-PREDICATOR-EMPTY:
+// CHECK-PREDICATOR-NEXT: namespace llvm {
+// CHECK-PREDICATOR-NEXT: bool isTestFusion(
+// CHECK-PREDICATOR-NEXT: const TargetInstrInfo &TII,
+// CHECK-PREDICATOR-NEXT: const TargetSubtargetInfo &STI,
+// CHECK-PREDICATOR-NEXT: const MachineInstr *FirstMI,
+// CHECK-PREDICATOR-NEXT: const MachineInstr &SecondMI) {
+// CHECK-PREDICATOR-NEXT: auto &MRI = SecondMI.getMF()->getRegInfo();
+// CHECK-PREDICATOR-NEXT: {
+// CHECK-PREDICATOR-NEXT: const MachineInstr *MI = &SecondMI;
+// CHECK-PREDICATOR-NEXT: if (!(
+// CHECK-PREDICATOR-NEXT: ( MI->getOpcode() == Test::Inst1 )
+// CHECK-PREDICATOR-NEXT: && MI->getOperand(0).getReg() == Test::X0
+// CHECK-PREDICATOR-NEXT: ))
+// CHECK-PREDICATOR-NEXT: return false;
+// CHECK-PREDICATOR-NEXT: }
+// CHECK-PREDICATOR-NEXT: if (!FirstMI)
+// CHECK-PREDICATOR-NEXT: return true;
+// CHECK-PREDICATOR-NEXT: {
+// CHECK-PREDICATOR-NEXT: const MachineInstr *MI = FirstMI;
+// CHECK-PREDICATOR-NEXT: if (( MI->getOpcode() != Test::Inst0 ))
+// CHECK-PREDICATOR-NEXT: return false;
+// CHECK-PREDICATOR-NEXT: }
+// CHECK-PREDICATOR-NEXT: {
+// CHECK-PREDICATOR-NEXT: const MachineInstr *MI = &SecondMI;
+// CHECK-PREDICATOR-NEXT: if (!(
+// CHECK-PREDICATOR-NEXT: MI->getOperand(0).getReg().isVirtual()
+// CHECK-PREDICATOR-NEXT: || MI->getOperand(0).getReg() == MI->getOperand(1).getReg()
+// CHECK-PREDICATOR-NEXT: ))
+// CHECK-PREDICATOR-NEXT: return false;
+// CHECK-PREDICATOR-NEXT: }
+// CHECK-PREDICATOR-NEXT: {
+// CHECK-PREDICATOR-NEXT: Register FirstDest = FirstMI->getOperand(0).getReg();
+// CHECK-PREDICATOR-NEXT: if (FirstDest.isVirtual() && !MRI.hasOneNonDBGUse(FirstDest))
+// CHECK-PREDICATOR-NEXT: return false;
+// CHECK-PREDICATOR-NEXT: }
+// CHECK-PREDICATOR-NEXT: if (!(FirstMI->getOperand(0).isReg() &&
+// CHECK-PREDICATOR-NEXT: SecondMI.getOperand(1).isReg() &&
+// CHECK-PREDICATOR-NEXT: FirstMI->getOperand(0).getReg() == SecondMI.getOperand(1).getReg()))
+// CHECK-PREDICATOR-NEXT: return false;
+// CHECK-PREDICATOR-NEXT: return true;
+// CHECK-PREDICATOR-NEXT: }
+// CHECK-PREDICATOR-NEXT: } // end namespace llvm
+// CHECK-PREDICATOR-EMPTY:
+// CHECK-PREDICATOR-NEXT: #endif
diff --git a/llvm/utils/TableGen/CMakeLists.txt b/llvm/utils/TableGen/CMakeLists.txt
index 071ea3bc07054b..f765cc36d3bebe 100644
--- a/llvm/utils/TableGen/CMakeLists.txt
+++ b/llvm/utils/TableGen/CMakeLists.txt
@@ -72,6 +72,7 @@ add_tablegen(llvm-tblgen LLVM
PredicateExpander.cpp
PseudoLoweringEmitter.cpp
CompressInstEmitter.cpp
+ MacroFusionPredicatorEmitter.cpp
RegisterBankEmitter.cpp
RegisterInfoEmitter.cpp
SearchableTableEmitter.cpp
diff --git a/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp b/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
new file mode 100644
index 00000000000000..422f9fb4297147
--- /dev/null
+++ b/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
@@ -0,0 +1,236 @@
+//===------ MacroFusionPredicatorEmitter.cpp - Generator for Fusion ------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+//
+// MacroFusionPredicatorEmitter implements a TableGen-driven predicators
+// generator for macro-op fusions.
+//
+// This TableGen backend processes `Fusion` definitions and generates
+// predicators for checking if input instructions can be fused. These
+// predicators can used in `MacroFusion` DAG mutation.
+//
+// The generated header file contains two parts: one for predicator
+// declarations and one for predicator implementations. The user can get them
+// by defining macro `GET_<TargetName>_MACRO_FUSION_PRED_DECL` or
+// `GET_<TargetName>_MACRO_FUSION_PRED_IMPL` and then including the generated
+// header file.
+//
+// The generated predicator will be like:
+//
+// ```
+// bool isNAME(const TargetInstrInfo &TII,
+// const TargetSubtargetInfo &STI,
+// const MachineInstr *FirstMI,
+// const MachineInstr &SecondMI) {
+// auto &MRI = SecondMI.getMF()->getRegInfo();
+// /* Predicates */
+// return true;
+// }
+// ```
+//
+// The `Predicates` part is generated from a list of `FusionPredicate`, which
+// can be predefined predicates, a raw code string or `MCInstPredicate` defined
+// in TargetInstrPredicate.td.
+//
+//===---------------------------------------------------------------------===//
+
+#include "CodeGenTarget.h"
+#include "PredicateExpander.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/TableGen/Error.h"
+#include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/TableGenBackend.h"
+#include <set>
+#include <vector>
+
+using namespace llvm;
+
+#define DEBUG_TYPE "macro-fusion-predicator"
+
+namespace {
+class MacroFusionPredicatorEmitter {
+ RecordKeeper &Records;
+ CodeGenTarget Target;
+
+ void emitMacroFusionDecl(std::vector<Record *> Fusions, PredicateExpander &PE,
+ raw_ostream &OS);
+ void emitMacroFusionImpl(std::vector<Record *> Fusions, PredicateExpander &PE,
+ raw_ostream &OS);
+ void emitPredicates(std::vector<Record *> &FirstPredicate,
+ PredicateExpander &PE, raw_ostream &OS);
+ void emitFirstPredicate(Record *SecondPredicate, PredicateExpander &PE,
+ raw_ostream &OS);
+ void emitSecondPredicate(Record *SecondPredicate, PredicateExpander &PE,
+ raw_ostream &OS);
+ void emitBothPredicate(Record *Predicates, PredicateExpander &PE,
+ raw_ostream &OS);
+
+public:
+ MacroFusionPredicatorEmitter(RecordKeeper &R) : Records(R), Target(R) {}
+
+ void run(raw_ostream &OS);
+};
+} // End anonymous namespace.
+
+void MacroFusionPredicatorEmitter::emitMacroFusionDecl(
+ std::vector<Record *> Fusions, PredicateExpander &PE, raw_ostream &OS) {
+ OS << "#ifdef GET_" << Target.getName() << "_MACRO_FUSION_PRED_DECL\n";
+ OS << "#undef GET_" << Target.getName() << "_MACRO_FUSION_PRED_DECL\n\n";
+ OS << "namespace llvm {\n";
+
+ for (Record *Fusion : Fusions) {
+ OS << "bool is" << Fusion->getName() << "(const TargetInstrInfo &, "
+ << "const TargetSubtargetInfo &, "
+ << "const MachineInstr *, "
+ << "const MachineInstr &);\n";
+ }
+
+ OS << "} // end namespace llvm\n";
+ OS << "\n#endif\n";
+}
+
+void MacroFusionPredicatorEmitter::emitMacroFusionImpl(
+ std::vector<Record *> Fusions, PredicateExpander &PE, raw_ostream &OS) {
+ OS << "#ifdef GET_" << Target.getName() << "_MACRO_FUSION_PRED_IMPL\n";
+ OS << "#undef GET_" << Target.getName() << "_MACRO_FUSION_PRED_IMPL\n\n";
+ OS << "namespace llvm {\n";
+
+ for (Record *Fusion : Fusions) {
+ std::vector<Record *> Predicates =
+ Fusion->getValueAsListOfDefs("Predicates");
+
+ OS << "bool is" << Fusion->getName() << "(\n";
+ OS.indent(5) << "const TargetInstrInfo &TII,\n";
+ OS.indent(5) << "const TargetSubtargetInfo &STI,\n";
+ OS.indent(5) << "const MachineInstr *FirstMI,\n";
+ OS.indent(5) << "const MachineInstr &SecondMI) {\n";
+ OS.indent(2) << "auto &MRI = SecondMI.getMF()->getRegInfo();\n";
+
+ emitPredicates(Predicates, PE, OS);
+
+ OS.indent(2) << "return true;\n";
+ OS << "}\n";
+ }
+
+ OS << "} // end namespace llvm\n";
+ OS << "\n#endif\n";
+}
+
+void MacroFusionPredicatorEmitter::emitPredicates(
+ std::vector<Record *> &Predicates, PredicateExpander &PE, raw_ostream &OS) {
+ for (Record *Predicate : Predicates) {
+ Record *Target = Predicate->getValueAsDef("Target");
+ if (Target->getName() == "first")
+ emitFirstPredicate(Predicate, PE, OS);
+ else if (Target->getName() == "second")
+ emitSecondPredicate(Predicate, PE, OS);
+ else if (Target->getName() == "both")
+ emitBothPredicate(Predicate, PE, OS);
+ else
+ PrintFatalError(Target->getLoc(),
+ "Unsupported 'FusionTarget': " + Target->getName());
+ }
+}
+
+void MacroFusionPredicatorEmitter::emitFirstPredicate(Record *Predicate,
+ PredicateExpander &PE,
+ raw_ostream &OS) {
+ if (Predicate->isSubClassOf("WildcardPred")) {
+ OS.indent(2) << "if (!FirstMI)\n";
+ OS.indent(2) << " return "
+ << (Predicate->getValueAsBit("ReturnValue") ? "true" : "false")
+ << ";\n";
+ } else if (Predicate->isSubClassOf("OneUsePred")) {
+ OS.indent(2) << "{\n";
+ OS.indent(4) << "Register FirstDest = FirstMI->getOperand(0).getReg();\n";
+ OS.indent(4)
+ << "if (FirstDest.isVirtual() && !MRI.hasOneNonDBGUse(FirstDest))\n";
+ OS.indent(4) << " return false;\n";
+ OS.indent(2) << "}\n";
+ } else if (Predicate->isSubClassOf(
+ "FirstFusionPredicateWithMCInstPredicate")) {
+ OS.indent(2) << "{\n";
+ OS.indent(4) << "const MachineInstr *MI = FirstMI;\n";
+ OS.indent(4) << "if (";
+ PE.setNegatePredicate(true);
+ PE.setIndentLevel(3);
+ PE.expandPredicate(OS, Predicate->getValueAsDef("Predicate"));
+ OS << ")\n";
+ OS.indent(4) << " return false;\n";
+ OS.indent(2) << "}\n";
+ } else {
+ PrintFatalError(Predicate->getLoc(),
+ "Unsupported predicate for first instruction: " +
+ Predicate->getType()->getAsString());
+ }
+}
+
+void MacroFusionPredicatorEmitter::emitSecondPredicate(Record *Predicate,
+ PredicateExpander &PE,
+ raw_ostream &OS) {
+ if (Predicate->isSubClassOf("SecondFusionPredicateWithMCInstPredicate")) {
+ OS.indent(2) << "{\n";
+ OS.indent(4) << "const MachineInstr *MI = &SecondMI;\n";
+ OS.indent(4) << "if (";
+ PE.setNegatePredicate(true);
+ PE.setIndentLevel(3);
+ PE.expandPredicate(OS, Predicate->getValueAsDef("Predicate"));
+ OS << ")\n";
+ OS.indent(4) << " return false;\n";
+ OS.indent(2) << "}\n";
+ } else {
+ PrintFatalError(Predicate->getLoc(),
+ "Unsupported predicate for first instruction: " +
+ Predicate->getType()->getAsString());
+ }
+}
+
+void MacroFusionPredicatorEmitter::emitBothPredicate(Record *Predicate,
+ PredicateExpander &PE,
+ raw_ostream &OS) {
+ if (Predicate->isSubClassOf("FusionPredicateWithCode"))
+ OS << Predicate->getValueAsString("Predicate");
+ else if (Predicate->isSubClassOf("BothFusionPredicateWithMCInstPredicate")) {
+ Record *MCPred = Predicate->getValueAsDef("Predicate");
+ emitFirstPredicate(MCPred, PE, OS);
+ emitSecondPredicate(MCPred, PE, OS);
+ } else if (Predicate->isSubClassOf("TieReg")) {
+ int FirstOpIdx = Predicate->getValueAsInt("FirstOpIdx");
+ int SecondOpIdx = Predicate->getValueAsInt("SecondOpIdx");
+ OS.indent(2) << "if (!(FirstMI->getOperand(" << FirstOpIdx
+ << ").isReg() &&\n";
+ OS.indent(2) << " SecondMI.getOperand(" << SecondOpIdx
+ << ").isReg() &&\n";
+ OS.indent(2) << " FirstMI->getOperand(" << FirstOpIdx
+ << ").getReg() == SecondMI.getOperand(" << SecondOpIdx
+ << ").getReg()))\n";
+ OS.indent(2) << " return false;\n";
+ } else
+ PrintFatalError(Predicate->getLoc(),
+ "Unsupported predicate for both instruction: " +
+ Predicate->getType()->getAsString());
+}
+
+void MacroFusionPredicatorEmitter::run(raw_ostream &OS) {
+ // Emit file header.
+ emitSourceFileHeader("Macro Fusion Predicators", OS);
+
+ PredicateExpander PE(Target.getName());
+ PE.setByRef(false);
+ PE.setExpandForMC(false);
+
+ std::vector<Record *> Fusions = Records.getAllDerivedDefinitions("Fusion");
+ // Sort macro fusions by name.
+ sort(Fusions, LessRecord());
+ emitMacroFusionDecl(Fusions, PE, OS);
+ OS << "\n";
+ emitMacroFusionImpl(Fusions, PE, OS);
+}
+
+static TableGen::Emitter::OptClass<MacroFusionPredicatorEmitter>
+ X("gen-macro-fusion-pred", "Generate macro fusion predicators.");
diff --git a/llvm/utils/TableGen/PredicateExpander.cpp b/llvm/utils/TableGen/PredicateExpander.cpp
index 8f96d3307ded8b..d3a73e02cd916f 100644
--- a/llvm/utils/TableGen/PredicateExpander.cpp
+++ b/llvm/utils/TableGen/PredicateExpander.cpp
@@ -194,6 +194,11 @@ void PredicateExpander::expandCheckIsRegOperand(raw_ostream &OS, int OpIndex) {
<< "getOperand(" << OpIndex << ").isReg() ";
}
+void PredicateExpander::expandCheckIsVRegOperand(raw_ostream &OS, int OpIndex) {
+ OS << (shouldNegate() ? "!" : "") << "MI" << (isByRef() ? "." : "->")
+ << "getOperand(" << OpIndex << ").getReg().isVirtual()";
+}
+
void PredicateExpander::expandCheckIsImmOperand(raw_ostream &OS, int OpIndex) {
OS << (shouldNegate() ? "!" : "") << "MI" << (isByRef() ? "." : "->")
<< "getOperand(" << OpIndex << ").isImm() ";
@@ -319,6 +324,9 @@ void PredicateExpander::expandPredicate(raw_ostream &OS, const Record *Rec) {
if (Rec->isSubClassOf("CheckIsRegOperand"))
return expandCheckIsRegOperand(OS, Rec->getValueAsInt("OpIndex"));
+ if (Rec->isSubClassOf("CheckIsVRegOperand"))
+ return expandCheckIsVRegOperand(OS, Rec->getValueAsInt("OpIndex"));
+
if (Rec->isSubClassOf("CheckIsImmOperand"))
return expandCheckIsImmOperand(OS, Rec->getValueAsInt("OpIndex"));
diff --git a/llvm/utils/TableGen/PredicateExpander.h b/llvm/utils/TableGen/PredicateExpander.h
index 27f049a715aad5..cfb0a3d51e6776 100644
--- a/llvm/utils/TableGen/PredicateExpander.h
+++ b/llvm/utils/TableGen/PredicateExpander.h
@@ -75,6 +75,7 @@ class PredicateExpander {
bool IsCheckAll);
void expandTIIFunctionCall(raw_ostream &OS, StringRef MethodName);
void expandCheckIsRegOperand(raw_ostream &OS, int OpIndex);
+ void expandCheckIsVRegOperand(raw_ostream &OS, int OpIndex);
void expandCheckIsImmOperand(raw_ostream &OS, int OpIndex);
void expandCheckInvalidRegOperand(raw_ostream &OS, int OpIndex);
void expandCheckFunctionPredicate(raw_ostream &OS, StringRef MCInstFn,
>From fba9b6ac94de372e8297647e5644b8f079c2b673 Mon Sep 17 00:00:00 2001
From: wangpc <wangpengcheng.pp at bytedance.com>
Date: Tue, 14 Nov 2023 10:48:27 +0800
Subject: [PATCH 3/3] [TableGen] Integrate TableGen-based macro fusion
`Fusion` is inherited from `SubtargetFuture` now. Each definition
of `Fusion` will define a `SubtargetFuture` accordingly.
Two methods `enableMacroFusion` and `getMacroFusions` are added to
`TargetSubtargetInfo`. `enableMacroFusion` indicates whether macro
fusion shoule be enabled and `getMacroFusions` returns a list of
`MacroFusionPredTy` that will be evaluated by MacroFusionMution.
`enableMacroFusion` and `getMacroFusions` will be auto-generated
if the target has `Fusion` definitions.
---
.../llvm/CodeGen/TargetSubtargetInfo.h | 7 ++
llvm/include/llvm/Target/Target.td | 92 +++++++++----------
llvm/include/llvm/Target/TargetSchedule.td | 39 ++++----
llvm/test/TableGen/MacroFusion.td | 22 ++++-
llvm/utils/TableGen/CodeGenTarget.cpp | 1 +
llvm/utils/TableGen/CodeGenTarget.h | 6 ++
llvm/utils/TableGen/SubtargetEmitter.cpp | 42 +++++++++
7 files changed, 145 insertions(+), 64 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
index 55ef95c2854319..84b89336db58a5 100644
--- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
@@ -16,6 +16,7 @@
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/CodeGen/MacroFusion.h"
#include "llvm/CodeGen/PBQPRAConstraint.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/IR/GlobalValue.h"
@@ -323,6 +324,12 @@ class TargetSubtargetInfo : public MCSubtargetInfo {
/// helps removing redundant copies generated by register allocator when
/// handling complex eviction chains.
virtual bool enableSpillageCopyElimination() const { return false; }
+
+ /// Enable macro fusion for this subtarget.
+ virtual bool enableMacroFusion() const { return false; }
+
+ /// Get the list of MacroFusion predicates.
+ virtual std::vector<MacroFusionPredTy> getMacroFusions() const { return {}; };
};
} // end namespace llvm
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index 3b1d2f45267e9e..0d97a47190b196 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -459,6 +459,52 @@ class DwarfRegAlias<Register reg> {
Register DwarfAlias = reg;
}
+//===----------------------------------------------------------------------===//
+// SubtargetFeature - A characteristic of the chip set.
+//
+class SubtargetFeature<string n, string f, string v, string d,
+ list<SubtargetFeature> i = []> {
+ // Name - Feature name. Used by command line (-mattr=) to determine the
+ // appropriate target chip.
+ //
+ string Name = n;
+
+ // FieldName - Field in XXXSubtarget to be set by feature.
+ //
+ string FieldName = f;
+
+ // Value - Value the XXXSubtarget field to be set to by feature.
+ //
+ // A value of "true" or "false" implies the field is a bool. Otherwise,
+ // it is assumed to be an integer. the integer value may be the name of an
+ // enum constant. If multiple features use the same integer field, the
+ // field will be set to the maximum value of all enabled features that
+ // share the field.
+ //
+ string Value = v;
+
+ // Desc - Feature description. Used by command line (-mattr=) to display help
+ // information.
+ //
+ string Desc = d;
+
+ // Implies - Features that this feature implies are present. If one of those
+ // features isn't set, then this one shouldn't be set either.
+ //
+ list<SubtargetFeature> Implies = i;
+}
+
+/// Specifies a Subtarget feature that this instruction is deprecated on.
+class Deprecated<SubtargetFeature dep> {
+ SubtargetFeature DeprecatedFeatureMask = dep;
+}
+
+/// A custom predicate used to determine if an instruction is
+/// deprecated or not.
+class ComplexDeprecationPredicate<string dep> {
+ string ComplexDeprecationPredicate = dep;
+}
+
//===----------------------------------------------------------------------===//
// Pull in the common support for MCPredicate (portable scheduling predicates).
//
@@ -1680,52 +1726,6 @@ class Target {
int AllowRegisterRenaming = 0;
}
-//===----------------------------------------------------------------------===//
-// SubtargetFeature - A characteristic of the chip set.
-//
-class SubtargetFeature<string n, string f, string v, string d,
- list<SubtargetFeature> i = []> {
- // Name - Feature name. Used by command line (-mattr=) to determine the
- // appropriate target chip.
- //
- string Name = n;
-
- // FieldName - Field in XXXSubtarget to be set by feature.
- //
- string FieldName = f;
-
- // Value - Value the XXXSubtarget field to be set to by feature.
- //
- // A value of "true" or "false" implies the field is a bool. Otherwise,
- // it is assumed to be an integer. the integer value may be the name of an
- // enum constant. If multiple features use the same integer field, the
- // field will be set to the maximum value of all enabled features that
- // share the field.
- //
- string Value = v;
-
- // Desc - Feature description. Used by command line (-mattr=) to display help
- // information.
- //
- string Desc = d;
-
- // Implies - Features that this feature implies are present. If one of those
- // features isn't set, then this one shouldn't be set either.
- //
- list<SubtargetFeature> Implies = i;
-}
-
-/// Specifies a Subtarget feature that this instruction is deprecated on.
-class Deprecated<SubtargetFeature dep> {
- SubtargetFeature DeprecatedFeatureMask = dep;
-}
-
-/// A custom predicate used to determine if an instruction is
-/// deprecated or not.
-class ComplexDeprecationPredicate<string dep> {
- string ComplexDeprecationPredicate = dep;
-}
-
//===----------------------------------------------------------------------===//
// Processor chip sets - These values represent each of the chip sets supported
// by the scheduler. Each Processor definition requires corresponding
diff --git a/llvm/include/llvm/Target/TargetSchedule.td b/llvm/include/llvm/Target/TargetSchedule.td
index 74c9cd085b4ee2..003cf2d5844d45 100644
--- a/llvm/include/llvm/Target/TargetSchedule.td
+++ b/llvm/include/llvm/Target/TargetSchedule.td
@@ -658,7 +658,10 @@ def OneUse : OneUsePred;
// return true;
// }
// ```
-class Fusion<list<FusionPredicate> predicates> {
+class Fusion<string name, string fieldName, string desc, list<FusionPredicate> predicates>
+ : SubtargetFeature<name, fieldName, "true", desc> {
+ string Name = name;
+ string Desc = desc;
list<FusionPredicate> Predicates = predicates;
}
@@ -679,21 +682,23 @@ class Fusion<list<FusionPredicate> predicates> {
// return true;
// }
// ```
-class SimpleFusion<MCInstPredicate firstPred, MCInstPredicate secondPred,
+class SimpleFusion<string name, string fieldName, string desc,
+ MCInstPredicate firstPred, MCInstPredicate secondPred,
list<FusionPredicate> prolog = [],
list<FusionPredicate> epilog = []>
- : Fusion<!listconcat(
- prolog,
- [
- SecondFusionPredicateWithMCInstPredicate<secondPred>,
- WildcardTrue,
- FirstFusionPredicateWithMCInstPredicate<firstPred>,
- SecondFusionPredicateWithMCInstPredicate<
- CheckAny<[
- CheckIsVRegOperand<0>,
- CheckSameRegOperand<0, 1>
- ]>>,
- OneUse,
- TieReg<0, 1>,
- ],
- epilog)>;
+ : Fusion<name, fieldName, desc,
+ !listconcat(
+ prolog,
+ [
+ SecondFusionPredicateWithMCInstPredicate<secondPred>,
+ WildcardTrue,
+ FirstFusionPredicateWithMCInstPredicate<firstPred>,
+ SecondFusionPredicateWithMCInstPredicate<
+ CheckAny<[
+ CheckIsVRegOperand<0>,
+ CheckSameRegOperand<0, 1>
+ ]>>,
+ OneUse,
+ TieReg<0, 1>,
+ ],
+ epilog)>;
diff --git a/llvm/test/TableGen/MacroFusion.td b/llvm/test/TableGen/MacroFusion.td
index 72b0d1e19144f7..64ded75d1f0865 100644
--- a/llvm/test/TableGen/MacroFusion.td
+++ b/llvm/test/TableGen/MacroFusion.td
@@ -1,4 +1,5 @@
// RUN: llvm-tblgen -gen-macro-fusion-pred -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-PREDICATOR
+// RUN: llvm-tblgen -gen-subtarget -I %p/../../include %s | FileCheck %s --check-prefix=CHECK-SUBTARGET
include "llvm/Target/Target.td"
@@ -33,7 +34,8 @@ let Namespace = "Test" in {
def Inst0 : TestInst<0>;
def Inst1 : TestInst<1>;
-def TestFusion: SimpleFusion<CheckOpcode<[Inst0]>,
+def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", "Test Fusion",
+ CheckOpcode<[Inst0]>,
CheckAll<[
CheckOpcode<[Inst1]>,
CheckRegOperand<0, X0>
@@ -95,3 +97,21 @@ def TestFusion: SimpleFusion<CheckOpcode<[Inst0]>,
// CHECK-PREDICATOR-NEXT: } // end namespace llvm
// CHECK-PREDICATOR-EMPTY:
// CHECK-PREDICATOR-NEXT: #endif
+
+// Check that we have generated target subfeature.
+// CHECK-SUBTARGET: { "test-fusion", "Test Fusion", Test::TestFusion
+
+// Check that we have generated `enableMacroFusion()` and `getMacroFusions()` function.
+// CHECK-SUBTARGET: bool enableMacroFusion() const override;
+// CHECK-SUBTARGET: std::vector<MacroFusionPredTy> getMacroFusions() const override;
+
+// CHECK-SUBTARGET: bool TestGenSubtargetInfo::enableMacroFusion() const {
+// CHECK-SUBTARGET-NEXT: if (hasFeature(Test::TestFusion)) return true;
+// CHECK-SUBTARGET-NEXT: return false;
+// CHECK-SUBTARGET-NEXT: }
+
+// CHECK-SUBTARGET: std::vector<MacroFusionPredTy> TestGenSubtargetInfo::getMacroFusions() const {
+// CHECK-SUBTARGET-NEXT: std::vector<MacroFusionPredTy> Fusions;
+// CHECK-SUBTARGET-NEXT: if (hasFeature(Test::TestFusion)) Fusions.push_back(llvm::isTestFusion);
+// CHECK-SUBTARGET-NEXT: return Fusions;
+// CHECK-SUBTARGET-NEXT: }
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index 53efa66f9dfc1b..37fa30349eea9f 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -291,6 +291,7 @@ CodeGenTarget::CodeGenTarget(RecordKeeper &records)
if (Targets.size() != 1)
PrintFatalError("Multiple subclasses of Target defined!");
TargetRec = Targets[0];
+ MacroFusions = Records.getAllDerivedDefinitions("Fusion");
}
CodeGenTarget::~CodeGenTarget() {
diff --git a/llvm/utils/TableGen/CodeGenTarget.h b/llvm/utils/TableGen/CodeGenTarget.h
index a2b559d53b19c2..d7388dceca37fe 100644
--- a/llvm/utils/TableGen/CodeGenTarget.h
+++ b/llvm/utils/TableGen/CodeGenTarget.h
@@ -64,6 +64,8 @@ class CodeGenTarget {
mutable std::vector<Record*> RegAltNameIndices;
mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes;
CodeGenHwModes CGH;
+ std::vector<Record *> MacroFusions;
+
void ReadRegAltNameIndices() const;
void ReadInstructions() const;
void ReadLegalValueTypes() const;
@@ -149,6 +151,10 @@ class CodeGenTarget {
const CodeGenHwModes &getHwModes() const { return CGH; }
+ bool hasMacroFusion() const { return !MacroFusions.empty(); }
+
+ const std::vector<Record *> getMacroFusions() const { return MacroFusions; }
+
private:
DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> &
getInstructions() const {
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index f7a7172d61fc61..2da35a735aceb5 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -133,6 +133,8 @@ class SubtargetEmitter {
void EmitMCInstrAnalysisPredicateFunctions(raw_ostream &OS);
void EmitSchedModel(raw_ostream &OS);
+ void emitGetMacroFusions(const std::string &ClassName, raw_ostream &OS);
+ void emitEnableMacroFusion(const std::string &ClassName, raw_ostream &OS);
void EmitHwModeCheck(const std::string &ClassName, raw_ostream &OS);
void ParseFeaturesFunction(raw_ostream &OS);
@@ -1786,6 +1788,39 @@ void SubtargetEmitter::EmitHwModeCheck(const std::string &ClassName,
OS << " return 0;\n}\n";
}
+void SubtargetEmitter::emitEnableMacroFusion(const std::string &ClassName,
+ raw_ostream &OS) {
+ if (!TGT.hasMacroFusion())
+ return;
+
+ OS << "bool " << ClassName << "::enableMacroFusion() const {\n";
+ for (auto *Fusion : TGT.getMacroFusions())
+ OS.indent(2) << "if (hasFeature(" << Target
+ << "::" << Fusion->getNameInitAsString()
+ << ")) return true;\n";
+
+ OS.indent(2) << "return false;\n";
+ OS << "}\n";
+}
+
+void SubtargetEmitter::emitGetMacroFusions(const std::string &ClassName,
+ raw_ostream &OS) {
+ if (!TGT.hasMacroFusion())
+ return;
+
+ OS << "std::vector<MacroFusionPredTy> " << ClassName
+ << "::getMacroFusions() const {\n";
+ OS.indent(2) << "std::vector<MacroFusionPredTy> Fusions;\n";
+ for (auto *Fusion : TGT.getMacroFusions()) {
+ std::string Name = Fusion->getNameInitAsString();
+ OS.indent(2) << "if (hasFeature(" << Target << "::" << Name
+ << ")) Fusions.push_back(llvm::is" << Name << ");\n";
+ }
+
+ OS.indent(2) << "return Fusions;\n";
+ OS << "}\n";
+}
+
// Produces a subtarget specific function for parsing
// the subtarget features string.
void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
@@ -1987,6 +2022,11 @@ void SubtargetEmitter::run(raw_ostream &OS) {
<< " const;\n";
if (TGT.getHwModes().getNumModeIds() > 1)
OS << " unsigned getHwMode() const override;\n";
+ if (TGT.hasMacroFusion()) {
+ OS << " bool enableMacroFusion() const override;\n";
+ OS << " std::vector<MacroFusionPredTy> getMacroFusions() const "
+ "override;\n";
+ }
STIPredicateExpander PE(Target);
PE.setByRef(false);
@@ -2044,6 +2084,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
EmitSchedModelHelpers(ClassName, OS);
EmitHwModeCheck(ClassName, OS);
+ emitEnableMacroFusion(ClassName, OS);
+ emitGetMacroFusions(ClassName, OS);
OS << "} // end namespace llvm\n\n";
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