[llvm] [RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (PR #73721)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 11:39:38 PST 2023
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/73721
>From f728327a5ecb7de75f3bd040a9db5cb0a9314e06 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 28 Nov 2023 15:25:38 -0800
Subject: [PATCH 1/2] [RISCV][MC] Pass MCSubtargetInfo down to
shouldForceRelocation and evaluateTargetFixup.
This attempts to address the issue raised here https://discourse.llvm.org/t/possible-problem-related-to-subtarget-usage/75283
---
llvm/include/llvm/MC/MCAsmBackend.h | 6 +++--
llvm/include/llvm/MC/MCAssembler.h | 9 +++++---
llvm/lib/MC/MCAssembler.cpp | 22 ++++++++++---------
.../MCTargetDesc/AArch64AsmBackend.cpp | 6 +++--
.../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 6 +++--
.../Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 3 ++-
.../Target/ARM/MCTargetDesc/ARMAsmBackend.h | 3 ++-
.../Target/AVR/MCTargetDesc/AVRAsmBackend.cpp | 3 ++-
.../Target/AVR/MCTargetDesc/AVRAsmBackend.h | 3 ++-
.../MCTargetDesc/HexagonAsmBackend.cpp | 3 ++-
.../MCTargetDesc/LoongArchAsmBackend.cpp | 5 +++--
.../MCTargetDesc/LoongArchAsmBackend.h | 3 ++-
.../Mips/MCTargetDesc/MipsAsmBackend.cpp | 3 ++-
.../Target/Mips/MCTargetDesc/MipsAsmBackend.h | 3 ++-
.../PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 3 ++-
.../RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 11 +++++-----
.../RISCV/MCTargetDesc/RISCVAsmBackend.h | 7 +++---
.../Sparc/MCTargetDesc/SparcAsmBackend.cpp | 3 ++-
.../MCTargetDesc/SystemZMCAsmBackend.cpp | 8 ++++---
.../Target/VE/MCTargetDesc/VEAsmBackend.cpp | 3 ++-
.../Target/X86/MCTargetDesc/X86AsmBackend.cpp | 7 +++---
21 files changed, 74 insertions(+), 46 deletions(-)
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index ebb33d0ab61f4..8931e8cab2fa1 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -101,7 +101,8 @@ class MCAsmBackend {
/// Hook to check if a relocation is needed for some target specific reason.
virtual bool shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
return false;
}
@@ -124,7 +125,8 @@ class MCAsmBackend {
virtual bool evaluateTargetFixup(const MCAssembler &Asm,
const MCAsmLayout &Layout,
const MCFixup &Fixup, const MCFragment *DF,
- const MCValue &Target, uint64_t &Value,
+ const MCValue &Target,
+ const MCSubtargetInfo *STI, uint64_t &Value,
bool &WasForced) {
llvm_unreachable("Need to implement hook if target has custom fixups");
}
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index 5e1fc738b1dab..5ae5f6d709385 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -185,7 +185,8 @@ class MCAssembler {
/// relocation.
bool evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup,
const MCFragment *DF, MCValue &Target,
- uint64_t &Value, bool &WasForced) const;
+ const MCSubtargetInfo *STI, uint64_t &Value,
+ bool &WasForced) const;
/// Check whether a fixup can be satisfied, or whether it needs to be relaxed
/// (increased in size, in order to hold its value correctly).
@@ -221,8 +222,10 @@ class MCAssembler {
/// finishLayout - Finalize a layout, including fragment lowering.
void finishLayout(MCAsmLayout &Layout);
- std::tuple<MCValue, uint64_t, bool>
- handleFixup(const MCAsmLayout &Layout, MCFragment &F, const MCFixup &Fixup);
+ std::tuple<MCValue, uint64_t, bool> handleFixup(const MCAsmLayout &Layout,
+ MCFragment &F,
+ const MCFixup &Fixup,
+ const MCSubtargetInfo *STI);
public:
struct Symver {
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index 901a66f156663..def13044dfccc 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -193,9 +193,9 @@ const MCSymbol *MCAssembler::getAtom(const MCSymbol &S) const {
return S.getFragment()->getAtom();
}
-bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
- const MCFixup &Fixup, const MCFragment *DF,
- MCValue &Target, uint64_t &Value,
+bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup,
+ const MCFragment *DF, MCValue &Target,
+ const MCSubtargetInfo *STI, uint64_t &Value,
bool &WasForced) const {
++stats::evaluateFixup;
@@ -227,7 +227,7 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
if (IsTarget)
return getBackend().evaluateTargetFixup(*this, Layout, Fixup, DF, Target,
- Value, WasForced);
+ STI, Value, WasForced);
unsigned FixupFlags = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags;
bool IsPCRel = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags &
@@ -282,7 +282,8 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
}
// Let the backend force a relocation if needed.
- if (IsResolved && getBackend().shouldForceRelocation(*this, Fixup, Target)) {
+ if (IsResolved &&
+ getBackend().shouldForceRelocation(*this, Fixup, Target, STI)) {
IsResolved = false;
WasForced = true;
}
@@ -796,13 +797,13 @@ void MCAssembler::writeSectionData(raw_ostream &OS, const MCSection *Sec,
std::tuple<MCValue, uint64_t, bool>
MCAssembler::handleFixup(const MCAsmLayout &Layout, MCFragment &F,
- const MCFixup &Fixup) {
+ const MCFixup &Fixup, const MCSubtargetInfo *STI) {
// Evaluate the fixup.
MCValue Target;
uint64_t FixedValue;
bool WasForced;
- bool IsResolved = evaluateFixup(Layout, Fixup, &F, Target, FixedValue,
- WasForced);
+ bool IsResolved =
+ evaluateFixup(Layout, Fixup, &F, Target, STI, FixedValue, WasForced);
if (!IsResolved) {
// The fixup was unresolved, we need a relocation. Inform the object
// writer of the relocation, and give it an opportunity to adjust the
@@ -936,7 +937,7 @@ void MCAssembler::layout(MCAsmLayout &Layout) {
bool IsResolved;
MCValue Target;
std::tie(Target, FixedValue, IsResolved) =
- handleFixup(Layout, Frag, Fixup);
+ handleFixup(Layout, Frag, Fixup, STI);
getBackend().applyFixup(*this, Fixup, Target, Contents, FixedValue,
IsResolved, STI);
}
@@ -960,7 +961,8 @@ bool MCAssembler::fixupNeedsRelaxation(const MCFixup &Fixup,
MCValue Target;
uint64_t Value;
bool WasForced;
- bool Resolved = evaluateFixup(Layout, Fixup, DF, Target, Value, WasForced);
+ bool Resolved = evaluateFixup(Layout, Fixup, DF, Target,
+ DF->getSubtargetInfo(), Value, WasForced);
if (Target.getSymA() &&
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_X86_ABS8 &&
Fixup.getKind() == FK_Data_1)
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index c7ff14c252f12..a6900b8963bb3 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -100,7 +100,8 @@ class AArch64AsmBackend : public MCAsmBackend {
unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
};
} // end anonymous namespace
@@ -499,7 +500,8 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
unsigned Kind = Fixup.getKind();
if (Kind >= FirstLiteralRelocationKind)
return true;
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index e18c04e623149..f91f36ed851b7 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -53,7 +53,8 @@ class AMDGPUAsmBackend : public MCAsmBackend {
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
};
} //End anonymous namespace
@@ -192,7 +193,8 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,
const MCFixup &Fixup,
- const MCValue &) {
+ const MCValue &,
+ const MCSubtargetInfo *STI) {
return Fixup.getKind() >= FirstLiteralRelocationKind;
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 41b3c6005231e..534434fef5ac8 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -908,7 +908,8 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
const MCSymbolRefExpr *A = Target.getSymA();
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
const unsigned FixupKind = Fixup.getKind();
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
index 40d111b797067..328eed9b0ec4f 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
@@ -36,7 +36,8 @@ class ARMAsmBackend : public MCAsmBackend {
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, uint64_t Value,
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
index c94469c8d9f3d..d520880d73bbd 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
@@ -507,7 +507,8 @@ bool AVRAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
switch ((unsigned)Fixup.getKind()) {
default:
return Fixup.getKind() >= FirstLiteralRelocationKind;
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
index 3081fe1fd58c0..023660f0ff140 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
@@ -60,7 +60,8 @@ class AVRAsmBackend : public MCAsmBackend {
const MCSubtargetInfo *STI) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
private:
Triple::OSType OSType;
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
index 76b4dc4e5afa4..f9a0ba3608e6d 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -202,7 +202,8 @@ class HexagonAsmBackend : public MCAsmBackend {
}
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override {
switch(Fixup.getTargetKind()) {
default:
llvm_unreachable("Unknown Fixup Kind!");
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index a35916d2ad219..14bcef7c7d265 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -162,12 +162,13 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
if (Fixup.getKind() >= FirstLiteralRelocationKind)
return true;
switch (Fixup.getTargetKind()) {
default:
- return STI.hasFeature(LoongArch::FeatureRelax);
+ return STI->hasFeature(LoongArch::FeatureRelax);
case FK_Data_1:
case FK_Data_2:
case FK_Data_4:
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
index f840f9fa2b6a0..d1fbf788e8a8d 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
@@ -41,7 +41,8 @@ class LoongArchAsmBackend : public MCAsmBackend {
const MCSubtargetInfo *STI) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
const MCRelaxableFragment *DF,
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 7eca49e709a0c..fc95b61fd4df5 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -544,7 +544,8 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
if (Fixup.getKind() >= FirstLiteralRelocationKind)
return true;
const unsigned FixupKind = Fixup.getKind();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
index 228a0b4c407c5..2dd68b6012385 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
@@ -68,7 +68,8 @@ class MipsAsmBackend : public MCAsmBackend {
const MCSubtargetInfo *STI) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
bool isMicroMips(const MCSymbol *Sym) const override;
}; // class MipsAsmBackend
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index 8bd27571a750a..251737ed12758 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -162,7 +162,8 @@ class PPCAsmBackend : public MCAsmBackend {
}
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override {
MCFixupKind Kind = Fixup.getKind();
switch ((unsigned)Kind) {
default:
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index dfc3c9e9908d8..716fb67c58248 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -108,7 +108,8 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
// necessary for correctness as offsets may change during relaxation.
bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
if (Fixup.getKind() >= FirstLiteralRelocationKind)
return true;
switch (Fixup.getTargetKind()) {
@@ -128,7 +129,7 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
return true;
}
- return STI.hasFeature(RISCV::FeatureRelax) || ForceRelocs;
+ return STI->hasFeature(RISCV::FeatureRelax) || ForceRelocs;
}
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
@@ -514,8 +515,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
bool RISCVAsmBackend::evaluateTargetFixup(
const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup,
- const MCFragment *DF, const MCValue &Target, uint64_t &Value,
- bool &WasForced) {
+ const MCFragment *DF, const MCValue &Target, const MCSubtargetInfo *STI,
+ uint64_t &Value, bool &WasForced) {
const MCFixup *AUIPCFixup;
const MCFragment *AUIPCDF;
MCValue AUIPCTarget;
@@ -565,7 +566,7 @@ bool RISCVAsmBackend::evaluateTargetFixup(
Value = Layout.getSymbolOffset(SA) + AUIPCTarget.getConstant();
Value -= Layout.getFragmentOffset(AUIPCDF) + AUIPCFixup->getOffset();
- if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget)) {
+ if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, STI)) {
WasForced = true;
return false;
}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
index 99b0d7b223b99..2ad6534ac8bce 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
@@ -50,8 +50,8 @@ class RISCVAsmBackend : public MCAsmBackend {
bool evaluateTargetFixup(const MCAssembler &Asm, const MCAsmLayout &Layout,
const MCFixup &Fixup, const MCFragment *DF,
- const MCValue &Target, uint64_t &Value,
- bool &WasForced) override;
+ const MCValue &Target, const MCSubtargetInfo *STI,
+ uint64_t &Value, bool &WasForced) override;
bool handleAddSubRelocations(const MCAsmLayout &Layout, const MCFragment &F,
const MCFixup &Fixup, const MCValue &Target,
@@ -66,7 +66,8 @@ class RISCVAsmBackend : public MCAsmBackend {
createObjectTargetWriter() const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
const MCRelaxableFragment *DF,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
index 9e14f96b6caa0..240f5396855c8 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -272,7 +272,8 @@ namespace {
}
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override {
if (Fixup.getKind() >= FirstLiteralRelocationKind)
return true;
switch ((Sparc::Fixups)Fixup.getKind()) {
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
index eafe41124897d..e32023ccedf53 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
@@ -116,7 +116,8 @@ class SystemZMCAsmBackend : public MCAsmBackend {
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
uint64_t Value, bool IsResolved,
@@ -164,8 +165,9 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
}
bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
- const MCFixup &Fixup,
- const MCValue &) {
+ const MCFixup &Fixup,
+ const MCValue &,
+ const MCSubtargetInfo *STI) {
return Fixup.getKind() >= FirstLiteralRelocationKind;
}
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
index 2773a7aabab74..05f7c00bdc14f 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
@@ -132,7 +132,8 @@ class VEAsmBackend : public MCAsmBackend {
}
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override {
switch ((VE::Fixups)Fixup.getKind()) {
default:
return false;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index e01ce4f43143b..99dc9797f6df9 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -173,7 +173,8 @@ class X86AsmBackend : public MCAsmBackend {
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
- const MCValue &Target) override;
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) override;
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
const MCValue &Target, MutableArrayRef<char> Data,
@@ -645,8 +646,8 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
}
bool X86AsmBackend::shouldForceRelocation(const MCAssembler &,
- const MCFixup &Fixup,
- const MCValue &) {
+ const MCFixup &Fixup, const MCValue &,
+ const MCSubtargetInfo *STI) {
return Fixup.getKind() >= FirstLiteralRelocationKind;
}
>From 696d8bb6c4ce826eda637930ac8743798166fff9 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 7 Dec 2023 11:39:11 -0800
Subject: [PATCH 2/2] fixup! update test
---
llvm/test/CodeGen/RISCV/relax-per-target-feature.ll | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/test/CodeGen/RISCV/relax-per-target-feature.ll b/llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
index 295e8ffc0dfe6..7e94965cc59bd 100644
--- a/llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
+++ b/llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
@@ -11,6 +11,7 @@ declare dso_local i32 @ext(i32)
; CHECK-NEXT: c.li a0, 31
; CHECK-NEXT: auipc t1, 0
; CHECK-NEXT: R_RISCV_CALL_PLT ext
+; CHECK-NEXT: R_RISCV_RELAX *ABS*
; CHECK-NEXT: jalr zero, 0(t1)
define dso_local i32 @f() #0 {
entry:
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