[llvm] 5384fb3 - [X86] gep-expanded-vector.ll - regenerate checks

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-12-07T14:07:10Z
New Revision: 5384fb3d407c8bf4f34117baf60ddcb273a4b6d2

URL: https://github.com/llvm/llvm-project/commit/5384fb3d407c8bf4f34117baf60ddcb273a4b6d2
DIFF: https://github.com/llvm/llvm-project/commit/5384fb3d407c8bf4f34117baf60ddcb273a4b6d2.diff

LOG: [X86] gep-expanded-vector.ll - regenerate checks

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/gep-expanded-vector.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/gep-expanded-vector.ll b/llvm/test/CodeGen/X86/gep-expanded-vector.ll
index 861de9c90085d..943cd3610c9d3 100644
--- a/llvm/test/CodeGen/X86/gep-expanded-vector.ll
+++ b/llvm/test/CodeGen/X86/gep-expanded-vector.ll
@@ -1,24 +1,42 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: llc < %s -O2 -mattr=avx512f -mtriple=x86_64-unknown | FileCheck %s
 
 %struct.S1 = type { ptr, ptr }
 
-define ptr @malloc_init_state(<64 x ptr> %tmp, i32 %ind) {
+define ptr @malloc_init_state(<64 x ptr> %tmp, i32 %ind) nounwind {
+; CHECK-LABEL: malloc_init_state:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pushq %rbp
+; CHECK-NEXT:    movq %rsp, %rbp
+; CHECK-NEXT:    andq $-64, %rsp
+; CHECK-NEXT:    subq $576, %rsp # imm = 0x240
+; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT:    vpbroadcastq {{.*#+}} zmm8 = [16,16,16,16,16,16,16,16]
+; CHECK-NEXT:    vpaddq %zmm8, %zmm0, %zmm0
+; CHECK-NEXT:    vpaddq %zmm8, %zmm1, %zmm1
+; CHECK-NEXT:    vpaddq %zmm8, %zmm2, %zmm2
+; CHECK-NEXT:    vpaddq %zmm8, %zmm3, %zmm3
+; CHECK-NEXT:    vpaddq %zmm8, %zmm4, %zmm4
+; CHECK-NEXT:    vpaddq %zmm8, %zmm5, %zmm5
+; CHECK-NEXT:    vpaddq %zmm8, %zmm6, %zmm6
+; CHECK-NEXT:    vpaddq %zmm8, %zmm7, %zmm7
+; CHECK-NEXT:    vmovdqa64 %zmm7, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm6, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm5, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm4, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm3, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm2, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm1, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    vmovdqa64 %zmm0, (%rsp)
+; CHECK-NEXT:    andl $63, %edi
+; CHECK-NEXT:    movq (%rsp,%rdi,8), %rax
+; CHECK-NEXT:    movq %rbp, %rsp
+; CHECK-NEXT:    popq %rbp
+; CHECK-NEXT:    vzeroupper
+; CHECK-NEXT:    retq
 entry:
   %Vec = getelementptr inbounds ptr, <64 x ptr> %tmp , i64 2
   %ptr = extractelement <64 x ptr> %Vec, i32 %ind
   ret ptr %ptr
 }
 
-; CHECK: .LCPI0_0:
-; CHECK: .quad 16
-; CHECK: vpbroadcastq    .LCPI0_0(%rip), [[Z1:%zmm[0-9]]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z2:%zmm[0-9]]], [[Z2]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z3:%zmm[0-9]]], [[Z3]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z4:%zmm[0-9]]], [[Z4]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z5:%zmm[0-9]]], [[Z5]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z6:%zmm[0-9]]], [[Z6]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z7:%zmm[0-9]]], [[Z7]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
-; CHECK-NEXT: vpaddq  [[Z1]], [[Z9:%zmm[0-9]]], [[Z9]]
-
-