[llvm] 03edfe6 - Implement SoftPromoteHalf for FFREXP. (#74076)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 03:10:22 PST 2023
Author: Harald van Dijk
Date: 2023-12-07T11:10:17Z
New Revision: 03edfe6148e13654d03b630a6c60e35cb71489cf
URL: https://github.com/llvm/llvm-project/commit/03edfe6148e13654d03b630a6c60e35cb71489cf
DIFF: https://github.com/llvm/llvm-project/commit/03edfe6148e13654d03b630a6c60e35cb71489cf.diff
LOG: Implement SoftPromoteHalf for FFREXP. (#74076)
`llvm/test/CodeGen/RISCV/llvm.frexp.ll` and
`llvm/test/CodeGen/X86/llvm.frexp.ll` contain a number of disabled tests
for unimplemented functionality. This implements one missing part of it.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/test/CodeGen/RISCV/llvm.frexp.ll
llvm/test/CodeGen/X86/llvm.frexp.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index 630aa4a07d7b9..c4605a6b9598a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -2774,6 +2774,8 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
case ISD::FPOWI:
case ISD::FLDEXP: R = SoftPromoteHalfRes_ExpOp(N); break;
+ case ISD::FFREXP: R = SoftPromoteHalfRes_FFREXP(N); break;
+
case ISD::LOAD: R = SoftPromoteHalfRes_LOAD(N); break;
case ISD::SELECT: R = SoftPromoteHalfRes_SELECT(N); break;
case ISD::SELECT_CC: R = SoftPromoteHalfRes_SELECT_CC(N); break;
@@ -2902,6 +2904,24 @@ SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ExpOp(SDNode *N) {
return DAG.getNode(GetPromotionOpcode(NVT, OVT), dl, MVT::i16, Res);
}
+SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FFREXP(SDNode *N) {
+ EVT OVT = N->getValueType(0);
+ EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
+ SDValue Op = GetSoftPromotedHalf(N->getOperand(0));
+ SDLoc dl(N);
+
+ // Promote to the larger FP type.
+ Op = DAG.getNode(GetPromotionOpcode(OVT, NVT), dl, NVT, Op);
+
+ SDValue Res = DAG.getNode(N->getOpcode(), dl,
+ DAG.getVTList(NVT, N->getValueType(1)), Op);
+
+ ReplaceValueWith(SDValue(N, 1), Res.getValue(1));
+
+ // Convert back to FP16 as an integer.
+ return DAG.getNode(GetPromotionOpcode(NVT, OVT), dl, MVT::i16, Res);
+}
+
SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FP_ROUND(SDNode *N) {
EVT RVT = N->getValueType(0);
EVT SVT = N->getOperand(0).getValueType();
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index e9bd54089d062..9d5931b44ac67 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -738,6 +738,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
SDValue SoftPromoteHalfRes_ExpOp(SDNode *N);
+ SDValue SoftPromoteHalfRes_FFREXP(SDNode *N);
SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
SDValue SoftPromoteHalfRes_SELECT(SDNode *N);
diff --git a/llvm/test/CodeGen/RISCV/llvm.frexp.ll b/llvm/test/CodeGen/RISCV/llvm.frexp.ll
index f8a8cfc60f14d..94b9444dfaf8c 100644
--- a/llvm/test/CodeGen/RISCV/llvm.frexp.ll
+++ b/llvm/test/CodeGen/RISCV/llvm.frexp.ll
@@ -18,24 +18,279 @@
; TODO: FIXMEs are copied blindly across from the X86 version of this test.
-; FIXME
-; define { half, i32 } @test_frexp_f16_i32(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; ret { half, i32 } %result
-; }
+define { half, i32 } @test_frexp_f16_i32(half %a) nounwind {
+; RV32IFD-LABEL: test_frexp_f16_i32:
+; RV32IFD: # %bb.0:
+; RV32IFD-NEXT: addi sp, sp, -16
+; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IFD-NEXT: call __extendhfsf2 at plt
+; RV32IFD-NEXT: addi a0, sp, 8
+; RV32IFD-NEXT: call frexpf at plt
+; RV32IFD-NEXT: call __truncsfhf2 at plt
+; RV32IFD-NEXT: fmv.x.w a1, fa0
+; RV32IFD-NEXT: lw a0, 8(sp)
+; RV32IFD-NEXT: lui a2, 1048560
+; RV32IFD-NEXT: or a1, a1, a2
+; RV32IFD-NEXT: fmv.w.x fa0, a1
+; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IFD-NEXT: addi sp, sp, 16
+; RV32IFD-NEXT: ret
+;
+; RV64IFD-LABEL: test_frexp_f16_i32:
+; RV64IFD: # %bb.0:
+; RV64IFD-NEXT: addi sp, sp, -16
+; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IFD-NEXT: call __extendhfsf2 at plt
+; RV64IFD-NEXT: mv a0, sp
+; RV64IFD-NEXT: call frexpf at plt
+; RV64IFD-NEXT: call __truncsfhf2 at plt
+; RV64IFD-NEXT: fmv.x.w a1, fa0
+; RV64IFD-NEXT: ld a0, 0(sp)
+; RV64IFD-NEXT: lui a2, 1048560
+; RV64IFD-NEXT: or a1, a1, a2
+; RV64IFD-NEXT: fmv.w.x fa0, a1
+; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IFD-NEXT: addi sp, sp, 16
+; RV64IFD-NEXT: ret
+;
+; RV32IZFINXZDINX-LABEL: test_frexp_f16_i32:
+; RV32IZFINXZDINX: # %bb.0:
+; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
+; RV32IZFINXZDINX-NEXT: call frexpf at plt
+; RV32IZFINXZDINX-NEXT: call __truncsfhf2 at plt
+; RV32IZFINXZDINX-NEXT: lw a1, 8(sp)
+; RV32IZFINXZDINX-NEXT: lui a2, 1048560
+; RV32IZFINXZDINX-NEXT: or a0, a0, a2
+; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV32IZFINXZDINX-NEXT: ret
+;
+; RV64IZFINXZDINX-LABEL: test_frexp_f16_i32:
+; RV64IZFINXZDINX: # %bb.0:
+; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV64IZFINXZDINX-NEXT: mv a1, sp
+; RV64IZFINXZDINX-NEXT: call frexpf at plt
+; RV64IZFINXZDINX-NEXT: call __truncsfhf2 at plt
+; RV64IZFINXZDINX-NEXT: ld a1, 0(sp)
+; RV64IZFINXZDINX-NEXT: lui a2, 1048560
+; RV64IZFINXZDINX-NEXT: or a0, a0, a2
+; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV64IZFINXZDINX-NEXT: ret
+;
+; RV32I-LABEL: test_frexp_f16_i32:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: slli a0, a0, 16
+; RV32I-NEXT: srli a0, a0, 16
+; RV32I-NEXT: call __extendhfsf2 at plt
+; RV32I-NEXT: addi a1, sp, 8
+; RV32I-NEXT: call frexpf at plt
+; RV32I-NEXT: call __truncsfhf2 at plt
+; RV32I-NEXT: lw a1, 8(sp)
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_frexp_f16_i32:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -16
+; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: slli a0, a0, 48
+; RV64I-NEXT: srli a0, a0, 48
+; RV64I-NEXT: call __extendhfsf2 at plt
+; RV64I-NEXT: addi a1, sp, 4
+; RV64I-NEXT: call frexpf at plt
+; RV64I-NEXT: call __truncsfhf2 at plt
+; RV64I-NEXT: lw a1, 4(sp)
+; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 16
+; RV64I-NEXT: ret
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ ret { half, i32 } %result
+}
-; define half @test_frexp_f16_i32_only_use_fract(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 0
-; ret half %result.0
-; }
+define half @test_frexp_f16_i32_only_use_fract(half %a) nounwind {
+; RV32IFD-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV32IFD: # %bb.0:
+; RV32IFD-NEXT: addi sp, sp, -16
+; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IFD-NEXT: call __extendhfsf2 at plt
+; RV32IFD-NEXT: addi a0, sp, 8
+; RV32IFD-NEXT: call frexpf at plt
+; RV32IFD-NEXT: call __truncsfhf2 at plt
+; RV32IFD-NEXT: fmv.x.w a0, fa0
+; RV32IFD-NEXT: lui a1, 1048560
+; RV32IFD-NEXT: or a0, a0, a1
+; RV32IFD-NEXT: fmv.w.x fa0, a0
+; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IFD-NEXT: addi sp, sp, 16
+; RV32IFD-NEXT: ret
+;
+; RV64IFD-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV64IFD: # %bb.0:
+; RV64IFD-NEXT: addi sp, sp, -16
+; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IFD-NEXT: call __extendhfsf2 at plt
+; RV64IFD-NEXT: mv a0, sp
+; RV64IFD-NEXT: call frexpf at plt
+; RV64IFD-NEXT: call __truncsfhf2 at plt
+; RV64IFD-NEXT: fmv.x.w a0, fa0
+; RV64IFD-NEXT: lui a1, 1048560
+; RV64IFD-NEXT: or a0, a0, a1
+; RV64IFD-NEXT: fmv.w.x fa0, a0
+; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IFD-NEXT: addi sp, sp, 16
+; RV64IFD-NEXT: ret
+;
+; RV32IZFINXZDINX-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV32IZFINXZDINX: # %bb.0:
+; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
+; RV32IZFINXZDINX-NEXT: call frexpf at plt
+; RV32IZFINXZDINX-NEXT: call __truncsfhf2 at plt
+; RV32IZFINXZDINX-NEXT: lui a1, 1048560
+; RV32IZFINXZDINX-NEXT: or a0, a0, a1
+; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV32IZFINXZDINX-NEXT: ret
+;
+; RV64IZFINXZDINX-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV64IZFINXZDINX: # %bb.0:
+; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV64IZFINXZDINX-NEXT: mv a1, sp
+; RV64IZFINXZDINX-NEXT: call frexpf at plt
+; RV64IZFINXZDINX-NEXT: call __truncsfhf2 at plt
+; RV64IZFINXZDINX-NEXT: lui a1, 1048560
+; RV64IZFINXZDINX-NEXT: or a0, a0, a1
+; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV64IZFINXZDINX-NEXT: ret
+;
+; RV32I-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: slli a0, a0, 16
+; RV32I-NEXT: srli a0, a0, 16
+; RV32I-NEXT: call __extendhfsf2 at plt
+; RV32I-NEXT: addi a1, sp, 8
+; RV32I-NEXT: call frexpf at plt
+; RV32I-NEXT: call __truncsfhf2 at plt
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_frexp_f16_i32_only_use_fract:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -16
+; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: slli a0, a0, 48
+; RV64I-NEXT: srli a0, a0, 48
+; RV64I-NEXT: call __extendhfsf2 at plt
+; RV64I-NEXT: addi a1, sp, 4
+; RV64I-NEXT: call frexpf at plt
+; RV64I-NEXT: call __truncsfhf2 at plt
+; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 16
+; RV64I-NEXT: ret
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ %result.0 = extractvalue { half, i32 } %result, 0
+ ret half %result.0
+}
-; define i32 @test_frexp_f16_i32_only_use_exp(half %a) nounwind {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 1
-; ret i32 %result.0
-; }
+define i32 @test_frexp_f16_i32_only_use_exp(half %a) nounwind {
+; RV32IFD-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV32IFD: # %bb.0:
+; RV32IFD-NEXT: addi sp, sp, -16
+; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IFD-NEXT: call __extendhfsf2 at plt
+; RV32IFD-NEXT: addi a0, sp, 8
+; RV32IFD-NEXT: call frexpf at plt
+; RV32IFD-NEXT: lw a0, 8(sp)
+; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IFD-NEXT: addi sp, sp, 16
+; RV32IFD-NEXT: ret
+;
+; RV64IFD-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV64IFD: # %bb.0:
+; RV64IFD-NEXT: addi sp, sp, -16
+; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IFD-NEXT: call __extendhfsf2 at plt
+; RV64IFD-NEXT: mv a0, sp
+; RV64IFD-NEXT: call frexpf at plt
+; RV64IFD-NEXT: ld a0, 0(sp)
+; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IFD-NEXT: addi sp, sp, 16
+; RV64IFD-NEXT: ret
+;
+; RV32IZFINXZDINX-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV32IZFINXZDINX: # %bb.0:
+; RV32IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
+; RV32IZFINXZDINX-NEXT: call frexpf at plt
+; RV32IZFINXZDINX-NEXT: lw a0, 8(sp)
+; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV32IZFINXZDINX-NEXT: ret
+;
+; RV64IZFINXZDINX-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV64IZFINXZDINX: # %bb.0:
+; RV64IZFINXZDINX-NEXT: addi sp, sp, -16
+; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64IZFINXZDINX-NEXT: call __extendhfsf2 at plt
+; RV64IZFINXZDINX-NEXT: mv a1, sp
+; RV64IZFINXZDINX-NEXT: call frexpf at plt
+; RV64IZFINXZDINX-NEXT: ld a0, 0(sp)
+; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64IZFINXZDINX-NEXT: addi sp, sp, 16
+; RV64IZFINXZDINX-NEXT: ret
+;
+; RV32I-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: slli a0, a0, 16
+; RV32I-NEXT: srli a0, a0, 16
+; RV32I-NEXT: call __extendhfsf2 at plt
+; RV32I-NEXT: addi a1, sp, 8
+; RV32I-NEXT: call frexpf at plt
+; RV32I-NEXT: lw a0, 8(sp)
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_frexp_f16_i32_only_use_exp:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -16
+; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: slli a0, a0, 48
+; RV64I-NEXT: srli a0, a0, 48
+; RV64I-NEXT: call __extendhfsf2 at plt
+; RV64I-NEXT: addi a1, sp, 4
+; RV64I-NEXT: call frexpf at plt
+; RV64I-NEXT: lw a0, 4(sp)
+; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 16
+; RV64I-NEXT: ret
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ %result.0 = extractvalue { half, i32 } %result, 1
+ ret i32 %result.0
+}
+; FIXME
; define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) nounwind {
; %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
; ret { <2 x half>, <2 x i32> } %result
diff --git a/llvm/test/CodeGen/X86/llvm.frexp.ll b/llvm/test/CodeGen/X86/llvm.frexp.ll
index bd0a1dce6946c..d6038cebd4582 100644
--- a/llvm/test/CodeGen/X86/llvm.frexp.ll
+++ b/llvm/test/CodeGen/X86/llvm.frexp.ll
@@ -2,24 +2,241 @@
; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
; RUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
-; FIXME
-; define { half, i32 } @test_frexp_f16_i32(half %a) {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; ret { half, i32 } %result
-; }
+define { half, i32 } @test_frexp_f16_i32(half %a) {
+; X64-LABEL: test_frexp_f16_i32:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 32
+; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: pextrw $0, %xmm0, %ecx
+; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: andl $31744, %eax # imm = 0x7C00
+; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
+; X64-NEXT: pextrw $0, %xmm0, %edx
+; X64-NEXT: movl %edx, %esi
+; X64-NEXT: andl $32767, %esi # imm = 0x7FFF
+; X64-NEXT: cmpl $1024, %esi # imm = 0x400
+; X64-NEXT: cmovael %edx, %ecx
+; X64-NEXT: cmovael %esi, %eax
+; X64-NEXT: shrl $10, %eax
+; X64-NEXT: leal -12(%rax), %edi
+; X64-NEXT: cmpl $1024, %esi # imm = 0x400
+; X64-NEXT: cmovael %eax, %edi
+; X64-NEXT: addl $-14, %edi
+; X64-NEXT: andl $-31745, %ecx # imm = 0x83FF
+; X64-NEXT: orl $14336, %ecx # imm = 0x3800
+; X64-NEXT: addl $-31744, %esi # imm = 0x8400
+; X64-NEXT: movzwl %si, %esi
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $33792, %esi # imm = 0x8400
+; X64-NEXT: cmoval %edi, %eax
+; X64-NEXT: cmovbel %edx, %ecx
+; X64-NEXT: pinsrw $0, %ecx, %xmm0
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; WIN32-LABEL: test_frexp_f16_i32:
+; WIN32: # %bb.0:
+; WIN32-NEXT: pushl %esi
+; WIN32-NEXT: subl $16, %esp
+; WIN32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; WIN32-NEXT: movl %eax, (%esp)
+; WIN32-NEXT: calll ___gnu_h2f_ieee
+; WIN32-NEXT: fld %st(0)
+; WIN32-NEXT: fmuls __real at 4c000000
+; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
+; WIN32-NEXT: fsts {{[0-9]+}}(%esp)
+; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; WIN32-NEXT: movl %edx, %ecx
+; WIN32-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
+; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
+; WIN32-NEXT: jb LBB0_1
+; WIN32-NEXT: # %bb.2:
+; WIN32-NEXT: movl %ecx, %eax
+; WIN32-NEXT: jmp LBB0_3
+; WIN32-NEXT: LBB0_1:
+; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
+; WIN32-NEXT: movl %edx, %eax
+; WIN32-NEXT: andl $2139095040, %eax # imm = 0x7F800000
+; WIN32-NEXT: LBB0_3:
+; WIN32-NEXT: shrl $23, %eax
+; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
+; WIN32-NEXT: jae LBB0_5
+; WIN32-NEXT: # %bb.4:
+; WIN32-NEXT: addl $-25, %eax
+; WIN32-NEXT: LBB0_5:
+; WIN32-NEXT: andl $-2139095041, %edx # imm = 0x807FFFFF
+; WIN32-NEXT: orl $1056964608, %edx # imm = 0x3F000000
+; WIN32-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; WIN32-NEXT: addl $-126, %eax
+; WIN32-NEXT: addl $-2139095040, %ecx # imm = 0x80800000
+; WIN32-NEXT: flds {{[0-9]+}}(%esp)
+; WIN32-NEXT: xorl %esi, %esi
+; WIN32-NEXT: cmpl $-2139095040, %ecx # imm = 0x80800000
+; WIN32-NEXT: jbe LBB0_7
+; WIN32-NEXT: # %bb.6:
+; WIN32-NEXT: fstp %st(1)
+; WIN32-NEXT: fldz
+; WIN32-NEXT: LBB0_7:
+; WIN32-NEXT: fstp %st(0)
+; WIN32-NEXT: fstps (%esp)
+; WIN32-NEXT: jbe LBB0_9
+; WIN32-NEXT: # %bb.8:
+; WIN32-NEXT: movl %eax, %esi
+; WIN32-NEXT: LBB0_9:
+; WIN32-NEXT: calll ___gnu_f2h_ieee
+; WIN32-NEXT: movl %esi, %edx
+; WIN32-NEXT: addl $16, %esp
+; WIN32-NEXT: popl %esi
+; WIN32-NEXT: retl
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ ret { half, i32 } %result
+}
-; define half @test_frexp_f16_i32_only_use_fract(half %a) {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 0
-; ret half %result.0
-; }
+define half @test_frexp_f16_i32_only_use_fract(half %a) {
+; X64-LABEL: test_frexp_f16_i32_only_use_fract:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 32
+; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: pextrw $0, %xmm0, %eax
+; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
+; X64-NEXT: pextrw $0, %xmm0, %ecx
+; X64-NEXT: movl %ecx, %edx
+; X64-NEXT: andl $32767, %edx # imm = 0x7FFF
+; X64-NEXT: cmpl $1024, %edx # imm = 0x400
+; X64-NEXT: cmovael %ecx, %eax
+; X64-NEXT: andl $-31745, %eax # imm = 0x83FF
+; X64-NEXT: orl $14336, %eax # imm = 0x3800
+; X64-NEXT: addl $-31744, %edx # imm = 0x8400
+; X64-NEXT: movzwl %dx, %edx
+; X64-NEXT: cmpl $33792, %edx # imm = 0x8400
+; X64-NEXT: cmovbel %ecx, %eax
+; X64-NEXT: pinsrw $0, %eax, %xmm0
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; WIN32-LABEL: test_frexp_f16_i32_only_use_fract:
+; WIN32: # %bb.0:
+; WIN32-NEXT: subl $16, %esp
+; WIN32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; WIN32-NEXT: movl %eax, (%esp)
+; WIN32-NEXT: calll ___gnu_h2f_ieee
+; WIN32-NEXT: fsts {{[0-9]+}}(%esp)
+; WIN32-NEXT: fld %st(0)
+; WIN32-NEXT: fmuls __real at 4c000000
+; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
+; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; WIN32-NEXT: movl %ecx, %eax
+; WIN32-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
+; WIN32-NEXT: jae LBB1_2
+; WIN32-NEXT: # %bb.1:
+; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; WIN32-NEXT: LBB1_2:
+; WIN32-NEXT: andl $-2139095041, %ecx # imm = 0x807FFFFF
+; WIN32-NEXT: orl $1056964608, %ecx # imm = 0x3F000000
+; WIN32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
+; WIN32-NEXT: flds {{[0-9]+}}(%esp)
+; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
+; WIN32-NEXT: jbe LBB1_4
+; WIN32-NEXT: # %bb.3:
+; WIN32-NEXT: fstp %st(1)
+; WIN32-NEXT: fldz
+; WIN32-NEXT: LBB1_4:
+; WIN32-NEXT: fstp %st(0)
+; WIN32-NEXT: fstps (%esp)
+; WIN32-NEXT: calll ___gnu_f2h_ieee
+; WIN32-NEXT: addl $16, %esp
+; WIN32-NEXT: retl
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ %result.0 = extractvalue { half, i32 } %result, 0
+ ret half %result.0
+}
-; define i32 @test_frexp_f16_i32_only_use_exp(half %a) {
-; %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
-; %result.0 = extractvalue { half, i32 } %result, 1
-; ret i32 %result.0
-; }
+define i32 @test_frexp_f16_i32_only_use_exp(half %a) {
+; X64-LABEL: test_frexp_f16_i32_only_use_exp:
+; X64: # %bb.0:
+; X64-NEXT: subq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 32
+; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
+; X64-NEXT: callq __extendhfsf2 at PLT
+; X64-NEXT: mulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; X64-NEXT: callq __truncsfhf2 at PLT
+; X64-NEXT: pextrw $0, %xmm0, %eax
+; X64-NEXT: andl $31744, %eax # imm = 0x7C00
+; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
+; X64-NEXT: pextrw $0, %xmm0, %ecx
+; X64-NEXT: andl $32767, %ecx # imm = 0x7FFF
+; X64-NEXT: cmpl $1024, %ecx # imm = 0x400
+; X64-NEXT: cmovael %ecx, %eax
+; X64-NEXT: shrl $10, %eax
+; X64-NEXT: leal -12(%rax), %edx
+; X64-NEXT: cmpl $1024, %ecx # imm = 0x400
+; X64-NEXT: cmovael %eax, %edx
+; X64-NEXT: addl $-14, %edx
+; X64-NEXT: addl $-31744, %ecx # imm = 0x8400
+; X64-NEXT: movzwl %cx, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: cmpl $33792, %ecx # imm = 0x8400
+; X64-NEXT: cmoval %edx, %eax
+; X64-NEXT: addq $24, %rsp
+; X64-NEXT: .cfi_def_cfa_offset 8
+; X64-NEXT: retq
+;
+; WIN32-LABEL: test_frexp_f16_i32_only_use_exp:
+; WIN32: # %bb.0:
+; WIN32-NEXT: subl $8, %esp
+; WIN32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; WIN32-NEXT: pushl %eax
+; WIN32-NEXT: calll ___gnu_h2f_ieee
+; WIN32-NEXT: addl $4, %esp
+; WIN32-NEXT: fld %st(0)
+; WIN32-NEXT: fmuls __real at 4c000000
+; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
+; WIN32-NEXT: fstps (%esp)
+; WIN32-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
+; WIN32-NEXT: andl (%esp), %ecx
+; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
+; WIN32-NEXT: jb LBB2_1
+; WIN32-NEXT: # %bb.2:
+; WIN32-NEXT: movl %ecx, %edx
+; WIN32-NEXT: jmp LBB2_3
+; WIN32-NEXT: LBB2_1:
+; WIN32-NEXT: movl $2139095040, %edx # imm = 0x7F800000
+; WIN32-NEXT: andl {{[0-9]+}}(%esp), %edx
+; WIN32-NEXT: LBB2_3:
+; WIN32-NEXT: shrl $23, %edx
+; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
+; WIN32-NEXT: jae LBB2_5
+; WIN32-NEXT: # %bb.4:
+; WIN32-NEXT: addl $-25, %edx
+; WIN32-NEXT: LBB2_5:
+; WIN32-NEXT: addl $-2139095040, %ecx # imm = 0x80800000
+; WIN32-NEXT: xorl %eax, %eax
+; WIN32-NEXT: cmpl $-2139095040, %ecx # imm = 0x80800000
+; WIN32-NEXT: jbe LBB2_7
+; WIN32-NEXT: # %bb.6:
+; WIN32-NEXT: addl $-126, %edx
+; WIN32-NEXT: movl %edx, %eax
+; WIN32-NEXT: LBB2_7:
+; WIN32-NEXT: addl $8, %esp
+; WIN32-NEXT: retl
+ %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
+ %result.0 = extractvalue { half, i32 } %result, 1
+ ret i32 %result.0
+}
+; FIXME
; define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) {
; %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
; ret { <2 x half>, <2 x i32> } %result
@@ -61,21 +278,21 @@ define { float, i32 } @test_frexp_f32_i32(float %a) {
; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
-; WIN32-NEXT: jb LBB0_1
+; WIN32-NEXT: jb LBB3_1
; WIN32-NEXT: # %bb.2:
; WIN32-NEXT: movl %ecx, %edx
-; WIN32-NEXT: jmp LBB0_3
-; WIN32-NEXT: LBB0_1:
+; WIN32-NEXT: jmp LBB3_3
+; WIN32-NEXT: LBB3_1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %eax, %edx
; WIN32-NEXT: andl $2139095040, %edx # imm = 0x7F800000
-; WIN32-NEXT: LBB0_3:
+; WIN32-NEXT: LBB3_3:
; WIN32-NEXT: shrl $23, %edx
; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
-; WIN32-NEXT: jae LBB0_5
+; WIN32-NEXT: jae LBB3_5
; WIN32-NEXT: # %bb.4:
; WIN32-NEXT: addl $-25, %edx
-; WIN32-NEXT: LBB0_5:
+; WIN32-NEXT: LBB3_5:
; WIN32-NEXT: andl $-2139095041, %eax # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %eax # imm = 0x3F000000
; WIN32-NEXT: movl %eax, {{[0-9]+}}(%esp)
@@ -83,16 +300,16 @@ define { float, i32 } @test_frexp_f32_i32(float %a) {
; WIN32-NEXT: addl $-2139095040, %ecx # imm = 0x80800000
; WIN32-NEXT: xorl %eax, %eax
; WIN32-NEXT: cmpl $-2139095040, %ecx # imm = 0x80800000
-; WIN32-NEXT: jbe LBB0_7
+; WIN32-NEXT: jbe LBB3_7
; WIN32-NEXT: # %bb.6:
; WIN32-NEXT: movl %edx, %eax
-; WIN32-NEXT: LBB0_7:
+; WIN32-NEXT: LBB3_7:
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
-; WIN32-NEXT: jbe LBB0_9
+; WIN32-NEXT: jbe LBB3_9
; WIN32-NEXT: # %bb.8:
; WIN32-NEXT: fstp %st(1)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB0_9:
+; WIN32-NEXT: LBB3_9:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: addl $12, %esp
; WIN32-NEXT: retl
@@ -123,21 +340,21 @@ define float @test_frexp_f32_i32_only_use_fract(float %a) {
; WIN32-NEXT: movl %ecx, %eax
; WIN32-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
-; WIN32-NEXT: jae LBB1_2
+; WIN32-NEXT: jae LBB4_2
; WIN32-NEXT: # %bb.1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; WIN32-NEXT: LBB1_2:
+; WIN32-NEXT: LBB4_2:
; WIN32-NEXT: andl $-2139095041, %ecx # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %ecx # imm = 0x3F000000
; WIN32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
-; WIN32-NEXT: jbe LBB1_4
+; WIN32-NEXT: jbe LBB4_4
; WIN32-NEXT: # %bb.3:
; WIN32-NEXT: fstp %st(1)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB1_4:
+; WIN32-NEXT: LBB4_4:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: addl $12, %esp
; WIN32-NEXT: retl
@@ -169,28 +386,28 @@ define i32 @test_frexp_f32_i32_only_use_exp(float %a) {
; WIN32-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF
; WIN32-NEXT: andl (%esp), %ecx
; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
-; WIN32-NEXT: jb LBB2_1
+; WIN32-NEXT: jb LBB5_1
; WIN32-NEXT: # %bb.2:
; WIN32-NEXT: movl %ecx, %edx
-; WIN32-NEXT: jmp LBB2_3
-; WIN32-NEXT: LBB2_1:
+; WIN32-NEXT: jmp LBB5_3
+; WIN32-NEXT: LBB5_1:
; WIN32-NEXT: movl $2139095040, %edx # imm = 0x7F800000
; WIN32-NEXT: andl {{[0-9]+}}(%esp), %edx
-; WIN32-NEXT: LBB2_3:
+; WIN32-NEXT: LBB5_3:
; WIN32-NEXT: shrl $23, %edx
; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
-; WIN32-NEXT: jae LBB2_5
+; WIN32-NEXT: jae LBB5_5
; WIN32-NEXT: # %bb.4:
; WIN32-NEXT: addl $-25, %edx
-; WIN32-NEXT: LBB2_5:
+; WIN32-NEXT: LBB5_5:
; WIN32-NEXT: addl $-2139095040, %ecx # imm = 0x80800000
; WIN32-NEXT: xorl %eax, %eax
; WIN32-NEXT: cmpl $-2139095040, %ecx # imm = 0x80800000
-; WIN32-NEXT: jbe LBB2_7
+; WIN32-NEXT: jbe LBB5_7
; WIN32-NEXT: # %bb.6:
; WIN32-NEXT: addl $-126, %edx
; WIN32-NEXT: movl %edx, %eax
-; WIN32-NEXT: LBB2_7:
+; WIN32-NEXT: LBB5_7:
; WIN32-NEXT: addl $8, %esp
; WIN32-NEXT: retl
%result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
@@ -275,15 +492,15 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {
; WIN32-NEXT: movl %ebx, %eax
; WIN32-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
-; WIN32-NEXT: jb LBB3_1
+; WIN32-NEXT: jb LBB6_1
; WIN32-NEXT: # %bb.2:
; WIN32-NEXT: movl %eax, %ecx
-; WIN32-NEXT: jmp LBB3_3
-; WIN32-NEXT: LBB3_1:
+; WIN32-NEXT: jmp LBB6_3
+; WIN32-NEXT: LBB6_1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: movl %ebx, %ecx
; WIN32-NEXT: andl $2139095040, %ecx # imm = 0x7F800000
-; WIN32-NEXT: LBB3_3:
+; WIN32-NEXT: LBB6_3:
; WIN32-NEXT: shrl $23, %ecx
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -291,24 +508,24 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {
; WIN32-NEXT: fmul %st(3), %st
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
; WIN32-NEXT: fsts {{[0-9]+}}(%esp)
-; WIN32-NEXT: jae LBB3_5
+; WIN32-NEXT: jae LBB6_5
; WIN32-NEXT: # %bb.4:
; WIN32-NEXT: addl $-25, %ecx
-; WIN32-NEXT: LBB3_5:
+; WIN32-NEXT: LBB6_5:
; WIN32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %ecx, %edx
; WIN32-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jb LBB3_6
+; WIN32-NEXT: jb LBB6_6
; WIN32-NEXT: # %bb.7:
; WIN32-NEXT: movl %edx, %esi
-; WIN32-NEXT: jmp LBB3_8
-; WIN32-NEXT: LBB3_6:
+; WIN32-NEXT: jmp LBB6_8
+; WIN32-NEXT: LBB6_6:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %ecx, %esi
; WIN32-NEXT: andl $2139095040, %esi # imm = 0x7F800000
-; WIN32-NEXT: LBB3_8:
+; WIN32-NEXT: LBB6_8:
; WIN32-NEXT: shrl $23, %esi
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -316,24 +533,24 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {
; WIN32-NEXT: fmul %st(4), %st
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
; WIN32-NEXT: fsts {{[0-9]+}}(%esp)
-; WIN32-NEXT: jae LBB3_10
+; WIN32-NEXT: jae LBB6_10
; WIN32-NEXT: # %bb.9:
; WIN32-NEXT: addl $-25, %esi
-; WIN32-NEXT: LBB3_10:
+; WIN32-NEXT: LBB6_10:
; WIN32-NEXT: movl %esi, (%esp) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: movl %edi, %ebp
; WIN32-NEXT: andl $2147483647, %ebp # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %ebp # imm = 0x800000
-; WIN32-NEXT: jb LBB3_11
+; WIN32-NEXT: jb LBB6_11
; WIN32-NEXT: # %bb.12:
; WIN32-NEXT: movl %ebp, %esi
-; WIN32-NEXT: jmp LBB3_13
-; WIN32-NEXT: LBB3_11:
+; WIN32-NEXT: jmp LBB6_13
+; WIN32-NEXT: LBB6_11:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: movl %edi, %esi
; WIN32-NEXT: andl $2139095040, %esi # imm = 0x7F800000
-; WIN32-NEXT: LBB3_13:
+; WIN32-NEXT: LBB6_13:
; WIN32-NEXT: shrl $23, %esi
; WIN32-NEXT: cmpl $8388608, %ebp # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -344,30 +561,30 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {
; WIN32-NEXT: fsts {{[0-9]+}}(%esp)
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; WIN32-NEXT: jae LBB3_15
+; WIN32-NEXT: jae LBB6_15
; WIN32-NEXT: # %bb.14:
; WIN32-NEXT: addl $-25, %esi
-; WIN32-NEXT: LBB3_15:
+; WIN32-NEXT: LBB6_15:
; WIN32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %eax, %edx
; WIN32-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jb LBB3_16
+; WIN32-NEXT: jb LBB6_16
; WIN32-NEXT: # %bb.17:
; WIN32-NEXT: movl %edx, %esi
-; WIN32-NEXT: jmp LBB3_18
-; WIN32-NEXT: LBB3_16:
+; WIN32-NEXT: jmp LBB6_18
+; WIN32-NEXT: LBB6_16:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: andl $2139095040, %esi # imm = 0x7F800000
-; WIN32-NEXT: LBB3_18:
+; WIN32-NEXT: LBB6_18:
; WIN32-NEXT: shrl $23, %esi
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jae LBB3_20
+; WIN32-NEXT: jae LBB6_20
; WIN32-NEXT: # %bb.19:
; WIN32-NEXT: addl $-25, %esi
-; WIN32-NEXT: LBB3_20:
+; WIN32-NEXT: LBB6_20:
; WIN32-NEXT: andl $-2139095041, %eax # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %eax # imm = 0x3F000000
; WIN32-NEXT: movl %eax, {{[0-9]+}}(%esp)
@@ -389,61 +606,61 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {
; WIN32-NEXT: xorl %edi, %edi
; WIN32-NEXT: cmpl $-2139095040, %edx # imm = 0x80800000
; WIN32-NEXT: movl $0, %ebx
-; WIN32-NEXT: jbe LBB3_22
+; WIN32-NEXT: jbe LBB6_22
; WIN32-NEXT: # %bb.21:
; WIN32-NEXT: movl %esi, %ebx
-; WIN32-NEXT: LBB3_22:
+; WIN32-NEXT: LBB6_22:
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; WIN32-NEXT: jbe LBB3_24
+; WIN32-NEXT: jbe LBB6_24
; WIN32-NEXT: # %bb.23:
; WIN32-NEXT: fstp %st(1)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB3_24:
+; WIN32-NEXT: LBB6_24:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: movl $0, %edx
; WIN32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; WIN32-NEXT: jbe LBB3_26
+; WIN32-NEXT: jbe LBB6_26
; WIN32-NEXT: # %bb.25:
; WIN32-NEXT: movl %ecx, %edx
-; WIN32-NEXT: LBB3_26:
+; WIN32-NEXT: LBB6_26:
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
-; WIN32-NEXT: jbe LBB3_28
+; WIN32-NEXT: jbe LBB6_28
; WIN32-NEXT: # %bb.27:
; WIN32-NEXT: fstp %st(3)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB3_28:
+; WIN32-NEXT: LBB6_28:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: movl $0, %ecx
-; WIN32-NEXT: jbe LBB3_30
+; WIN32-NEXT: jbe LBB6_30
; WIN32-NEXT: # %bb.29:
; WIN32-NEXT: movl (%esp), %ecx # 4-byte Reload
-; WIN32-NEXT: LBB3_30:
+; WIN32-NEXT: LBB6_30:
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
-; WIN32-NEXT: jbe LBB3_32
+; WIN32-NEXT: jbe LBB6_32
; WIN32-NEXT: # %bb.31:
; WIN32-NEXT: fstp %st(2)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB3_32:
+; WIN32-NEXT: LBB6_32:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: addl $-2139095040, %ebp # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %ebp # imm = 0x80800000
-; WIN32-NEXT: jbe LBB3_34
+; WIN32-NEXT: jbe LBB6_34
; WIN32-NEXT: # %bb.33:
; WIN32-NEXT: movl %esi, %edi
-; WIN32-NEXT: LBB3_34:
+; WIN32-NEXT: LBB6_34:
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
-; WIN32-NEXT: jbe LBB3_36
+; WIN32-NEXT: jbe LBB6_36
; WIN32-NEXT: # %bb.35:
; WIN32-NEXT: fstp %st(4)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB3_36:
+; WIN32-NEXT: LBB6_36:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: movl %edi, 28(%eax)
; WIN32-NEXT: movl %ecx, 24(%eax)
@@ -531,10 +748,10 @@ define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) {
; WIN32-NEXT: movl %ecx, %eax
; WIN32-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
-; WIN32-NEXT: jae LBB4_2
+; WIN32-NEXT: jae LBB7_2
; WIN32-NEXT: # %bb.1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; WIN32-NEXT: LBB4_2:
+; WIN32-NEXT: LBB7_2:
; WIN32-NEXT: andl $-2139095041, %ecx # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %ecx # imm = 0x3F000000
; WIN32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
@@ -542,10 +759,10 @@ define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) {
; WIN32-NEXT: movl %edx, %ecx
; WIN32-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %ecx # imm = 0x800000
-; WIN32-NEXT: jae LBB4_4
+; WIN32-NEXT: jae LBB7_4
; WIN32-NEXT: # %bb.3:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
-; WIN32-NEXT: LBB4_4:
+; WIN32-NEXT: LBB7_4:
; WIN32-NEXT: andl $-2139095041, %edx # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %edx # imm = 0x3F000000
; WIN32-NEXT: movl %edx, {{[0-9]+}}(%esp)
@@ -553,10 +770,10 @@ define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) {
; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jae LBB4_6
+; WIN32-NEXT: jae LBB7_6
; WIN32-NEXT: # %bb.5:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi
-; WIN32-NEXT: LBB4_6:
+; WIN32-NEXT: LBB7_6:
; WIN32-NEXT: andl $-2139095041, %esi # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %esi # imm = 0x3F000000
; WIN32-NEXT: movl %esi, {{[0-9]+}}(%esp)
@@ -564,49 +781,49 @@ define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) {
; WIN32-NEXT: movl %edi, %esi
; WIN32-NEXT: andl $2147483647, %esi # imm = 0x7FFFFFFF
; WIN32-NEXT: cmpl $8388608, %esi # imm = 0x800000
-; WIN32-NEXT: jae LBB4_8
+; WIN32-NEXT: jae LBB7_8
; WIN32-NEXT: # %bb.7:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
-; WIN32-NEXT: LBB4_8:
+; WIN32-NEXT: LBB7_8:
; WIN32-NEXT: andl $-2139095041, %edi # imm = 0x807FFFFF
; WIN32-NEXT: orl $1056964608, %edi # imm = 0x3F000000
; WIN32-NEXT: movl %edi, {{[0-9]+}}(%esp)
; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
-; WIN32-NEXT: jbe LBB4_10
+; WIN32-NEXT: jbe LBB7_10
; WIN32-NEXT: # %bb.9:
; WIN32-NEXT: fstp %st(1)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB4_10:
+; WIN32-NEXT: LBB7_10:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: addl $-2139095040, %ecx # imm = 0x80800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: cmpl $-2139095040, %ecx # imm = 0x80800000
-; WIN32-NEXT: jbe LBB4_12
+; WIN32-NEXT: jbe LBB7_12
; WIN32-NEXT: # %bb.11:
; WIN32-NEXT: fstp %st(3)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB4_12:
+; WIN32-NEXT: LBB7_12:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: addl $-2139095040, %edx # imm = 0x80800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: cmpl $-2139095040, %edx # imm = 0x80800000
-; WIN32-NEXT: jbe LBB4_14
+; WIN32-NEXT: jbe LBB7_14
; WIN32-NEXT: # %bb.13:
; WIN32-NEXT: fstp %st(4)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB4_14:
+; WIN32-NEXT: LBB7_14:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: addl $-2139095040, %esi # imm = 0x80800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
; WIN32-NEXT: cmpl $-2139095040, %esi # imm = 0x80800000
-; WIN32-NEXT: jbe LBB4_16
+; WIN32-NEXT: jbe LBB7_16
; WIN32-NEXT: # %bb.15:
; WIN32-NEXT: fstp %st(2)
; WIN32-NEXT: fldz
-; WIN32-NEXT: LBB4_16:
+; WIN32-NEXT: LBB7_16:
; WIN32-NEXT: fstp %st(0)
; WIN32-NEXT: fxch %st(1)
; WIN32-NEXT: fstps 12(%eax)
@@ -673,14 +890,14 @@ define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) {
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: andl %edx, %eax
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
-; WIN32-NEXT: jb LBB5_1
+; WIN32-NEXT: jb LBB8_1
; WIN32-NEXT: # %bb.2:
; WIN32-NEXT: movl %eax, %esi
-; WIN32-NEXT: jmp LBB5_3
-; WIN32-NEXT: LBB5_1:
+; WIN32-NEXT: jmp LBB8_3
+; WIN32-NEXT: LBB8_1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: andl %ecx, %esi
-; WIN32-NEXT: LBB5_3:
+; WIN32-NEXT: LBB8_3:
; WIN32-NEXT: shrl $23, %esi
; WIN32-NEXT: cmpl $8388608, %eax # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -688,21 +905,21 @@ define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) {
; WIN32-NEXT: fmul %st(2), %st
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
-; WIN32-NEXT: jae LBB5_5
+; WIN32-NEXT: jae LBB8_5
; WIN32-NEXT: # %bb.4:
; WIN32-NEXT: addl $-25, %esi
-; WIN32-NEXT: LBB5_5:
+; WIN32-NEXT: LBB8_5:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: andl %edx, %edi
; WIN32-NEXT: cmpl $8388608, %edi # imm = 0x800000
-; WIN32-NEXT: jb LBB5_6
+; WIN32-NEXT: jb LBB8_6
; WIN32-NEXT: # %bb.7:
; WIN32-NEXT: movl %edi, %ebx
-; WIN32-NEXT: jmp LBB5_8
-; WIN32-NEXT: LBB5_6:
+; WIN32-NEXT: jmp LBB8_8
+; WIN32-NEXT: LBB8_6:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: andl %ecx, %ebx
-; WIN32-NEXT: LBB5_8:
+; WIN32-NEXT: LBB8_8:
; WIN32-NEXT: shrl $23, %ebx
; WIN32-NEXT: cmpl $8388608, %edi # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -710,22 +927,22 @@ define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) {
; WIN32-NEXT: fmul %st(2), %st
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
-; WIN32-NEXT: jae LBB5_10
+; WIN32-NEXT: jae LBB8_10
; WIN32-NEXT: # %bb.9:
; WIN32-NEXT: addl $-25, %ebx
-; WIN32-NEXT: LBB5_10:
+; WIN32-NEXT: LBB8_10:
; WIN32-NEXT: movl %esi, (%esp) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: andl %edx, %ebp
; WIN32-NEXT: cmpl $8388608, %ebp # imm = 0x800000
-; WIN32-NEXT: jb LBB5_11
+; WIN32-NEXT: jb LBB8_11
; WIN32-NEXT: # %bb.12:
; WIN32-NEXT: movl %ebp, %esi
-; WIN32-NEXT: jmp LBB5_13
-; WIN32-NEXT: LBB5_11:
+; WIN32-NEXT: jmp LBB8_13
+; WIN32-NEXT: LBB8_11:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: andl %ecx, %esi
-; WIN32-NEXT: LBB5_13:
+; WIN32-NEXT: LBB8_13:
; WIN32-NEXT: shrl $23, %esi
; WIN32-NEXT: cmpl $8388608, %ebp # imm = 0x800000
; WIN32-NEXT: flds {{[0-9]+}}(%esp)
@@ -733,59 +950,59 @@ define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) {
; WIN32-NEXT: fxch %st(1)
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
; WIN32-NEXT: fstps {{[0-9]+}}(%esp)
-; WIN32-NEXT: jae LBB5_15
+; WIN32-NEXT: jae LBB8_15
; WIN32-NEXT: # %bb.14:
; WIN32-NEXT: addl $-25, %esi
-; WIN32-NEXT: LBB5_15:
+; WIN32-NEXT: LBB8_15:
; WIN32-NEXT: andl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jb LBB5_16
+; WIN32-NEXT: jb LBB8_16
; WIN32-NEXT: # %bb.17:
; WIN32-NEXT: movl %edx, %ecx
-; WIN32-NEXT: jmp LBB5_18
-; WIN32-NEXT: LBB5_16:
+; WIN32-NEXT: jmp LBB8_18
+; WIN32-NEXT: LBB8_16:
; WIN32-NEXT: andl {{[0-9]+}}(%esp), %ecx
-; WIN32-NEXT: LBB5_18:
+; WIN32-NEXT: LBB8_18:
; WIN32-NEXT: shrl $23, %ecx
; WIN32-NEXT: cmpl $8388608, %edx # imm = 0x800000
-; WIN32-NEXT: jae LBB5_20
+; WIN32-NEXT: jae LBB8_20
; WIN32-NEXT: # %bb.19:
; WIN32-NEXT: addl $-25, %ecx
-; WIN32-NEXT: LBB5_20:
+; WIN32-NEXT: LBB8_20:
; WIN32-NEXT: addl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %eax # imm = 0x80800000
; WIN32-NEXT: movl $0, %eax
-; WIN32-NEXT: jbe LBB5_22
+; WIN32-NEXT: jbe LBB8_22
; WIN32-NEXT: # %bb.21:
; WIN32-NEXT: movl (%esp), %eax # 4-byte Reload
; WIN32-NEXT: addl $-126, %eax
-; WIN32-NEXT: LBB5_22:
+; WIN32-NEXT: LBB8_22:
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: addl $-2139095040, %edi # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %edi # imm = 0x80800000
; WIN32-NEXT: movl $0, %edi
-; WIN32-NEXT: jbe LBB5_24
+; WIN32-NEXT: jbe LBB8_24
; WIN32-NEXT: # %bb.23:
; WIN32-NEXT: addl $-126, %ebx
; WIN32-NEXT: movl %ebx, %edi
-; WIN32-NEXT: LBB5_24:
+; WIN32-NEXT: LBB8_24:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: addl $-2139095040, %ebp # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %ebp # imm = 0x80800000
; WIN32-NEXT: movl $0, %ebx
-; WIN32-NEXT: jbe LBB5_26
+; WIN32-NEXT: jbe LBB8_26
; WIN32-NEXT: # %bb.25:
; WIN32-NEXT: addl $-126, %esi
; WIN32-NEXT: movl %esi, %ebx
-; WIN32-NEXT: LBB5_26:
+; WIN32-NEXT: LBB8_26:
; WIN32-NEXT: addl $-2139095040, %edx # imm = 0x80800000
; WIN32-NEXT: cmpl $-2139095040, %edx # imm = 0x80800000
; WIN32-NEXT: movl $0, %edx
-; WIN32-NEXT: jbe LBB5_28
+; WIN32-NEXT: jbe LBB8_28
; WIN32-NEXT: # %bb.27:
; WIN32-NEXT: addl $-126, %ecx
; WIN32-NEXT: movl %ecx, %edx
-; WIN32-NEXT: LBB5_28:
+; WIN32-NEXT: LBB8_28:
; WIN32-NEXT: movl %edx, 12(%eax)
; WIN32-NEXT: movl %ebx, 8(%eax)
; WIN32-NEXT: movl %edi, 4(%eax)
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