[llvm] [StackColoring] Delete dead stack slots (PR #72633)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 01:32:32 PST 2023
https://github.com/mohammed-nurulhoque updated https://github.com/llvm/llvm-project/pull/72633
>From 24f1b7aa81aeb47d7541f9450961ef841c8192a1 Mon Sep 17 00:00:00 2001
From: "Mohammed.NurulHoque" <Mohammed.NurulHoque at imgtec.com>
Date: Thu, 19 May 2022 10:53:44 +0100
Subject: [PATCH 1/5] delete dead stack slots (#104)
deletes slots that have lifetime markers and the lifetime ranges are empty.
---
llvm/lib/CodeGen/StackColoring.cpp | 9 +++++-
.../CodeGen/PowerPC/aix32-cc-abi-vaarg.ll | 1 -
.../CodeGen/PowerPC/aix64-cc-abi-vaarg.ll | 8 ++---
llvm/test/CodeGen/RISCV/dead-stack-slot.ll | 32 +++++++++++++++++++
4 files changed, 42 insertions(+), 8 deletions(-)
create mode 100644 llvm/test/CodeGen/RISCV/dead-stack-slot.ll
diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 3d261688fa8c8..38163db020c4f 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -1249,8 +1249,15 @@ bool StackColoring::runOnMachineFunction(MachineFunction &Func) {
// Do not bother looking at empty intervals.
for (unsigned I = 0; I < NumSlots; ++I) {
- if (Intervals[SortedSlots[I]]->empty())
+ int Slot = SortedSlots[I];
+ if (Intervals[Slot]->empty()) {
+ if (InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot)) {
+ RemovedSlots += 1;
+ ReducedSize += MFI->getObjectSize(Slot);
+ MFI->RemoveStackObject(Slot);
+ }
SortedSlots[I] = -1;
+ }
}
// This is a simple greedy algorithm for merging allocas. First, sort the
diff --git a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
index bf66a1ed042d2..1b0a803734ae9 100644
--- a/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
@@ -347,7 +347,6 @@ entry:
; 32BIT-LABEL: stack:
; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4, alignment: 4,
-; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4, alignment: 4,
; 32BIT-DAG: - { id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
; 32BIT-DAG: - { id: 3, name: '', type: default, offset: 0, size: 8, alignment: 8,
diff --git a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
index ccf89aac2d540..a8684fdfe1c56 100644
--- a/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -138,9 +138,7 @@
; 64BIT-LABEL: fixedStack:
; 64BIT-DAG: - { id: 0, type: default, offset: 112, size: 8, alignment: 16, stack-id: default,
-; 64BIT-LABEL: stack:
-; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8, alignment: 8,
-; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8, alignment: 8,
+; 64BIT-LABEL: stack: []
; 64BIT-LABEL: body: |
; 64BIT-DAG: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
@@ -305,9 +303,7 @@
; 64BIT-LABEL: fixedStack:
; 64BIT-DAG: - { id: 0, type: default, offset: 152, size: 8
-; 64BIT-LABEL: stack:
-; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8
-; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8
+; 64BIT-LABEL: stack: []
; 64BIT-LABEL: body: |
; 64BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
new file mode 100644
index 0000000000000..fdba359edddaf
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefix=RV32I
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
+; RUN: | FileCheck %s -check-prefix=RV64I
+
+; Remove the lifetime-marked alloca, but not the unmarked one.
+define dso_local signext i32 @f1() nounwind {
+; RV32I-LABEL: f1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: li a0, 0
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: f1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: li a0, 0
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %1 = alloca [32 x i8], align 4
+ %2 = alloca [32 x i8], align 4
+ %3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
+ call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %3)
+ call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %3)
+ ret i32 0
+}
+
+declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+
>From cc6ae37156302b141e413147b1377b022eecde27 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Mon, 27 Nov 2023 11:49:27 +0000
Subject: [PATCH 2/5] Fix Debug Info after removing stack slot
---
llvm/lib/CodeGen/StackColoring.cpp | 7 +++++++
llvm/test/DebugInfo/COFF/lexicalblock.ll | 24 ++----------------------
2 files changed, 9 insertions(+), 22 deletions(-)
diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index 38163db020c4f..fccba66113105 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -899,6 +899,13 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
unsigned FixedMemOp = 0;
unsigned FixedDbg = 0;
+ // Remove debug information for deleted slots.
+ erase_if(MF->getVariableDbgInfo(), [&](auto &VI) {
+ int Slot = VI.getStackSlot();
+ return Slot >= 0 && Intervals[Slot]->empty() &&
+ InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot);
+ });
+
// Remap debug information that refers to stack slots.
for (auto &VI : MF->getVariableDbgInfo()) {
if (!VI.Var || !VI.inStackSlot())
diff --git a/llvm/test/DebugInfo/COFF/lexicalblock.ll b/llvm/test/DebugInfo/COFF/lexicalblock.ll
index 40dd8f894252c..3bfae85f6c9ba 100644
--- a/llvm/test/DebugInfo/COFF/lexicalblock.ll
+++ b/llvm/test/DebugInfo/COFF/lexicalblock.ll
@@ -63,32 +63,12 @@
; CHECK: LocalSym {
; CHECK: VarName: localA
; CHECK: }
-; CHECK: LocalSym {
-; CHECK: VarName: localB
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK: Kind: S_BLOCK32 {{.*}}
-; CHECK: BlockName:
-; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK: Kind: S_END {{.*}}
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK: Kind: S_BLOCK32 {{.*}}
-; CHECK: BlockName:
-; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK: Kind: S_END {{.*}}
-; CHECK: }
; CHECK: BlockSym {
; CHECK: Kind: S_BLOCK32 {{.*}}
; CHECK: BlockName:
; CHECK: }
-; CHECK: ScopeEndSym {
-; CHECK: }
-; CHECK: BlockSym {
-; CHECK: Kind: S_BLOCK32 {{.*}}
-; CHECK: BlockName:
+; CHECK: LocalSym {
+; CHECK: VarName: localB
; CHECK: }
; CHECK: ScopeEndSym {
; CHECK: Kind: S_END {{.*}}
>From dda22427a96b2ecc6d336fe5fad4fbb808aef0cd Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Tue, 28 Nov 2023 10:24:23 +0000
Subject: [PATCH 3/5] use-opaque-pointer
---
llvm/test/CodeGen/RISCV/dead-stack-slot.ll | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
index fdba359edddaf..3bfe05eabb36b 100644
--- a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -21,12 +21,12 @@ define dso_local signext i32 @f1() nounwind {
; RV64I-NEXT: ret
%1 = alloca [32 x i8], align 4
%2 = alloca [32 x i8], align 4
- %3 = getelementptr inbounds [32 x i8], [32 x i8]* %1, i64 0, i64 0
- call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %3)
- call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %3)
+ %3 = getelementptr inbounds [32 x i8], ptr %1, i64 0, i64 0
+ call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3)
+ call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3)
ret i32 0
}
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
>From 81309b725aa7aead35d7baa9cf36cba4a5f0a0b3 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Wed, 29 Nov 2023 22:01:41 +0000
Subject: [PATCH 4/5] check debuginfo is stack slot
---
llvm/lib/CodeGen/StackColoring.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index fccba66113105..f0b438c9ac07e 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -901,6 +901,7 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
// Remove debug information for deleted slots.
erase_if(MF->getVariableDbgInfo(), [&](auto &VI) {
+ if (!VI.inStackSlot()) return false;
int Slot = VI.getStackSlot();
return Slot >= 0 && Intervals[Slot]->empty() &&
InterestingSlots.test(Slot) && !ConservativeSlots.test(Slot);
>From 80a04b101bb0676390ba7fb1fc6c3e21bbe6b7a0 Mon Sep 17 00:00:00 2001
From: Mohammed Nurul Hoque <Mohammed.NurulHoque at imgtec.com>
Date: Thu, 7 Dec 2023 09:32:09 +0000
Subject: [PATCH 5/5] simplify test case
---
llvm/test/CodeGen/RISCV/dead-stack-slot.ll | 25 ++++++++--------------
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
index 3bfe05eabb36b..49b0d2ab58c4f 100644
--- a/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
+++ b/llvm/test/CodeGen/RISCV/dead-stack-slot.ll
@@ -1,24 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
-; RUN: | FileCheck %s -check-prefix=RV32I
+; RUN: | FileCheck %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
-; RUN: | FileCheck %s -check-prefix=RV64I
+; RUN: | FileCheck %s
; Remove the lifetime-marked alloca, but not the unmarked one.
-define dso_local signext i32 @f1() nounwind {
-; RV32I-LABEL: f1:
-; RV32I: # %bb.0:
-; RV32I-NEXT: addi sp, sp, -32
-; RV32I-NEXT: li a0, 0
-; RV32I-NEXT: addi sp, sp, 32
-; RV32I-NEXT: ret
-;
-; RV64I-LABEL: f1:
-; RV64I: # %bb.0:
-; RV64I-NEXT: addi sp, sp, -32
-; RV64I-NEXT: li a0, 0
-; RV64I-NEXT: addi sp, sp, 32
-; RV64I-NEXT: ret
+define signext i32 @f1() nounwind {
+; CHECK-LABEL: f1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi sp, sp, -32
+; CHECK-NEXT: li a0, 0
+; CHECK-NEXT: addi sp, sp, 32
+; CHECK-NEXT: ret
%1 = alloca [32 x i8], align 4
%2 = alloca [32 x i8], align 4
%3 = getelementptr inbounds [32 x i8], ptr %1, i64 0, i64 0
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