[llvm] [TwoAddressInstruction] Recompute live intervals for partial defs (PR #74431)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 7 01:03:02 PST 2023


================
@@ -1937,13 +1937,16 @@ eliminateRegSequence(MachineBasicBlock::iterator &MBBI) {
   }
 
   bool DefEmitted = false;
+  bool DefIsPartial = false;
   for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2) {
     MachineOperand &UseMO = MI.getOperand(i);
     Register SrcReg = UseMO.getReg();
     unsigned SubIdx = MI.getOperand(i+1).getImm();
     // Nothing needs to be inserted for undef operands.
-    if (UseMO.isUndef())
+    if (UseMO.isUndef()) {
+      DefIsPartial = true;
----------------
arsenm wrote:

Do we actually know a REG_SEQUENCE fully covers the result register? e.g. something like 

`%2:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1`

is valid but doesn't define all lanes 

https://github.com/llvm/llvm-project/pull/74431


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