[llvm] [RISCV] Set DebugLoc of epilogue (PR #74702)

[Shao-Ce SUN via llvm-commits]

================
@@ -681,6 +681,10 @@ void RISCVInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
                                           const TargetRegisterClass *RC,
                                           const TargetRegisterInfo *TRI,
                                           Register VReg) const {
+  DebugLoc DL;
+  if (I != MBB.end())
----------------
sunshaoce wrote:

Do we also need to check `isDebugInstr`? I see this in `RISCVFrameLowering::restoreCalleeSavedRegisters`.
```
  if (MI != MBB.end() && !MI->isDebugInstr())
```


https://github.com/llvm/llvm-project/pull/74702