[llvm] [MachineCopyPropagation] When the source of PreviousCopy is undef, we cannot replace sub register (PR #74682)

[via llvm-commits]

https://github.com/DianQK created https://github.com/llvm/llvm-project/pull/74682

Fixes #74680.

>From a979b8588a595b47845ae4631d5f5a41de92edad Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Thu, 7 Dec 2023 08:09:49 +0800
Subject: [PATCH] [MachineCopyPropagation] When the source of PreviousCopy is
 undef, we cannot replace sub register

The `postrapseudos` may replace `mov w8, w0` with `mov x8, x0`.
---
 llvm/lib/CodeGen/MachineCopyPropagation.cpp   |   3 +
 .../test/CodeGen/AArch64/machine-cp-undef.mir | 145 ++++++++++++++++++
 2 files changed, 148 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/machine-cp-undef.mir

diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index a032b31a1fc7c6..fdbdaa0a6d641a 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -443,6 +443,9 @@ static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src,
     return true;
   if (!TRI->isSubRegister(PreviousSrc, Src))
     return false;
+  // When the source of PreviousCopy is undef, we cannot replace sub register.
+  if (CopyOperands->Source->isUndef())
+    return false;
   unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
   return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
 }
diff --git a/llvm/test/CodeGen/AArch64/machine-cp-undef.mir b/llvm/test/CodeGen/AArch64/machine-cp-undef.mir
new file mode 100644
index 00000000000000..015b01fcc30b0a
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/machine-cp-undef.mir
@@ -0,0 +1,145 @@
+# RUN: llc -o - %s -O3 -mcpu=apple-m1 -mtriple=arm64-apple-macos | FileCheck %s
+
+--- |
+  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+  target triple = "arm64-apple-macosx11.0.0"
+  
+  ; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(none)
+  define fastcc noundef zeroext i1 @foo(i32 %self.0.val, i8 %self.4.val) unnamed_addr #0 {
+  start:
+    switch i32 %self.0.val, label %bb2 [
+      i32 0, label %bb9
+      i32 1, label %bb4
+      i32 2, label %bb5
+      i32 3, label %bb1
+    ]
+  
+  bb2:                                              ; preds = %start
+    unreachable
+  
+  bb4:                                              ; preds = %start
+    br label %bb9
+  
+  bb5:                                              ; preds = %start
+    br label %bb9
+  
+  bb1:                                              ; preds = %start
+    %trunc.not = icmp eq i8 %self.4.val, 0
+    br label %bb9
+  
+  bb9:                                              ; preds = %bb1, %bb5, %bb4, %start
+    %_0.0.off0 = phi i1 [ true, %bb5 ], [ true, %bb4 ], [ false, %start ], [ %trunc.not, %bb1 ]
+    ret i1 %_0.0.off0
+  }
+  
+  attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(none) "frame-pointer"="non-leaf" "target-cpu"="apple-m1" }
+  
+  !llvm.module.flags = !{!0, !1}
+  !llvm.ident = !{!2}
+  
+  !0 = !{i32 8, !"PIC Level", i32 2}
+  !1 = !{i32 7, !"PIE Level", i32 2}
+  !2 = !{!"rustc version 1.76.0-nightly (0e2dac837 2023-12-04)"}
+
+...
+---
+name:            foo
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+callsEHReturn:   false
+callsUnwindInit: false
+hasEHCatchret:   false
+hasEHScopes:     false
+hasEHFunclets:   false
+isOutlined:      false
+debugInstrRef:   false
+failsVerification: false
+tracksDebugUserValues: true
+registers:       []
+liveins:
+  - { reg: '$w0', virtual-reg: '' }
+  - { reg: '$w1', virtual-reg: '' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    1
+  adjustsStack:    false
+  hasCalls:        false
+  stackProtector:  ''
+  functionContext: ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  hasTailCall:     false
+  localFrameSize:  0
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:           []
+entry_values:    []
+callSites:       []
+debugValueSubstitutions: []
+constants:       []
+machineFunctionInfo: {}
+jumpTable:
+  kind:            label-difference32
+  entries:
+    - id:              0
+      blocks:          [ '%bb.5', '%bb.2', '%bb.3', '%bb.4' ]
+body:             |
+  bb.0.start:
+    successors: %bb.1(0x80000000)
+    liveins: $w0, $w1
+  
+    ; CHECK: mov	w8, w0
+    ; CHECK-NOT: mov	x8, x0
+    ; CHECK: ldrb	w11, [x9, x8]
+    renamable $w8 = COPY $w0
+    renamable $w8 = ORRWrs $wzr, killed renamable $w8, 0, implicit-def $x8
+    renamable $w0 = COPY $wzr
+  
+  bb.1.start:
+    successors: %bb.5(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+    liveins: $w0, $w1, $x8
+  
+    renamable $x9 = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
+    early-clobber renamable $x10, dead early-clobber renamable $x11 = JumpTableDest32 killed renamable $x9, killed renamable $x8, %jump-table.0
+    BR killed renamable $x10
+  
+  bb.2.bb4:
+    successors: %bb.5(0x80000000)
+  
+    renamable $w0 = MOVi32imm 1
+    B %bb.5
+  
+  bb.3.bb5:
+    successors: %bb.5(0x80000000)
+  
+    renamable $w0 = MOVi32imm 1
+    B %bb.5
+  
+  bb.4.bb1:
+    successors: %bb.5(0x80000000)
+    liveins: $w1
+  
+    dead $wzr = ANDSWri killed renamable $w1, 7, implicit-def $nzcv
+    renamable $w0 = CSINCWr $wzr, $wzr, 1, implicit killed $nzcv
+  
+  bb.5.bb9:
+    liveins: $w0
+  
+    RET_ReallyLR implicit $w0
+
+...