[llvm] 546a9ce - CodeGen: Fix bypassing legality checks for IMPLICIT_DEF rematerialization (#73934)
via llvm-commits
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Wed Dec 6 06:43:23 PST 2023
Author: Matt Arsenault
Date: 2023-12-06T21:43:19+07:00
New Revision: 546a9ce80cac8fe73d239496010ae84972da3ca8
URL: https://github.com/llvm/llvm-project/commit/546a9ce80cac8fe73d239496010ae84972da3ca8
DIFF: https://github.com/llvm/llvm-project/commit/546a9ce80cac8fe73d239496010ae84972da3ca8.diff
LOG: CodeGen: Fix bypassing legality checks for IMPLICIT_DEF rematerialization (#73934)
It's permitted to have extra implicit-def operands of the same main
register
after the main register def. If there are implicit operands, use the
standard
legality checks which verify the operand contents.
Depends #73933
Added:
llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
Modified:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/Target/X86/X86InstrInfo.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 282fecc3ea81c..dfd27aa91e9db 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -140,7 +140,8 @@ class TargetInstrInfo : public MCInstrInfo {
/// registers so that the instructions result is independent of the place
/// in the function.
bool isTriviallyReMaterializable(const MachineInstr &MI) const {
- return MI.getOpcode() == TargetOpcode::IMPLICIT_DEF ||
+ return (MI.getOpcode() == TargetOpcode::IMPLICIT_DEF &&
+ MI.getNumOperands() == 1) ||
(MI.getDesc().isRematerializable() &&
isReallyTriviallyReMaterializable(MI));
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index bf0845a6708b0..a69ce40982ad8 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -780,7 +780,9 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(
// flag set.
llvm_unreachable("Unknown rematerializable operation!");
break;
-
+ case X86::IMPLICIT_DEF:
+ // Defer to generic logic.
+ break;
case X86::LOAD_STACK_GUARD:
case X86::LD_Fp032:
case X86::LD_Fp064:
diff --git a/llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir b/llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
new file mode 100644
index 0000000000000..aa94a03786f54
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
@@ -0,0 +1,92 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -stress-regalloc=4 -verify-regalloc -run-pass=greedy -o - %s | FileCheck %s
+
+--- |
+ define void @inst_stores_to_dead_spill_implicit_def_impdef() {
+ ret void
+ }
+
+ define void @inst_stores_to_dead_spill_movimm_impdef() {
+ ret void
+ }
+
+ declare void @foo(ptr, i32, ...)
+
+...
+
+# The IMPLICIT_DEf has an implicit-def of a
diff erent virtual register
+# than the main def, so it should not be unconditionally treated as
+# rematerializable.
+
+---
+name: inst_stores_to_dead_spill_implicit_def_impdef
+tracksRegLiveness: true
+frameInfo:
+ hasCalls: true
+body: |
+ bb.0:
+ liveins: $x0, $x1
+ ; CHECK-LABEL: name: inst_stores_to_dead_spill_implicit_def_impdef
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: STRXui $x0, %stack.0, 0 :: (store (s64) into %stack.0)
+ ; CHECK-NEXT: dead undef [[COPY:%[0-9]+]].sub_32:gpr64 = COPY $x1
+ ; CHECK-NEXT: dead undef [[DEF:%[0-9]+]].sub_32:gpr64 = IMPLICIT_DEF implicit-def %6
+ ; CHECK-NEXT: STRXui %6, %stack.1, 0 :: (store (s64) into %stack.1)
+ ; CHECK-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
+ ; CHECK-NEXT: BL @foo, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+ ; CHECK-NEXT: ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp
+ ; CHECK-NEXT: [[LDRXui:%[0-9]+]]:gpr64common = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
+ ; CHECK-NEXT: [[LDRXui1:%[0-9]+]]:gpr64 = LDRXui %stack.1, 0 :: (load (s64) from %stack.1)
+ ; CHECK-NEXT: STRXui [[LDRXui1]], [[LDRXui]], 1 :: (store (s64) into stack + 8)
+ ; CHECK-NEXT: STRXui undef %8:gpr64, [[LDRXui]], 0 :: (store (s64) into stack)
+ ; CHECK-NEXT: RET_ReallyLR
+ %0:gpr64sp = COPY $x0
+ undef %1.sub_32:gpr64 = COPY $x1
+ undef %2.sub_32:gpr64 = IMPLICIT_DEF implicit-def %1
+ ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
+ BL @foo, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+ ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp
+ STRXui %1, %0, 1 :: (store (s64) into stack + 8)
+ STRXui undef %1, %0, 0 :: (store (s64) into stack)
+ RET_ReallyLR
+
+...
+
+# Same function, except with a rematerializable mov imm instead of
+# IMPLICIT_DEF
+---
+name: inst_stores_to_dead_spill_movimm_impdef
+tracksRegLiveness: true
+frameInfo:
+ hasCalls: true
+body: |
+ bb.0:
+ liveins: $x0, $x1
+ ; CHECK-LABEL: name: inst_stores_to_dead_spill_movimm_impdef
+ ; CHECK: liveins: $x0, $x1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: STRXui $x0, %stack.0, 0 :: (store (s64) into %stack.0)
+ ; CHECK-NEXT: dead undef [[COPY:%[0-9]+]].sub_32:gpr64 = COPY $x1
+ ; CHECK-NEXT: dead undef [[MOVi32imm:%[0-9]+]].sub_32:gpr64 = MOVi32imm 4, implicit-def %6
+ ; CHECK-NEXT: STRXui %6, %stack.1, 0 :: (store (s64) into %stack.1)
+ ; CHECK-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
+ ; CHECK-NEXT: BL @foo, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+ ; CHECK-NEXT: ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp
+ ; CHECK-NEXT: [[LDRXui:%[0-9]+]]:gpr64common = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
+ ; CHECK-NEXT: [[LDRXui1:%[0-9]+]]:gpr64 = LDRXui %stack.1, 0 :: (load (s64) from %stack.1)
+ ; CHECK-NEXT: STRXui [[LDRXui1]], [[LDRXui]], 1 :: (store (s64) into stack + 8)
+ ; CHECK-NEXT: STRXui undef %8:gpr64, [[LDRXui]], 0 :: (store (s64) into stack)
+ ; CHECK-NEXT: RET_ReallyLR
+ %0:gpr64sp = COPY $x0
+ undef %1.sub_32:gpr64 = COPY $x1
+ undef %2.sub_32:gpr64 = MOVi32imm 4, implicit-def %1
+ ADJCALLSTACKDOWN 8, 0, implicit-def dead $sp, implicit $sp
+ BL @foo, csr_darwin_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp
+ ADJCALLSTACKUP 8, 0, implicit-def dead $sp, implicit $sp
+ STRXui %1, %0, 1 :: (store (s64) into stack + 8)
+ STRXui undef %1, %0, 0 :: (store (s64) into stack)
+ RET_ReallyLR
+
+...
+
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