[llvm] [RISCV][RFC] Enable store clustering by default (PR #73796)
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Wed Dec 6 06:42:08 PST 2023
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git-clang-format --diff b8bc2351b8fde6da3bff34c1507391d3714427cc e5eaf0c0c46a6cdf33c26b4e20d89a73246c6c3e -- llvm/include/llvm/CodeGen/MachineScheduler.h llvm/include/llvm/CodeGen/TargetInstrInfo.h llvm/lib/CodeGen/MachineScheduler.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.h llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.h llvm/lib/Target/RISCV/RISCVInstrInfo.cpp llvm/lib/Target/RISCV/RISCVInstrInfo.h llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
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diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 6b49e17528..c59ac213f7 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -10,8 +10,8 @@
//
//===----------------------------------------------------------------------===//
-#include "AArch64ExpandImm.h"
#include "AArch64InstrInfo.h"
+#include "AArch64ExpandImm.h"
#include "AArch64FrameLowering.h"
#include "AArch64MachineFunctionInfo.h"
#include "AArch64PointerAuth.h"
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 0de795d9d5..c5856568b2 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -159,7 +159,7 @@ unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
if (Cycle < 0)
continue;
- Latency = std::max(Latency, (unsigned) Cycle);
+ Latency = std::max(Latency, (unsigned)Cycle);
}
return Latency;
@@ -210,8 +210,8 @@ int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
case PPC::DIR_PWR7:
case PPC::DIR_PWR8:
// FIXME: Is this needed for POWER9?
- Latency += 2;
- break;
+ Latency += 2;
+ break;
}
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
index 0c9ad60741..d9b7656ac9 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -298,9 +298,9 @@ public:
const MachineInstr &DefMI, unsigned DefIdx,
const MachineInstr &UseMI,
unsigned UseIdx) const override;
- int getOperandLatency(const InstrItineraryData *ItinData,
- SDNode *DefNode, unsigned DefIdx,
- SDNode *UseNode, unsigned UseIdx) const override {
+ int getOperandLatency(const InstrItineraryData *ItinData, SDNode *DefNode,
+ unsigned DefIdx, SDNode *UseNode,
+ unsigned UseIdx) const override {
return PPCGenInstrInfo::getOperandLatency(ItinData, DefNode, DefIdx,
UseNode, UseIdx);
}
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https://github.com/llvm/llvm-project/pull/73796
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