[llvm] [RISCV] Enable load clustering by default (PR #73789)
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Wed Dec 6 06:23:01 PST 2023
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git-clang-format --diff d4d88b8499b66e0904e5c545613a14d170b3ea62 f61a84305764c8c4dab15065f46a1678f31b0d05 -- llvm/include/llvm/CodeGen/MachineScheduler.h llvm/include/llvm/CodeGen/TargetInstrInfo.h llvm/lib/CodeGen/MachineScheduler.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.h llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.h llvm/lib/Target/RISCV/RISCVInstrInfo.cpp llvm/lib/Target/RISCV/RISCVInstrInfo.h llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
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View the diff from clang-format here.
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diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 419d665dfb..148ce56ccb 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -1349,11 +1349,13 @@ ScheduleDAGMI *createGenericSchedPostRA(MachineSchedContext *C);
std::unique_ptr<ScheduleDAGMutation>
createLoadClusterDAGMutation(const TargetInstrInfo *TII,
- const TargetRegisterInfo *TRI, bool ReorderWhileClustering=false);
+ const TargetRegisterInfo *TRI,
+ bool ReorderWhileClustering = false);
std::unique_ptr<ScheduleDAGMutation>
createStoreClusterDAGMutation(const TargetInstrInfo *TII,
- const TargetRegisterInfo *TRI, bool ReorderWhileClustering=false);
+ const TargetRegisterInfo *TRI,
+ bool ReorderWhileClustering = false);
std::unique_ptr<ScheduleDAGMutation>
createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index a86da16edd..6ff01181a9 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -1747,8 +1747,10 @@ class BaseMemOpClusterMutation : public ScheduleDAGMutation {
public:
BaseMemOpClusterMutation(const TargetInstrInfo *tii,
- const TargetRegisterInfo *tri, bool IsLoad, bool ReorderWhileClustering)
- : TII(tii), TRI(tri), IsLoad(IsLoad), ReorderWhileClustering(ReorderWhileClustering) {}
+ const TargetRegisterInfo *tri, bool IsLoad,
+ bool ReorderWhileClustering)
+ : TII(tii), TRI(tri), IsLoad(IsLoad),
+ ReorderWhileClustering(ReorderWhileClustering) {}
void apply(ScheduleDAGInstrs *DAGInstrs) override;
@@ -1764,13 +1766,15 @@ protected:
class StoreClusterMutation : public BaseMemOpClusterMutation {
public:
StoreClusterMutation(const TargetInstrInfo *tii,
- const TargetRegisterInfo *tri, bool ReorderWhileClustering)
+ const TargetRegisterInfo *tri,
+ bool ReorderWhileClustering)
: BaseMemOpClusterMutation(tii, tri, false, ReorderWhileClustering) {}
};
class LoadClusterMutation : public BaseMemOpClusterMutation {
public:
- LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri, bool ReorderWhileClustering)
+ LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri,
+ bool ReorderWhileClustering)
: BaseMemOpClusterMutation(tii, tri, true, ReorderWhileClustering) {}
};
@@ -1780,15 +1784,19 @@ namespace llvm {
std::unique_ptr<ScheduleDAGMutation>
createLoadClusterDAGMutation(const TargetInstrInfo *TII,
- const TargetRegisterInfo *TRI, bool ReorderWhileClustering) {
- return EnableMemOpCluster ? std::make_unique<LoadClusterMutation>(TII, TRI, ReorderWhileClustering)
+ const TargetRegisterInfo *TRI,
+ bool ReorderWhileClustering) {
+ return EnableMemOpCluster ? std::make_unique<LoadClusterMutation>(
+ TII, TRI, ReorderWhileClustering)
: nullptr;
}
std::unique_ptr<ScheduleDAGMutation>
createStoreClusterDAGMutation(const TargetInstrInfo *TII,
- const TargetRegisterInfo *TRI, bool ReorderWhileClustering) {
- return EnableMemOpCluster ? std::make_unique<StoreClusterMutation>(TII, TRI, ReorderWhileClustering)
+ const TargetRegisterInfo *TRI,
+ bool ReorderWhileClustering) {
+ return EnableMemOpCluster ? std::make_unique<StoreClusterMutation>(
+ TII, TRI, ReorderWhileClustering)
: nullptr;
}
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https://github.com/llvm/llvm-project/pull/73789
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