[llvm] [AMDGPU] GFX12: select @llvm.prefetch intrinsic (PR #74576)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 6 01:34:24 PST 2023


================
@@ -959,6 +967,32 @@ def : GCNPat <
 }
 } // let OtherPredicates = [HasShaderCyclesRegister]
 
+def SIMM24bitPtr : ImmLeaf <iPTR,
+  [{return isInt<24>(Imm);}]
+>;
+
+multiclass SMPrefetchPat<string type, int cache_type> {
+  def : GCNPat <
+    (smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32 cache_type)),
+    (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type) $sbase, $offset, (i32 SGPR_NULL), (i8 0))
+  >;
+
+  def : GCNPat <
+    (smrd_prefetch (i64 SReg_64:$sbase), timm, timm, (i32 cache_type)),
+    (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type) $sbase, 0, (i32 SGPR_NULL), (i8 0))
+  >;
+
+  def : GCNPat <
+    (prefetch SIMM24bitPtr:$offset, timm, timm, (i32 cache_type)),
+    (!cast<SM_Prefetch_Pseudo>("S_PREFETCH_"#type#"_PC_REL") (as_i32timm $offset), (i32 SGPR_NULL), (i8 0))
+  > {
+    let AddedComplexity = 10;
+  }
----------------
jayfoad wrote:

I don't understand this pattern. `(prefetch 0x12345678, 0, 0, 0)` should prefetch from absolute address 0x12345678, but this pattern selects `S_PREFETCH_*_PC_REL 0x12345678, null, 0` which will prefetch from pc+0x12345678, which is different. @rampitec can you explain?

https://github.com/llvm/llvm-project/pull/74576


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