[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

[Valery Pykhtin via llvm-commits]

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@@ -18,6 +18,26 @@
 using namespace llvm;
 
 #define DEBUG_TYPE "machine-scheduler"
+namespace {
+
+struct ExcessVGPRWeightParser : public cl::parser<unsigned> {
+  ExcessVGPRWeightParser(cl::Option &O) : cl::parser<unsigned>(O) {}
+
+  bool parse(cl::Option &O, StringRef ArgName, StringRef Arg, unsigned &Value) {
+    if (Arg.getAsInteger(0, Value) || Value > 2048 || Value < 0)
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vpykhtin wrote:

Value is unsigned, are you really going to test if Value is below zero?

https://github.com/llvm/llvm-project/pull/71882