[llvm] LoopVectorize: fix phi cost when it is scalar after vectorization (PR #74456)
Ramkumar Ramachandra via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 5 04:15:26 PST 2023
https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/74456
In getInstructionCost, when a phi node is identified as a fixed-order recurrence, and the vectorization factor indicates that we're
vectorizing, we return the cost of a shuffle. However, if it also satisfies the condition isScalarAfterVectorization, this cost is incorrect, as it won't be converted into a shuffle. Fix the cost.
Fixes #72969.
-- 8< --
Based on #74111.
>From 312a2752107e94bfddbcfeb2ed9d9aa6cf6cc931 Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <Ramkumar.Ramachandra at imgtec.com>
Date: Fri, 1 Dec 2023 17:15:43 +0000
Subject: [PATCH 1/2] LoopVectorize/{X86,AArch64}: add test for crash in #72969
---
.../LoopVectorize/AArch64/pr72969.ll | 24 +++++++++++++++++++
.../Transforms/LoopVectorize/X86/pr72969.ll | 24 +++++++++++++++++++
2 files changed, 48 insertions(+)
create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
create mode 100644 llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
new file mode 100644
index 0000000000000..d83c7451c49ea
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
@@ -0,0 +1,24 @@
+; RUN: not --crash opt -mtriple=aarch64 -mattr=-sve,+neon -passes=loop-vectorize -S < %s
+
+ at h = global i32 0, align 4
+
+define void @test(ptr %p) {
+entry:
+ br label %for.body
+
+for.body:
+ %idx.ext.merge = phi i64 [ 1, %entry ], [ %idx, %for.body ]
+ %inc.merge = phi i16 [ 1, %entry ], [ %inc, %for.body ]
+ %idx.merge = phi i64 [ 0, %entry ], [ %idx.ext.merge, %for.body ]
+ %add = shl i64 %idx.merge, 1
+ %arrayidx = getelementptr [1 x i32], ptr %p, i64 0, i64 %add
+ %0 = load i32, ptr %arrayidx, align 4
+ %inc = add i16 %inc.merge, 1
+ %idx = zext i16 %inc to i64
+ %gep = getelementptr i32, ptr %p, i64 %idx
+ %cmp = icmp ugt ptr %gep, @h
+ br i1 %cmp, label %exit, label %for.body
+
+exit:
+ ret void
+}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll b/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
new file mode 100644
index 0000000000000..72c8b16becfc3
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
@@ -0,0 +1,24 @@
+; RUN: not --crash opt -mtriple=x86_64 -mattr=-avx,-avx2,-avx512f,-sse2,-sse3,+sse -passes=loop-vectorize -S < %s
+
+ at h = global i32 0, align 4
+
+define void @test(ptr %p) {
+entry:
+ br label %for.body
+
+for.body:
+ %idx.ext.merge = phi i64 [ 1, %entry ], [ %idx, %for.body ]
+ %inc.merge = phi i16 [ 1, %entry ], [ %inc, %for.body ]
+ %idx.merge = phi i64 [ 0, %entry ], [ %idx.ext.merge, %for.body ]
+ %add = shl i64 %idx.merge, 1
+ %arrayidx = getelementptr [1 x i32], ptr %p, i64 0, i64 %add
+ %0 = load i32, ptr %arrayidx, align 4
+ %inc = add i16 %inc.merge, 1
+ %idx = zext i16 %inc to i64
+ %gep = getelementptr i32, ptr %p, i64 %idx
+ %cmp = icmp ugt ptr %gep, @h
+ br i1 %cmp, label %exit, label %for.body
+
+exit:
+ ret void
+}
>From 94a033fccda9cce4716c9075b9e3664ee0f743a8 Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <Ramkumar.Ramachandra at imgtec.com>
Date: Tue, 5 Dec 2023 11:33:16 +0000
Subject: [PATCH 2/2] LoopVectorize: fix phi cost when it is scalar after
vectorization
In getInstructionCost, when a phi node is identified as a fixed-order
recurrence, and the vectorization factor indicates that we're
vectorizing, we return the cost of a shuffle. However, if it also
satisfies the condition isScalarAfterVectorization, this cost is
incorrect, as it won't be converted into a shuffle. Fix the cost.
Fixes #72969.
---
.../Transforms/Vectorize/LoopVectorize.cpp | 5 +-
.../LoopVectorize/AArch64/pr72969.ll | 77 ++++++++++++++++++-
.../Transforms/LoopVectorize/X86/pr72969.ll | 22 +++++-
3 files changed, 101 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 09a6e01226ab6..1166a39e3ff5e 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7176,7 +7176,10 @@ LoopVectorizationCostModel::getInstructionCost(Instruction *I, ElementCount VF,
auto *Phi = cast<PHINode>(I);
// First-order recurrences are replaced by vector shuffles inside the loop.
- if (VF.isVector() && Legal->isFixedOrderRecurrence(Phi)) {
+ // However, if the Phi is a scalar after vectorization, it won't be
+ // converted into a shuffle.
+ if (VF.isVector() && Legal->isFixedOrderRecurrence(Phi) &&
+ !isScalarAfterVectorization(Phi, VF)) {
SmallVector<int> Mask(VF.getKnownMinValue());
std::iota(Mask.begin(), Mask.end(), VF.getKnownMinValue() - 1);
return TTI.getShuffleCost(TargetTransformInfo::SK_Splice,
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
index d83c7451c49ea..832c55ba9a1f9 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr72969.ll
@@ -1,8 +1,77 @@
-; RUN: not --crash opt -mtriple=aarch64 -mattr=-sve,+neon -passes=loop-vectorize -S < %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -mtriple=aarch64 -mattr=-sve,+neon -passes=loop-vectorize -S < %s | FileCheck %s
@h = global i32 0, align 4
define void @test(ptr %p) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[P1:%.*]] = ptrtoint ptr [[P]] to i64
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[P1]], 8
+; CHECK-NEXT: [[UMAX2:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP0]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[UMAX2]], -5
+; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], [[P1]]
+; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 2
+; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 2
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
+; CHECK: vector.scevcheck:
+; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[P1]], 8
+; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP5]], i64 add (i64 ptrtoint (ptr @h to i64), i64 1))
+; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[UMAX]], -5
+; CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], [[P1]]
+; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 2
+; CHECK-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP8]], 65535
+; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP8]] to i16
+; CHECK-NEXT: [[TMP11:%.*]] = add i16 2, [[TMP10]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp ult i16 [[TMP11]], 2
+; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt i64 [[TMP8]], 65535
+; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP12]], [[TMP13]]
+; CHECK-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 2
+; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]]
+; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i64 [[N_VEC]] to i16
+; CHECK-NEXT: [[IND_END:%.*]] = add i16 1, [[DOTCAST]]
+; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi i64 [ 1, [[VECTOR_PH]] ], [ [[TMP20:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[DOTCAST4:%.*]] = trunc i64 [[INDEX]] to i16
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i16 1, [[DOTCAST4]]
+; CHECK-NEXT: [[TMP15:%.*]] = add i16 [[OFFSET_IDX]], 0
+; CHECK-NEXT: [[TMP16:%.*]] = add i16 [[OFFSET_IDX]], 1
+; CHECK-NEXT: [[TMP17:%.*]] = add i16 [[TMP15]], 1
+; CHECK-NEXT: [[TMP18:%.*]] = add i16 [[TMP16]], 1
+; CHECK-NEXT: [[TMP19:%.*]] = zext i16 [[TMP17]] to i64
+; CHECK-NEXT: [[TMP20]] = zext i16 [[TMP18]] to i64
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: middle.block:
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
+; CHECK: scalar.ph:
+; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i64 [ 1, [[VECTOR_SCEVCHECK]] ], [ 1, [[ENTRY:%.*]] ], [ [[TMP20]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY]] ], [ 1, [[VECTOR_SCEVCHECK]] ]
+; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i64 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[IDX:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[INC_MERGE:%.*]] = phi i16 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[IDX_MERGE:%.*]] = phi i64 [ [[BC_RESUME_VAL3]], [[SCALAR_PH]] ], [ [[SCALAR_RECUR]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ADD:%.*]] = shl i64 [[IDX_MERGE]], 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [1 x i32], ptr [[P]], i64 0, i64 [[ADD]]
+; CHECK-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INC]] = add i16 [[INC_MERGE]], 1
+; CHECK-NEXT: [[IDX]] = zext i16 [[INC]] to i64
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[P]], i64 [[IDX]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt ptr [[GEP]], @h
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
@@ -22,3 +91,9 @@ for.body:
exit:
ret void
}
+;.
+; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
+; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
+; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
+; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]]}
+;.
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll b/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
index 72c8b16becfc3..4cf0399438e08 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
@@ -1,8 +1,28 @@
-; RUN: not --crash opt -mtriple=x86_64 -mattr=-avx,-avx2,-avx512f,-sse2,-sse3,+sse -passes=loop-vectorize -S < %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -mtriple=x86_64 -mattr=-avx,-avx2,-avx512f,-sse2,-sse3,+sse -passes=loop-vectorize -S < %s | FileCheck %s
@h = global i32 0, align 4
define void @test(ptr %p) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[IDX_EXT_MERGE:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IDX:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[INC_MERGE:%.*]] = phi i16 [ 1, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[IDX_MERGE:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IDX_EXT_MERGE]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ADD:%.*]] = shl i64 [[IDX_MERGE]], 1
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [1 x i32], ptr [[P]], i64 0, i64 [[ADD]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[INC]] = add i16 [[INC_MERGE]], 1
+; CHECK-NEXT: [[IDX]] = zext i16 [[INC]] to i64
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[P]], i64 [[IDX]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt ptr [[GEP]], @h
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[FOR_BODY]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
entry:
br label %for.body
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