[llvm] [RISCV][GISel] Reverse the operands the buildStore created in legalizeVAStart. (PR #73989)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 4 17:08:04 PST 2023
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/73989
>From 2e6d2b23fb4d80ebd2b84b44ce1bd9479dd132df Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 30 Nov 2023 13:37:35 -0800
Subject: [PATCH 1/3] [RISCV][GISel] Reverse the operands the buildStore
created in legalizeVAStart.
We need to store the frame index to the location pointed to by
the VASTART, not the other way around.
Apparently we're missing tests for G_VASTART so no tests changed.
---
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index d68c44322fbad..af7211ea75bb0 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -345,7 +345,7 @@ bool RISCVLegalizerInfo::legalizeVAStart(MachineInstr &MI,
LLT AddrTy = MIRBuilder.getMRI()->getType(MI.getOperand(0).getReg());
auto FINAddr = MIRBuilder.buildFrameIndex(AddrTy, FI);
assert(MI.hasOneMemOperand());
- MIRBuilder.buildStore(MI.getOperand(0).getReg(), FINAddr,
+ MIRBuilder.buildStore(FINAddr, MI.getOperand(0).getReg(),
*MI.memoperands()[0]);
MI.eraseFromParent();
return true;
>From 0fcbb884930d22be9e6a0d09f5daad7cd107f9fe Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Fri, 1 Dec 2023 11:44:35 -0800
Subject: [PATCH 2/3] fixup! add tests.
---
.../legalizer/legalize-vastart-rv32.mir | 41 +++++++++++++++++
.../legalizer/legalize-vastart-rv64.mir | 45 +++++++++++++++++++
2 files changed, 86 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
new file mode 100644
index 0000000000000..71ddad8797063
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
@@ -0,0 +1,41 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV32 %s
+
+--- |
+ declare void @llvm.va_start(ptr) #0
+
+ define void @test_va_start(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
+ %va = alloca ptr
+ call void @llvm.va_start(ptr %va)
+ ret void
+ }
+
+ attributes #0 = { nocallback nofree nosync nounwind willreturn }
+
+...
+---
+name: test_va_start
+tracksRegLiveness: true
+fixedStack:
+ - { id: 0, size: 4, alignment: 16, isImmutable: true }
+stack:
+ - { id: 0, name: va, size: 4, alignment: 4 }
+machineFunctionInfo:
+ varArgsFrameIndex: -1
+ varArgsSaveSize: 0
+body: |
+ bb.1 (%ir-block.8):
+ liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
+
+ ; RV32-LABEL: name: test_va_start
+ ; RV32: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
+ ; RV32-NEXT: {{ $}}
+ ; RV32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
+ ; RV32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ ; RV32-NEXT: G_STORE [[FRAME_INDEX1]](p0), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.va)
+ ; RV32-NEXT: PseudoRET
+ %8:_(p0) = G_FRAME_INDEX %stack.0.va
+ G_VASTART %8(p0) :: (store (s32) into %ir.va)
+ PseudoRET
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
new file mode 100644
index 0000000000000..8f6dbf12b6718
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
@@ -0,0 +1,45 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV64 %s
+
+--- |
+ source_filename = "test.ll"
+ target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
+ target triple = "riscv64"
+
+ declare void @llvm.va_start(ptr) #0
+
+ define void @test_va_start(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
+ %va = alloca ptr
+ call void @llvm.va_start(ptr %va)
+ ret void
+ }
+
+ attributes #0 = { nocallback nofree nosync nounwind willreturn }
+
+...
+---
+name: test_va_start
+tracksRegLiveness: true
+fixedStack:
+ - { id: 0, size: 8, alignment: 16, isImmutable: true }
+stack:
+ - { id: 0, name: va, size: 8, alignment: 8 }
+machineFunctionInfo:
+ varArgsFrameIndex: -1
+ varArgsSaveSize: 0
+body: |
+ bb.1 (%ir-block.8):
+ liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
+
+ ; RV64-LABEL: name: test_va_start
+ ; RV64: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
+ ; RV64-NEXT: {{ $}}
+ ; RV64-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
+ ; RV64-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ ; RV64-NEXT: G_STORE [[FRAME_INDEX1]](p0), [[FRAME_INDEX]](p0) :: (store (s64) into %ir.va)
+ ; RV64-NEXT: PseudoRET
+ %8:_(p0) = G_FRAME_INDEX %stack.0.va
+ G_VASTART %8(p0) :: (store (s64) into %ir.va)
+ PseudoRET
+
+...
>From 328b9b760aa53b4abba741acc642c5803bd6fced Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Mon, 4 Dec 2023 17:01:32 -0800
Subject: [PATCH 3/3] fixup! drop lines from test.
---
.../RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir | 4 ----
1 file changed, 4 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
index 8f6dbf12b6718..1f71dacfa2e8a 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
@@ -2,10 +2,6 @@
# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV64 %s
--- |
- source_filename = "test.ll"
- target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
- target triple = "riscv64"
-
declare void @llvm.va_start(ptr) #0
define void @test_va_start(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
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