[llvm] [RISCV] Remove SiFive7PipeV and replace it with SiFive7VCQ (PR #73969)

[Michael Maitland via llvm-commits]

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@@ -37,13 +37,13 @@ vle64.v v1, (a1)
 
 # CHECK:      Iterations:        1
 # CHECK-NEXT: Instructions:      26
-# CHECK-NEXT: Total Cycles:      3523
+# CHECK-NEXT: Total Cycles:      3546
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michaelmaitland wrote:

The way to look at this patch is that it more closely resembles the actual hardware. For some programs, this will mean that `Total Cycles` and `Block RThroughput` report higher on llvm-mca, and that is (hopefully) because the actual number of cycles is higher and this change brings us closer to the actual number of cycles.

The llvm-mca numbers can be higher here and lead to an actual decrease in throughput on hardware, since the old llvm-mca report was really just an incorrect estimate.

https://github.com/llvm/llvm-project/pull/73969