[llvm] e3b3c91 - [InstCombine] Fix missed opportunity to fold 'or' into 'mul' operand. (#74225)
via llvm-commits
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Sun Dec 3 00:51:27 PST 2023
Author: Craig Topper
Date: 2023-12-03T00:51:22-08:00
New Revision: e3b3c91dd0bbc8bd6f1ee562641daf1e554eb1b6
URL: https://github.com/llvm/llvm-project/commit/e3b3c91dd0bbc8bd6f1ee562641daf1e554eb1b6
DIFF: https://github.com/llvm/llvm-project/commit/e3b3c91dd0bbc8bd6f1ee562641daf1e554eb1b6.diff
LOG: [InstCombine] Fix missed opportunity to fold 'or' into 'mul' operand. (#74225)
We were able to fold
or (mul X, Y), X --> mul X, (add Y, 1) (when the multiply has no common
bits with X)
This patch makes the transform work if the mul operands are commuted.
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/test/Transforms/InstCombine/or.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 7379bdf93169e..50d20eb2f97b2 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -3394,7 +3394,7 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
// If the operands have no common bits set:
// or (mul X, Y), X --> add (mul X, Y), X --> mul X, (Y + 1)
if (match(&I,
- m_c_Or(m_OneUse(m_Mul(m_Value(X), m_Value(Y))), m_Deferred(X))) &&
+ m_c_Or(m_Value(X), m_OneUse(m_c_Mul(m_Deferred(X), m_Value(Y))))) &&
haveNoCommonBitsSet(Op0, Op1, DL)) {
Value *IncrementY = Builder.CreateAdd(Y, ConstantInt::get(Ty, 1));
return BinaryOperator::CreateMul(X, IncrementY);
diff --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll
index 8bf8c6fcd928b..81ef38d43e8c3 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -1511,6 +1511,21 @@ define <2 x i12> @mul_no_common_bits_commute(<2 x i12> %p) {
ret <2 x i12> %r
}
+define i32 @mul_no_common_bits_commute2(i32 %p1, i32 %p2) {
+; CHECK-LABEL: @mul_no_common_bits_commute2(
+; CHECK-NEXT: [[X:%.*]] = and i32 [[P1:%.*]], 7
+; CHECK-NEXT: [[Y:%.*]] = shl i32 [[P2:%.*]], 3
+; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i32 [[Y]], 1
+; CHECK-NEXT: [[R:%.*]] = mul i32 [[X]], [[TMP1]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %x = and i32 %p1, 7
+ %y = shl i32 %p2, 3
+ %m = mul i32 %y, %x
+ %r = or i32 %m, %x
+ ret i32 %r
+}
+
; negative test - extra use requires extra instructions
define i32 @mul_no_common_bits_uses(i32 %p1, i32 %p2) {
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