[llvm] 76cd035 - [InstCombine] Preserve exact instruction name for xor->or transform in SimplifyDemandedUseBits.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 2 23:22:57 PST 2023


Author: Craig Topper
Date: 2023-12-02T23:21:59-08:00
New Revision: 76cd0355cb9437641d9da64ef9025c18b016daad

URL: https://github.com/llvm/llvm-project/commit/76cd0355cb9437641d9da64ef9025c18b016daad
DIFF: https://github.com/llvm/llvm-project/commit/76cd0355cb9437641d9da64ef9025c18b016daad.diff

LOG: [InstCombine] Preserve exact instruction name for xor->or transform in SimplifyDemandedUseBits.

We were previously retaining the name with a numeric suffix.

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index f2e40e77ab49..732a3a13dacc 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -314,8 +314,8 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
     //    e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
     if (DemandedMask.isSubsetOf(RHSKnown.Zero | LHSKnown.Zero)) {
       Instruction *Or =
-        BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1),
-                                 I->getName());
+          BinaryOperator::CreateOr(I->getOperand(0), I->getOperand(1));
+      Or->takeName(I);
       return InsertNewInstWith(Or, I->getIterator());
     }
 


        


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