[llvm] [RISCV][GISel] Instruction select for vector G_ADD, G_SUB (PR #74114)

Jiahan Xie via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 1 13:13:12 PST 2023


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@@ -240,6 +254,10 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
       &RISCV::ValueMappings[GPRSize == 64 ? RISCV::GPRB64Idx
                                           : RISCV::GPRB32Idx];
 
+  unsigned VRBSize = getMaximumSize(RISCV::VRBRegBankID);
+  const ValueMapping *VRBValueMapping =
+      &RISCV::ValueMappings[VRBSize == 64 ? RISCV::VRB64Idx : RISCV::VRB32Idx];
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jiahanxie353 wrote:

for VRB, do we always have size == 64?

https://github.com/llvm/llvm-project/pull/74114


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