[llvm] 625e1ec - Fix MSVC signed/unsigned mismatch warning. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 1 10:34:31 PST 2023
Author: Simon Pilgrim
Date: 2023-12-01T18:34:01Z
New Revision: 625e1ecb7e80c1da4ea50e5b1ad632f08b71d127
URL: https://github.com/llvm/llvm-project/commit/625e1ecb7e80c1da4ea50e5b1ad632f08b71d127
DIFF: https://github.com/llvm/llvm-project/commit/625e1ecb7e80c1da4ea50e5b1ad632f08b71d127.diff
LOG: Fix MSVC signed/unsigned mismatch warning. NFC.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index 4d6d350c46f5aff..c9e2745f00c9584 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -661,7 +661,7 @@ void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
OpIdx += TII->get(Use->getMachineOpcode()).getNumDefs();
std::optional<unsigned> Latency =
TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx);
- if (Latency > 1 && Use->getOpcode() == ISD::CopyToReg &&
+ if (Latency > 1U && Use->getOpcode() == ISD::CopyToReg &&
!BB->succ_empty()) {
unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
if (Register::isVirtualRegister(Reg))
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