[llvm] [AMDGPU][True16] Support V_CEIL_F16. (PR #73108)
Joe Nash via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 1 09:16:31 PST 2023
================
@@ -7150,8 +7155,14 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
if (AMDGPU::getNamedOperandIdx(NewOpcode,
AMDGPU::OpName::src0_modifiers) >= 0)
NewInstr.addImm(0);
- if (AMDGPU::getNamedOperandIdx(NewOpcode, AMDGPU::OpName::src0) >= 0)
- NewInstr->addOperand(Inst.getOperand(1));
+ if (AMDGPU::hasNamedOperand(NewOpcode, AMDGPU::OpName::src0)) {
+ MachineOperand Src = Inst.getOperand(1);
+ if (AMDGPU::isTrue16Inst(NewOpcode) && ST.useRealTrue16Insts() &&
+ Src.isReg() && RI.isVGPR(MRI, Src.getReg()))
+ NewInstr.addReg(Src.getReg(), 0, AMDGPU::lo16);
----------------
Sisyph wrote:
Ok this works. The register will be replaced right away with a new VGPR so the only relevant thing here is adjusting the size.
https://github.com/llvm/llvm-project/pull/73108
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