[llvm] [RISCV] Rework IDiv and FDiv pipes on SiFive7 (PR #73970)

[Michael Maitland via llvm-commits]

================
@@ -213,12 +213,12 @@ let SchedModel = SiFive7Model in {
 let BufferSize = 0 in {
 def SiFive7PipeA       : ProcResource<1>;
 def SiFive7PipeB       : ProcResource<1>;
+def SiFive7IDiv        : ProcResource<1> { let Super = SiFive7PipeB; } // Int Division
----------------
michaelmaitland wrote:

I didn't mean to keep the Super class. As @wangpc-pp points out that the description of the PR says it is removed. I will push a fixup.

https://github.com/llvm/llvm-project/pull/73970