[llvm] [AMDGPU][True16] Support V_CEIL_F16. (PR #73108)

[Joe Nash via llvm-commits]

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@@ -2303,7 +2303,17 @@ bool AMDGPUOperand::isInlineValue() const {
 // AsmParser
 //===----------------------------------------------------------------------===//
 
-static int getRegClass(RegisterKind Is, unsigned RegWidth) {
+static int getRegClass(RegisterKind Is, unsigned RegWidth,
+                       RegisterSuffix Suffix) {
+  if (Suffix != RegisterSuffix::None) {
+    if (Is == IS_VGPR && RegWidth == 16) {
+      if (Suffix == RegisterSuffix::Lo)
+        return AMDGPU::VGPR_LO16RegClassID;
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Sisyph wrote:

Regardless of the future, I think using VGPR_16 right now would be less complicated. Why use two separate register classes when one will do? We should consolidate functionality on VGPR_16

https://github.com/llvm/llvm-project/pull/73108