[llvm] TargetInstrInfo: squelch a signedness warning on MSVC (PR #74078)
Ramkumar Ramachandra via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 1 05:53:01 PST 2023
https://github.com/artagnon created https://github.com/llvm/llvm-project/pull/74078
Follow up on 9468de4 (TargetInstrInfo: make getOperandLatency return optional (NFC)) to squelch a signedness warning on MSVC, reported by Simon Pilgrim.
>From 096366d9f5975c10d3208311dca8948662e8a97c Mon Sep 17 00:00:00 2001
From: Ramkumar Ramachandra <Ramkumar.Ramachandra at imgtec.com>
Date: Fri, 1 Dec 2023 13:50:05 +0000
Subject: [PATCH] TargetInstrInfo: squelch a signedness warning on MSVC
Follow up on 9468de4 (TargetInstrInfo: make getOperandLatency return
optional (NFC)) to squelch a signedness warning on MSVC, reported by
Simon Pilgrim.
---
llvm/include/llvm/MC/MCInstrItineraries.h | 2 +-
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/include/llvm/MC/MCInstrItineraries.h b/llvm/include/llvm/MC/MCInstrItineraries.h
index b17c41ce3aa4a14..d1c2e788ee8105c 100644
--- a/llvm/include/llvm/MC/MCInstrItineraries.h
+++ b/llvm/include/llvm/MC/MCInstrItineraries.h
@@ -220,7 +220,7 @@ class InstrItineraryData {
return std::nullopt;
UseCycle = *DefCycle - *UseCycle + 1;
- if (UseCycle > 0 &&
+ if (UseCycle > 0u &&
hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx))
// FIXME: This assumes one cycle benefit for every pipeline forwarding.
UseCycle = *UseCycle - 1;
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 94f34b127696609..ce65c8e5245b19f 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -4110,7 +4110,7 @@ std::optional<unsigned> ARMBaseInstrInfo::getOperandLatency(
return std::nullopt;
UseCycle = *DefCycle - *UseCycle + 1;
- if (UseCycle > 0) {
+ if (UseCycle > 0u) {
if (LdmBypass) {
// It's a variable_ops instruction so we can't use DefIdx here. Just use
// first def operand.
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