[llvm] da1aff2 - [llvm][PowerPC] Correct handling of spill slots for SPE when EXPENSIVE_CHECKS is enabled (#73940)
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Fri Dec 1 02:40:32 PST 2023
Author: David Spickett
Date: 2023-12-01T10:40:24Z
New Revision: da1aff2b2a3192f5e32fa350de19aac0b89fed18
URL: https://github.com/llvm/llvm-project/commit/da1aff2b2a3192f5e32fa350de19aac0b89fed18
DIFF: https://github.com/llvm/llvm-project/commit/da1aff2b2a3192f5e32fa350de19aac0b89fed18.diff
LOG: [llvm][PowerPC] Correct handling of spill slots for SPE when EXPENSIVE_CHECKS is enabled (#73940)
This was modifying a container as it iterated it, which tripped a check
in libstdc++'s debug checks.
Instead, just assign to the item via the reference we already have.
This fixes the following expensive checks failures on my machine:
LLVM :: CodeGen/PowerPC/fp-strict.ll
LLVM :: CodeGen/PowerPC/pr55463.ll
LLVM :: CodeGen/PowerPC/register-pressure.ll
LLVM :: CodeGen/PowerPC/spe.ll
Which are some of the tests noted by #68594.
Added:
Modified:
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index eb3bf3b2690b227..245e78641ed6544 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -2334,24 +2334,16 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
// In case of SPE we only have SuperRegs and CRs
// in our CalleSaveInfo vector.
- unsigned Idx = 0;
for (auto &CalleeSaveReg : CSI) {
- const MCPhysReg &Reg = CalleeSaveReg.getReg();
- const MCPhysReg &Lower = RegInfo->getSubReg(Reg, 1);
- const MCPhysReg &Higher = RegInfo->getSubReg(Reg, 2);
-
- // Check only for SuperRegs.
- if (Lower) {
- if (MRI.isPhysRegModified(Higher)) {
- Idx++;
- continue;
- } else {
+ MCPhysReg Reg = CalleeSaveReg.getReg();
+ MCPhysReg Lower = RegInfo->getSubReg(Reg, 1);
+ MCPhysReg Higher = RegInfo->getSubReg(Reg, 2);
+
+ if ( // Check only for SuperRegs.
+ Lower &&
// Replace Reg if only lower-32 bits modified
- CSI.erase(CSI.begin() + Idx);
- CSI.insert(CSI.begin() + Idx, CalleeSavedInfo(Lower));
- }
- }
- Idx++;
+ !MRI.isPhysRegModified(Higher))
+ CalleeSaveReg = CalleeSavedInfo(Lower);
}
}
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