[llvm] [RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (PR #74053)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mc

Author: Wang Yaduo (MouseSplinter)

<details>
<summary>Changes</summary>

Enable the llvm-objdump to disassemble the immediate of RISCV instruction in hexadecimal format with --print-imm-hex flag.

---
Full diff: https://github.com/llvm/llvm-project/pull/74053.diff


2 Files Affected:

- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp (+4-4) 
- (added) llvm/test/MC/RISCV/print-imm-hex.s (+42) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
index a6f3f7f8d18e069..195dda0b8b14059 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
@@ -91,7 +91,7 @@ void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
   }
 
   if (MO.isImm()) {
-    markup(O, Markup::Immediate) << MO.getImm();
+    markup(O, Markup::Immediate) << formatImm(MO.getImm());
     return;
   }
 
@@ -113,7 +113,7 @@ void RISCVInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
       Target &= 0xffffffff;
     markup(O, Markup::Target) << formatHex(Target);
   } else {
-    markup(O, Markup::Target) << MO.getImm();
+    markup(O, Markup::Target) << formatImm(MO.getImm());
   }
 }
 
@@ -128,7 +128,7 @@ void RISCVInstPrinter::printCSRSystemRegister(const MCInst *MI, unsigned OpNo,
   else if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits()))
     markup(O, Markup::Register) << SysReg->Name;
   else
-    markup(O, Markup::Register) << Imm;
+    markup(O, Markup::Register) << formatImm(Imm);
 }
 
 void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
@@ -212,7 +212,7 @@ void RISCVInstPrinter::printVTypeI(const MCInst *MI, unsigned OpNo,
   // or non-zero in bits 8 and above.
   if (RISCVVType::getVLMUL(Imm) == RISCVII::VLMUL::LMUL_RESERVED ||
       RISCVVType::getSEW(Imm) > 64 || (Imm >> 8) != 0) {
-    O << Imm;
+    O << formatImm(Imm);
     return;
   }
   // Print the text form.
diff --git a/llvm/test/MC/RISCV/print-imm-hex.s b/llvm/test/MC/RISCV/print-imm-hex.s
new file mode 100644
index 000000000000000..dd35b5c423a9d15
--- /dev/null
+++ b/llvm/test/MC/RISCV/print-imm-hex.s
@@ -0,0 +1,42 @@
+# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding -mattr=+v \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding -mattr=+v --print-imm-hex \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-HEX %s
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+v < %s \
+# RUN:     | llvm-objdump -M no-aliases --mattr=+v -d -r - \
+# RUN:     | FileCheck -check-prefixes=CHECK-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+v < %s \
+# RUN:     | llvm-objdump -M no-aliases --mattr=+v --print-imm-hex -d -r - \
+# RUN:     | FileCheck -check-prefixes=CHECK-OBJ-HEX %s
+
+# CHECK-ASM: beq s1, s1, 102
+# CHECK-ASM-HEX: beq s1, s1, 0x66
+# CHECK-OBJ: beq s1, s1, 0x66
+# CHECK-OBJ-HEX: beq s1, s1, 0x66
+beq s1, s1, 102
+
+_sym:
+# CHECK-ASM: beq s1, s1, _sym
+# CHECK-ASM-HEX: beq s1, s1, _sym
+# CHECK-OBJ: beq s1, s1, 0x4
+# CHECK-OBJ-HEX: beq s1, s1, 0x4
+beq s1, s1, _sym
+
+# CHECK-ASM: lw a0, 97(a2)
+# CHECK-ASM-HEX: lw a0, 0x61(a2)
+# CHECK-OBJ: lw a0, 97(a2)
+# CHECK-OBJ-HEX: lw a0, 0x61(a2)
+lw a0, 97(a2)
+
+# CHECK-ASM: csrrwi t0, 4095, 31
+# CHECK-ASM-HEX: csrrwi t0, 0xfff, 0x1f
+# CHECK-OBJ: csrrwi t0, 4095, 31
+# CHECK-OBJ-HEX: csrrwi t0, 0xfff, 0x1f
+csrrwi t0, 0xfff, 31
+
+
+# CHECK-ASM: vsetvli a2, a0, 255
+# CHECK-ASM-HEX: vsetvli a2, a0, 0xff
+# CHECK-OBJ: vsetvli a2, a0, 255
+# CHECK-OBJ-HEX: vsetvli a2, a0, 0xff
+vsetvli a2, a0, 0xff

``````````

</details>


https://github.com/llvm/llvm-project/pull/74053