[llvm] d48d1ed - PowerPC/aix-cc-abi: regenerate test using UTC (NFC) (#73963)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 1 00:22:26 PST 2023
Author: Ramkumar Ramachandra
Date: 2023-12-01T08:22:18Z
New Revision: d48d1edcf3ed0c1352b3c2864feb873f01d6f9da
URL: https://github.com/llvm/llvm-project/commit/d48d1edcf3ed0c1352b3c2864feb873f01d6f9da
DIFF: https://github.com/llvm/llvm-project/commit/d48d1edcf3ed0c1352b3c2864feb873f01d6f9da.diff
LOG: PowerPC/aix-cc-abi: regenerate test using UTC (NFC) (#73963)
Split out the parts of aix-cc-abi.ll that requires to be regenerated by
utils/update_mir_test_checks.py into aix-cc-abi-mir.ll, and regenerate
it using the script. Regenerate aix-cc-abi.ll using
utils/update_llc_test_checks.py.
Added:
llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
Modified:
llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll b/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
new file mode 100644
index 000000000000000..ccc36530c7957bd
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
@@ -0,0 +1,2068 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: FileCheck --check-prefix=32BIT %s
+
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: FileCheck --check-prefix=64BIT %s
+
+define void @call_test_chars() {
+ ; 32BIT-LABEL: name: call_test_chars
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 97
+ ; 32BIT-NEXT: $r4 = LI 97
+ ; 32BIT-NEXT: $r5 = LI 97
+ ; 32BIT-NEXT: $r6 = LI 97
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_chars>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_chars
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 97
+ ; 64BIT-NEXT: $x4 = LI8 97
+ ; 64BIT-NEXT: $x5 = LI8 97
+ ; 64BIT-NEXT: $x6 = LI8 97
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_chars>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ call i8 @test_chars(i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97)
+ ret void
+}
+
+define signext i8 @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8 signext %c4) {
+ ; 32BIT-LABEL: name: test_chars
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r3 = EXTSB killed renamable $r3
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: test_chars
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r3 = ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
+ ; 64BIT-NEXT: renamable $x3 = EXTSB8 killed renamable $x3
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %conv = sext i8 %c1 to i32
+ %conv1 = sext i8 %c2 to i32
+ %add = add nsw i32 %conv, %conv1
+ %conv2 = sext i8 %c3 to i32
+ %add3 = add nsw i32 %add, %conv2
+ %conv4 = sext i8 %c4 to i32
+ %add5 = add nsw i32 %add3, %conv4
+ %conv6 = trunc i32 %add5 to i8
+ ret i8 %conv6
+}
+
+define void @call_test_chars_mix() {
+ ; 32BIT-LABEL: name: call_test_chars_mix
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 97
+ ; 32BIT-NEXT: $r4 = LI 225
+ ; 32BIT-NEXT: $r5 = LI 97
+ ; 32BIT-NEXT: $r6 = LI -31
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_chars_mix>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_chars_mix
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 97
+ ; 64BIT-NEXT: $x4 = LI8 225
+ ; 64BIT-NEXT: $x5 = LI8 97
+ ; 64BIT-NEXT: $x6 = LI8 -31
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_chars_mix>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ call i8 @test_chars_mix(i8 signext 97, i8 zeroext -31, i8 zeroext 97, i8 signext -31)
+ ret void
+}
+
+define signext i8 @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3, i8 signext %c4) {
+ ; 32BIT-LABEL: name: test_chars_mix
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r3 = EXTSB killed renamable $r3
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: test_chars_mix
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r3 = ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r6, implicit killed $x6, implicit-def $x3
+ ; 64BIT-NEXT: renamable $x3 = EXTSB8 killed renamable $x3
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %conv = sext i8 %c1 to i32
+ %conv1 = zext i8 %c2 to i32
+ %add = add nsw i32 %conv, %conv1
+ %conv2 = zext i8 %c3 to i32
+ %add3 = add nsw i32 %add, %conv2
+ %conv4 = sext i8 %c4 to i32
+ %add5 = add nsw i32 %add3, %conv4
+ %conv6 = trunc i32 %add5 to i8
+ ret i8 %conv6
+}
+
+ at global_i1 = global i8 0, align 1
+
+define void @test_i1(i1 %b) {
+ ; 32BIT-LABEL: name: test_i1
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @global_i1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = RLWINM killed renamable $r3, 0, 31, 31
+ ; 32BIT-NEXT: STB killed renamable $r3, 0, killed renamable $r4 :: (store (s8) into @global_i1)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: test_i1
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @global_i1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $r3 = RLWINM renamable $r3, 0, 31, 31, implicit killed $x3
+ ; 64BIT-NEXT: STB killed renamable $r3, 0, killed renamable $x4 :: (store (s8) into @global_i1)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+ %frombool = zext i1 %b to i8
+ store i8 %frombool, ptr @global_i1, align 1
+ ret void
+}
+
+define void @call_test_i1() {
+ ; 32BIT-LABEL: name: call_test_i1
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_i1>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_i1
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_i1>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ call void @test_i1(i1 1)
+ ret void
+}
+
+define void @test_i1zext(i1 zeroext %b) {
+ ; 32BIT-LABEL: name: test_i1zext
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @global_i1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STB killed renamable $r3, 0, killed renamable $r4 :: (store (s8) into @global_i1)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: test_i1zext
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @global_i1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STB8 killed renamable $x3, 0, killed renamable $x4 :: (store (s8) into @global_i1)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+ %frombool = zext i1 %b to i8
+ store i8 %frombool, ptr @global_i1, align 1
+ ret void
+ }
+
+define i32 @test_ints(i32 signext %a, i32 zeroext %b, i32 zeroext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h) {
+ ; 32BIT-LABEL: name: test_ints
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r7
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r8
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r9
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r10
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: test_ints
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r3 = ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r6, implicit killed $x6
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r7, implicit killed $x7
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r8, implicit killed $x8
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r9, implicit killed $x9
+ ; 64BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, renamable $r10, implicit killed $x10, implicit-def $x3
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %add = add i32 %a, %b
+ %add1 = add i32 %add, %c
+ %add2 = add i32 %add1, %d
+ %add3 = add i32 %add2, %e
+ %add4 = add i32 %add3, %f
+ %add5 = add i32 %add4, %g
+ %add6 = add i32 %add5, %h
+ ret i32 %add6
+}
+
+define void @call_test_ints() {
+ ; 32BIT-LABEL: name: call_test_ints
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 1
+ ; 32BIT-NEXT: $r5 = LIS 32768
+ ; 32BIT-NEXT: $r6 = LIS 32768
+ ; 32BIT-NEXT: $r7 = LI 1
+ ; 32BIT-NEXT: $r8 = LI 1
+ ; 32BIT-NEXT: $r9 = LI 1
+ ; 32BIT-NEXT: $r10 = LI 1
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_ints>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_ints
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x3 = LI8 1
+ ; 64BIT-NEXT: renamable $x5 = RLDIC killed renamable $x3, 31, 32
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 1
+ ; 64BIT-NEXT: $x6 = LIS8 32768
+ ; 64BIT-NEXT: $x7 = LI8 1
+ ; 64BIT-NEXT: $x8 = LI8 1
+ ; 64BIT-NEXT: $x9 = LI8 1
+ ; 64BIT-NEXT: $x10 = LI8 1
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_ints>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ call i32 @test_ints(i32 signext 1, i32 zeroext 1, i32 zeroext 2147483648, i32 signext -2147483648, i32 signext 1, i32 signext 1, i32 signext 1, i32 signext 1)
+ ret void
+}
+
+define void @call_test_i64() {
+ ; 32BIT-LABEL: name: call_test_i64
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 0
+ ; 32BIT-NEXT: $r4 = LI 1
+ ; 32BIT-NEXT: $r5 = LI 0
+ ; 32BIT-NEXT: $r6 = LI 2
+ ; 32BIT-NEXT: $r7 = LI 0
+ ; 32BIT-NEXT: $r8 = LI 3
+ ; 32BIT-NEXT: $r9 = LI 0
+ ; 32BIT-NEXT: $r10 = LI 4
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_i64>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1, implicit-def dead $r3, implicit-def dead $r4
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_i64
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_i64>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ call i64 @test_i64(i64 1, i64 2, i64 3, i64 4)
+ ret void
+}
+
+define i64 @test_i64(i64 %a, i64 %b, i64 %c, i64 %d) {
+ ; 32BIT-LABEL: name: test_i64
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r4 = ADDC killed renamable $r4, killed renamable $r6, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDE killed renamable $r3, killed renamable $r5, implicit-def dead $carry, implicit killed $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDC killed renamable $r4, killed renamable $r8, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDE killed renamable $r3, killed renamable $r7, implicit-def dead $carry, implicit killed $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDC killed renamable $r4, killed renamable $r10, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDE killed renamable $r3, killed renamable $r9, implicit-def dead $carry, implicit killed $carry
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3, implicit $r4
+ ;
+ ; 64BIT-LABEL: name: test_i64
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x4
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x5
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x6
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %add = add nsw i64 %a, %b
+ %add1 = add nsw i64 %add, %c
+ %add2 = add nsw i64 %add1, %d
+ ret i64 %add2
+}
+
+define void @call_test_int_ptr() {
+ ; 32BIT-LABEL: name: call_test_int_ptr
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LI 0
+ ; 32BIT-NEXT: STW killed renamable $r3, 0, %stack.0.b :: (store (s32) into %ir.b)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: renamable $r3 = ADDI %stack.0.b, 0
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_int_ptr>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_int_ptr
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LI8 0
+ ; 64BIT-NEXT: STW8 killed renamable $x3, 0, %stack.0.b :: (store (s32) into %ir.b)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x3 = ADDI8 %stack.0.b, 0
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_int_ptr>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %b = alloca i32, align 4
+ store i32 0, ptr %b, align 4
+ call void @test_int_ptr(ptr %b)
+ ret void
+}
+
+define void @test_int_ptr(ptr %a) {
+ ; 32BIT-LABEL: name: test_int_ptr
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: STW killed renamable $r3, 0, %stack.0.a.addr :: (store (s32) into %ir.a.addr, align 8)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: test_int_ptr
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: STD killed renamable $x3, 0, %stack.0.a.addr :: (store (s64) into %ir.a.addr)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %a.addr = alloca ptr, align 8
+ store ptr %a, ptr %a.addr, align 8
+ ret void
+}
+
+define i32 @caller(i32 %i) {
+ ; 32BIT-LABEL: name: caller
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: STW renamable $r3, 0, %stack.0.i.addr :: (store (s32) into %ir.i.addr)
+ ; 32BIT-NEXT: renamable $r3 = CNTLZW killed renamable $r3
+ ; 32BIT-NEXT: renamable $r3 = NOR killed renamable $r3, renamable $r3
+ ; 32BIT-NEXT: renamable $r3 = RLWINM killed renamable $r3, 27, 31, 31
+ ; 32BIT-NEXT: STB renamable $r3, 0, %stack.1.b :: (store (s8) into %ir.b)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .call_test_bool[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1, implicit-def $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: caller
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: STW renamable $r3, 0, %stack.0.i.addr :: (store (s32) into %ir.i.addr)
+ ; 64BIT-NEXT: renamable $r3 = CNTLZW renamable $r3, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = RLWINM killed renamable $r3, 27, 5, 31
+ ; 64BIT-NEXT: renamable $r3 = XORI killed renamable $r3, 1, implicit-def $x3
+ ; 64BIT-NEXT: STB renamable $r3, 0, %stack.1.b :: (store (s8) into %ir.b)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .call_test_bool[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %i.addr = alloca i32, align 4
+ %b = alloca i8, align 1
+ store i32 %i, ptr %i.addr, align 4
+ %0 = load i32, ptr %i.addr, align 4
+ %cmp = icmp ne i32 %0, 0
+ %frombool = zext i1 %cmp to i8
+ store i8 %frombool, ptr %b, align 1
+ %1 = load i8, ptr %b, align 1
+ %tobool = trunc i8 %1 to i1
+ %call = call i32 @call_test_bool(i1 zeroext %tobool)
+ ret i32 %call
+}
+
+declare i32 @call_test_bool(i1 zeroext)
+
+ at f1 = global float 0.000000e+00, align 4
+ at d1 = global double 0.000000e+00, align 8
+
+define void @call_test_floats() {
+ ; 32BIT-LABEL: name: call_test_floats
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $f2 = COPY renamable $f1
+ ; 32BIT-NEXT: $f3 = COPY renamable $f1
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_floats>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $r2, implicit-def $r1, implicit-def dead $f1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_floats
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $f2 = COPY renamable $f1
+ ; 64BIT-NEXT: $f3 = COPY renamable $f1
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_floats>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1, implicit-def dead $f1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ call float @test_floats(float %0, float %0, float %0)
+ ret void
+}
+
+define float @test_floats(float %f1, float %f2, float %f3) {
+ ; 32BIT-LABEL: name: test_floats
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $f3
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADDS killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADDS killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
+ ;
+ ; 64BIT-LABEL: name: test_floats
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $f3
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADDS killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADDS killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $f1
+entry:
+ %add = fadd float %f1, %f2
+ %add1 = fadd float %add, %f3
+ ret float %add1
+}
+
+define void @call_test_fpr_max() {
+ ; 32BIT-LABEL: name: call_test_fpr_max
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d1)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: STFD renamable $f1, 120, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 112, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 104, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 96, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 88, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 80, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 72, $r1 :: (store (s64))
+ ; 32BIT-NEXT: STFD renamable $f1, 64, $r1 :: (store (s64))
+ ; 32BIT-NEXT: $f2 = COPY renamable $f1
+ ; 32BIT-NEXT: $f3 = COPY renamable $f1
+ ; 32BIT-NEXT: $f4 = COPY renamable $f1
+ ; 32BIT-NEXT: $f5 = COPY renamable $f1
+ ; 32BIT-NEXT: $f6 = COPY renamable $f1
+ ; 32BIT-NEXT: $f7 = COPY renamable $f1
+ ; 32BIT-NEXT: $f8 = COPY renamable $f1
+ ; 32BIT-NEXT: $f9 = COPY renamable $f1
+ ; 32BIT-NEXT: $f10 = COPY renamable $f1
+ ; 32BIT-NEXT: $f11 = COPY renamable $f1
+ ; 32BIT-NEXT: $f12 = COPY renamable $f1
+ ; 32BIT-NEXT: $f13 = COPY renamable $f1
+ ; 32BIT-NEXT: STFD renamable $f1, 56, $r1 :: (store (s64))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_fpr_max>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $r2, implicit-def $r1, implicit-def dead $f1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_fpr_max
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d1)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 152, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: STFD renamable $f1, 144, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STFD renamable $f1, 136, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STFD renamable $f1, 128, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STFD renamable $f1, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: $f2 = COPY renamable $f1
+ ; 64BIT-NEXT: $f3 = COPY renamable $f1
+ ; 64BIT-NEXT: $f4 = COPY renamable $f1
+ ; 64BIT-NEXT: $f5 = COPY renamable $f1
+ ; 64BIT-NEXT: $f6 = COPY renamable $f1
+ ; 64BIT-NEXT: $f7 = COPY renamable $f1
+ ; 64BIT-NEXT: $f8 = COPY renamable $f1
+ ; 64BIT-NEXT: $f9 = COPY renamable $f1
+ ; 64BIT-NEXT: $f10 = COPY renamable $f1
+ ; 64BIT-NEXT: $f11 = COPY renamable $f1
+ ; 64BIT-NEXT: $f12 = COPY renamable $f1
+ ; 64BIT-NEXT: $f13 = COPY renamable $f1
+ ; 64BIT-NEXT: STFD renamable $f1, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_fpr_max>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1, implicit-def dead $f1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load double, ptr @d1, align 8
+ call double @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0)
+ ret void
+}
+
+define double @test_fpr_max(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13) {
+ ; 32BIT-LABEL: name: test_fpr_max
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
+ ;
+ ; 64BIT-LABEL: name: test_fpr_max
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $f1
+entry:
+ %add = fadd double %d1, %d2
+ %add1 = fadd double %add, %d3
+ %add2 = fadd double %add1, %d4
+ %add3 = fadd double %add2, %d5
+ %add4 = fadd double %add3, %d6
+ %add5 = fadd double %add4, %d7
+ %add6 = fadd double %add5, %d8
+ %add7 = fadd double %add6, %d9
+ %add8 = fadd double %add7, %d10
+ %add9 = fadd double %add8, %d11
+ %add10 = fadd double %add9, %d12
+ %add11 = fadd double %add10, %d13
+ ret double %add11
+}
+
+define void @call_test_mix() {
+ ; 32BIT-LABEL: name: call_test_mix
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @d1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r4 :: (dereferenceable load (s64) from @d1)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r4 = LI 1
+ ; 32BIT-NEXT: $r7 = LI 97
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_mix>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r4, implicit $f2, implicit killed $r7, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_mix
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @d1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x4 :: (dereferenceable load (s64) from @d1)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x4 = LI8 1
+ ; 64BIT-NEXT: $x6 = LI8 97
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_mix>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ %1 = load double, ptr @d1, align 8
+ call i32 @test_mix(float %0, i32 1, double %1, i8 signext 97)
+ ret void
+}
+
+define i32 @test_mix(float %f, i32 signext %i, double %d, i8 signext %c) {
+ ; 32BIT-LABEL: name: test_mix
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $r4, $r7
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r3 = LIS 17200
+ ; 32BIT-NEXT: STW killed renamable $r3, 0, %stack.1 :: (store (s32) into %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $r3 = RLWINM killed renamable $r7, 0, 24, 31
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r4, killed renamable $r3
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = XORIS killed renamable $r3, 32768
+ ; 32BIT-NEXT: STW killed renamable $r3, 4, %stack.1 :: (store (s32) into %stack.1 + 4)
+ ; 32BIT-NEXT: renamable $f0 = LFS 0, killed renamable $r4 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: renamable $f3 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FRSP killed renamable $f1, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FSUB killed renamable $f3, killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FRSP killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADDS killed renamable $f0, killed renamable $f1, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: test_mix
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $x4, $x6
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r3 = RLWINM renamable $r6, 0, 24, 31, implicit killed $x6
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r4, killed renamable $r3, implicit killed $x4
+ ; 64BIT-NEXT: renamable $x3 = EXTSW_32_64 killed renamable $r3
+ ; 64BIT-NEXT: STD killed renamable $x3, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f0 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FRSP killed renamable $f1, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FCFID killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FRSP killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADDS killed renamable $f0, killed renamable $f1, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x3 = LWZ8 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %conv = fpext float %f to double
+ %add = fadd double %conv, %d
+ %conv1 = fptrunc double %add to float
+ %conv2 = zext i8 %c to i32
+ %add3 = add nsw i32 %i, %conv2
+ %conv4 = sitofp i32 %add3 to float
+ %add5 = fadd float %conv4, %conv1
+ %conv6 = fptosi float %add5 to i32
+ ret i32 %conv6
+}
+
+define i64 @callee_mixed_ints(i32 %a, i8 signext %b, i32 %c, i16 signext %d, i64 %e) {
+ ; 32BIT-LABEL: name: callee_mixed_ints
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r4 = RLWINM killed renamable $r4, 0, 24, 31
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r5 = SRAWI renamable $r3, 31, implicit-def dead $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDC killed renamable $r3, killed renamable $r8, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDE killed renamable $r5, killed renamable $r7, implicit-def dead $carry, implicit killed $carry
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3, implicit $r4
+ ;
+ ; 64BIT-LABEL: name: callee_mixed_ints
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r4 = RLWINM renamable $r4, 0, 24, 31, implicit killed $x4
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r3, killed renamable $r4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6
+ ; 64BIT-NEXT: renamable $x3 = EXTSW_32_64 killed renamable $r3
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x7
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %conv = zext i8 %b to i32
+ %add = add nsw i32 %a, %conv
+ %add1 = add nsw i32 %add, %c
+ %conv2 = sext i16 %d to i32
+ %add3 = add nsw i32 %add1, %conv2
+ %conv4 = sext i32 %add3 to i64
+ %add5 = add nsw i64 %conv4, %e
+ ret i64 %add5
+ }
+
+define void @call_test_vararg() {
+ ; 32BIT-LABEL: name: call_test_vararg
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.1 :: (load (s32) from %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d1)
+ ; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.1 :: (load (s32) from %stack.1 + 4)
+ ; 32BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r6 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
+ ; 32BIT-NEXT: renamable $r7 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 42
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit $f2, implicit $r6, implicit $r7, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_vararg
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d1)
+ ; 64BIT-NEXT: renamable $x4 = LD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x5 = LD 0, %stack.0 :: (load (s64) from %stack.0)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 42
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $f2, implicit $x5, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ %conv = fpext float %0 to double
+ %1 = load double, ptr @d1, align 8
+ call void (i32, ...) @test_vararg(i32 42, double %conv, double %1)
+ ret void
+}
+
+declare void @test_vararg(i32, ...)
+
+define void @call_test_vararg2() {
+ ; 32BIT-LABEL: name: call_test_vararg2
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.1 :: (load (s32) from %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d1)
+ ; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.1 :: (load (s32) from %stack.1 + 4)
+ ; 32BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r7 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
+ ; 32BIT-NEXT: renamable $r8 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 42
+ ; 32BIT-NEXT: $r6 = LI 42
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit killed $r6, implicit $f2, implicit $r7, implicit $r8, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_vararg2
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d1)
+ ; 64BIT-NEXT: renamable $x4 = LD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x6 = LD 0, %stack.0 :: (load (s64) from %stack.0)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 42
+ ; 64BIT-NEXT: $x5 = LI8 42
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ %conv = fpext float %0 to double
+ %1 = load double, ptr @d1, align 8
+ call void (i32, ...) @test_vararg(i32 42, double %conv, i32 42, double %1)
+ ret void
+}
+
+define void @call_test_vararg3() {
+ ; 32BIT-LABEL: name: call_test_vararg3
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.1 :: (load (s32) from %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d1)
+ ; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.1 :: (load (s32) from %stack.1 + 4)
+ ; 32BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r8 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
+ ; 32BIT-NEXT: renamable $r9 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 42
+ ; 32BIT-NEXT: $r6 = LI 0
+ ; 32BIT-NEXT: $r7 = LI 42
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit killed $r6, implicit killed $r7, implicit $f2, implicit $r8, implicit $r9, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_vararg3
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STFD renamable $f1, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d1)
+ ; 64BIT-NEXT: renamable $x4 = LD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: STFD renamable $f2, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x6 = LD 0, %stack.0 :: (load (s64) from %stack.0)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 42
+ ; 64BIT-NEXT: $x5 = LI8 42
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ %conv = fpext float %0 to double
+ %1 = load double, ptr @d1, align 8
+ call void (i32, ...) @test_vararg(i32 42, double %conv, i64 42, double %1)
+ ret void
+}
+
+define void @call_test_vararg4() {
+ ; 32BIT-LABEL: name: call_test_vararg4
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
+ ; 32BIT-NEXT: STFS renamable $f1, 0, %stack.0 :: (store (s32) into %stack.0)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.0 :: (load (s32) from %stack.0)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 42
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_vararg4
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
+ ; 64BIT-NEXT: STFS renamable $f1, 0, %stack.0 :: (store (s32) into %stack.0)
+ ; 64BIT-NEXT: renamable $x4 = LWZ8 0, %stack.0 :: (load (s32) from %stack.0)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 42
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f1, align 4
+ call void (i32, ...) @test_vararg(i32 42, float %0)
+ ret void
+}
+
+ at c = common global i8 0, align 1
+ at si = common global i16 0, align 2
+ at i = common global i32 0, align 4
+ at lli = common global i64 0, align 8
+ at f = common global float 0.000000e+00, align 4
+ at d = common global double 0.000000e+00, align 8
+
+; Basic saving of integral type arguments to the parameter save area.
+define void @call_test_stackarg_int() {
+ ; 32BIT-LABEL: name: call_test_stackarg_int
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @c, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @si, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc @i, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r11 = LBZ 0, killed renamable $r3 :: (dereferenceable load (s8) from @c)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @lli, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LHA 0, killed renamable $r4 :: (dereferenceable load (s16) from @si)
+ ; 32BIT-NEXT: renamable $r5 = LWZ 0, killed renamable $r5 :: (dereferenceable load (s32) from @i)
+ ; 32BIT-NEXT: renamable $r6 = LWZ 0, renamable $r3 :: (dereferenceable load (s32) from @lli, align 8)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 4, killed renamable $r3 :: (dereferenceable load (s32) from @lli + 4, basealign 8)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 80, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: STW renamable $r5, 76, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r3, 72, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r6, 68, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r5, 64, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r4, 60, $r1 :: (store (s32))
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: $r10 = LI 8
+ ; 32BIT-NEXT: STW killed renamable $r11, 56, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_int[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 80, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_stackarg_int
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @c, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @si, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = LDtoc @i, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x6 = LDtoc @lli, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x11 = LBZ8 0, killed renamable $x3 :: (dereferenceable load (s8) from @c)
+ ; 64BIT-NEXT: renamable $x12 = LHA8 0, killed renamable $x4 :: (dereferenceable load (s16) from @si)
+ ; 64BIT-NEXT: renamable $x0 = LWZ8 0, killed renamable $x5 :: (dereferenceable load (s32) from @i)
+ ; 64BIT-NEXT: renamable $x31 = LD 0, killed renamable $x6 :: (dereferenceable load (s64) from @lli)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 152, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: $x10 = LI8 8
+ ; 64BIT-NEXT: STD killed renamable $x31, 136, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD renamable $x0, 144, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x0, 128, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x12, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x11, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_int[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load i8, ptr @c, align 1
+ %1 = load i16, ptr @si, align 2
+ %2 = load i32, ptr @i, align 4
+ %3 = load i64, ptr @lli, align 8
+ %4 = load i32, ptr @i, align 4
+ call void @test_stackarg_int(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i8 zeroext %0, i16 signext %1, i32 %2, i64 %3, i32 %4)
+ ret void
+}
+
+declare void @test_stackarg_int(i32, i32, i32, i32, i32, i32, i32, i32, i8 zeroext, i16 signext, i32, i64, i32)
+
+; Basic saving of floating point type arguments to the parameter save area.
+; The float and double arguments will pass in both fpr as well as parameter save area.
+define void @call_test_stackarg_float() {
+ ; 32BIT-LABEL: name: call_test_stackarg_float
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @d, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r4 :: (dereferenceable load (s64) from @d)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 68, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: STFD renamable $f2, 60, $r1 :: (store (s64))
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: $r10 = LI 8
+ ; 32BIT-NEXT: STFS renamable $f1, 56, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $f1, implicit $f2, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 68, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_stackarg_float
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @d, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x4 :: (dereferenceable load (s64) from @d)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: STFD renamable $f2, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: $x10 = LI8 8
+ ; 64BIT-NEXT: STFS renamable $f1, 112, $x1 :: (store (s32))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $f1, implicit $f2, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f, align 4
+ %1 = load double, ptr @d, align 8
+ call void @test_stackarg_float(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, float %0, double %1)
+ ret void
+}
+
+declare void @test_stackarg_float(i32, i32, i32, i32, i32, i32, i32, i32, float, double)
+
+define void @call_test_stackarg_float2() {
+ ; 32BIT-LABEL: name: call_test_stackarg_float2
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d)
+ ; 32BIT-NEXT: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r9 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
+ ; 32BIT-NEXT: renamable $r10 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float2[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit $f1, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_stackarg_float2
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d)
+ ; 64BIT-NEXT: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x9 = LD 0, %stack.0 :: (load (s64) from %stack.0)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float2[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit $f1, implicit $x9, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load double, ptr @d, align 8
+ call void (i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, double %0)
+ ret void
+}
+
+declare void @test_stackarg_float2(i32, i32, i32, i32, i32, i32, ...)
+
+; A double arg will pass on the stack in PPC32 if there is only one available GPR.
+define void @call_test_stackarg_float3() {
+ ; 32BIT-LABEL: name: call_test_stackarg_float3
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @f, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r10 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
+ ; 32BIT-NEXT: renamable $f2 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 64, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: STFS renamable $f2, 60, $r1 :: (store (s32))
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: STFD renamable $f1, 52, $r1 :: (store (s64))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float3[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit $f1, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 64, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_stackarg_float3
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @d, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x3 :: (dereferenceable load (s64) from @d)
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x10 = LD 0, %stack.0 :: (load (s64) from %stack.0)
+ ; 64BIT-NEXT: renamable $f2 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: STFS renamable $f2, 112, $x1 :: (store (s32))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float3[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit $f1, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load double, ptr @d, align 8
+ %1 = load float, ptr @f, align 4
+ call void (i32, i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float3(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, double %0, float %1)
+ ret void
+}
+
+declare void @test_stackarg_float3(i32, i32, i32, i32, i32, i32, i32, ...)
+
+define i64 @test_ints_stack(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i64 %ll9, i16 signext %s10, i8 zeroext %c11, i32 %ui12, i32 %si13, i64 %ll14, i8 zeroext %uc15, i32 %i16) {
+ ; 32BIT-LABEL: name: test_ints_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r11 = LWZ 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0)
+ ; 32BIT-NEXT: renamable $r12 = LWZ 0, %fixed-stack.4 :: (load (s32) from %fixed-stack.4)
+ ; 32BIT-NEXT: renamable $r0 = LWZ 0, %fixed-stack.1 :: (load (s32) from %fixed-stack.1, align 8)
+ ; 32BIT-NEXT: renamable $r31 = LWZ 4, %fixed-stack.3 :: (load (s32) from %fixed-stack.3 + 4, basealign 16)
+ ; 32BIT-NEXT: renamable $r30 = LWZ 0, %fixed-stack.3 :: (load (s32) from %fixed-stack.3, align 16)
+ ; 32BIT-NEXT: renamable $r29 = LWZ 0, %fixed-stack.5 :: (load (s32) from %fixed-stack.5, align 8)
+ ; 32BIT-NEXT: renamable $r28 = LWZ 0, %fixed-stack.6 :: (load (s32) from %fixed-stack.6)
+ ; 32BIT-NEXT: renamable $r27 = LWZ 0, %fixed-stack.7 :: (load (s32) from %fixed-stack.7, align 16)
+ ; 32BIT-NEXT: renamable $r26 = LWZ 4, %fixed-stack.9 :: (load (s32) from %fixed-stack.9 + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r25 = LWZ 0, %fixed-stack.9 :: (load (s32) from %fixed-stack.9, align 8)
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r5 = SRAWI renamable $r11, 31, implicit-def dead $carry
+ ; 32BIT-NEXT: renamable $r4 = SRAWI renamable $r12, 31, implicit-def dead $carry
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r7
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r8
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r9
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r10
+ ; 32BIT-NEXT: renamable $r6 = SRAWI renamable $r3, 31, implicit-def dead $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r26, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r6 = ADDE killed renamable $r6, killed renamable $r25, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r7 = SRAWI renamable $r27, 31, implicit-def dead $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r27, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r6 = ADDE killed renamable $r6, killed renamable $r7, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r28, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r6 = ADDZE killed renamable $r6, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r29, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r6 = ADDZE killed renamable $r6, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r12, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDE killed renamable $r6, killed renamable $r4, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r31, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDE killed renamable $r4, killed renamable $r30, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDC killed renamable $r3, killed renamable $r0, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r6 = ADDZE killed renamable $r4, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: renamable $r4 = ADDC killed renamable $r3, killed renamable $r11, implicit-def $carry
+ ; 32BIT-NEXT: renamable $r3 = ADDE killed renamable $r6, killed renamable $r5, implicit-def dead $carry, implicit $carry
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3, implicit $r4
+ ;
+ ; 64BIT-LABEL: name: test_ints_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $r11 = LWZ 0, %fixed-stack.1, implicit-def $x11 :: (load (s32) from %fixed-stack.1)
+ ; 64BIT-NEXT: renamable $x12 = LWZ8 0, %fixed-stack.4 :: (load (s32) from %fixed-stack.4)
+ ; 64BIT-NEXT: renamable $x0 = LWA 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0)
+ ; 64BIT-NEXT: renamable $x31 = LD 0, %fixed-stack.2 :: (load (s64) from %fixed-stack.2)
+ ; 64BIT-NEXT: renamable $x30 = LWA 0, %fixed-stack.3 :: (load (s32) from %fixed-stack.3)
+ ; 64BIT-NEXT: renamable $r29 = LWZ 0, %fixed-stack.5, implicit-def $x29 :: (load (s32) from %fixed-stack.5)
+ ; 64BIT-NEXT: renamable $x28 = LWA 0, %fixed-stack.6 :: (load (s32) from %fixed-stack.6)
+ ; 64BIT-NEXT: renamable $x27 = LD 0, %fixed-stack.7 :: (load (s64) from %fixed-stack.7, align 16)
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r7, implicit killed $x7
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r8, implicit killed $x8
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r9, implicit killed $x9
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r10, implicit killed $x10
+ ; 64BIT-NEXT: renamable $x3 = EXTSW_32_64 killed renamable $r3
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x27
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x28
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x29
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x12
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x30
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x31
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x11
+ ; 64BIT-NEXT: renamable $x3 = nsw ADD8 killed renamable $x3, killed renamable $x0
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+ %add = add nsw i32 %i1, %i2
+ %add1 = add nsw i32 %add, %i3
+ %add2 = add nsw i32 %add1, %i4
+ %add3 = add nsw i32 %add2, %i5
+ %add4 = add nsw i32 %add3, %i6
+ %add5 = add nsw i32 %add4, %i7
+ %add6 = add nsw i32 %add5, %i8
+ %conv = sext i32 %add6 to i64
+ %add7 = add nsw i64 %conv, %ll9
+ %conv8 = sext i16 %s10 to i64
+ %add9 = add nsw i64 %add7, %conv8
+ %conv10 = zext i8 %c11 to i64
+ %add11 = add nsw i64 %add9, %conv10
+ %conv12 = zext i32 %ui12 to i64
+ %add13 = add nsw i64 %add11, %conv12
+ %conv14 = sext i32 %si13 to i64
+ %add15 = add nsw i64 %add13, %conv14
+ %add16 = add nsw i64 %add15, %ll14
+ %conv17 = zext i8 %uc15 to i64
+ %add18 = add nsw i64 %add16, %conv17
+ %conv19 = sext i32 %i16 to i64
+ %add20 = add nsw i64 %add18, %conv19
+ ret i64 %add20
+}
+
+ at ll1 = common global i64 0, align 8
+ at si1 = common global i16 0, align 2
+ at ch = common global i8 0, align 1
+ at ui = common global i32 0, align 4
+ at sint = common global i32 0, align 4
+ at ll2 = common global i64 0, align 8
+ at uc1 = common global i8 0, align 1
+ at i1 = common global i32 0, align 4
+
+define void @caller_ints_stack() {
+ ; 32BIT-LABEL: name: caller_ints_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @ll1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @si1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r11 = LWZ 0, renamable $r3 :: (dereferenceable load (s32) from @ll1, align 8)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc @ch, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 4, killed renamable $r3 :: (dereferenceable load (s32) from @ll1 + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc @ui, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LHA 0, killed renamable $r4 :: (dereferenceable load (s16) from @si1)
+ ; 32BIT-NEXT: renamable $r7 = LWZtoc @sint, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r5 = LBZ 0, killed renamable $r5 :: (dereferenceable load (s8) from @ch)
+ ; 32BIT-NEXT: renamable $r8 = LWZtoc @ll2, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r6 = LWZ 0, killed renamable $r6 :: (dereferenceable load (s32) from @ui)
+ ; 32BIT-NEXT: renamable $r7 = LWZ 0, killed renamable $r7 :: (dereferenceable load (s32) from @sint)
+ ; 32BIT-NEXT: renamable $r9 = LWZtoc @uc1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r10 = LWZ 0, renamable $r8 :: (dereferenceable load (s32) from @ll2, align 8)
+ ; 32BIT-NEXT: renamable $r12 = LWZtoc @i1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r8 = LWZ 4, killed renamable $r8 :: (dereferenceable load (s32) from @ll2 + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r9 = LBZ 0, killed renamable $r9 :: (dereferenceable load (s8) from @uc1)
+ ; 32BIT-NEXT: renamable $r12 = LWZ 0, killed renamable $r12 :: (dereferenceable load (s32) from @i1)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 96, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: STW killed renamable $r12, 92, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r9, 88, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r8, 84, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r10, 80, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r7, 76, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r6, 72, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r5, 68, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r4, 64, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STW killed renamable $r3, 60, $r1 :: (store (s32))
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: $r10 = LI 8
+ ; 32BIT-NEXT: STW killed renamable $r11, 56, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_ints_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1, implicit-def dead $r3, implicit-def dead $r4
+ ; 32BIT-NEXT: ADJCALLSTACKUP 96, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: caller_ints_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @si1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @ch, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = LDtoc @ui, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x11 = LHA8 0, killed renamable $x3 :: (dereferenceable load (s16) from @si1)
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @sint, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x12 = LBZ8 0, killed renamable $x4 :: (dereferenceable load (s8) from @ch)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @uc1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x0 = LWZ8 0, killed renamable $x5 :: (dereferenceable load (s32) from @ui)
+ ; 64BIT-NEXT: renamable $x5 = LDtoc @ll1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x6 = LDtoc @ll2, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x7 = LDtoc @i1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x31 = LWZ8 0, killed renamable $x3 :: (dereferenceable load (s32) from @sint)
+ ; 64BIT-NEXT: renamable $x30 = LBZ8 0, killed renamable $x4 :: (dereferenceable load (s8) from @uc1)
+ ; 64BIT-NEXT: renamable $x29 = LD 0, killed renamable $x5 :: (dereferenceable load (s64) from @ll1)
+ ; 64BIT-NEXT: renamable $x28 = LD 0, killed renamable $x6 :: (dereferenceable load (s64) from @ll2)
+ ; 64BIT-NEXT: renamable $x27 = LWZ8 0, killed renamable $x7 :: (dereferenceable load (s32) from @i1)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: $x10 = LI8 8
+ ; 64BIT-NEXT: STD killed renamable $x27, 168, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x30, 160, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x28, 152, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x31, 144, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x0, 136, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x12, 128, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x11, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x29, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_ints_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load i64, ptr @ll1, align 8
+ %1 = load i16, ptr @si1, align 2
+ %2 = load i8, ptr @ch, align 1
+ %3 = load i32, ptr @ui, align 4
+ %4 = load i32, ptr @sint, align 4
+ %5 = load i64, ptr @ll2, align 8
+ %6 = load i8, ptr @uc1, align 1
+ %7 = load i32, ptr @i1, align 4
+ %call = call i64 @test_ints_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i64 %0, i16 signext %1, i8 zeroext %2, i32 %3, i32 %4, i64 %5, i8 zeroext %6, i32 %7)
+ ret void
+}
+
+ at globali1 = global i8 0, align 1
+
+define void @test_i1_stack(i32 %a, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 zeroext %b) {
+ ; 32BIT-LABEL: name: test_i1_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-stack.0)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @globali1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STB killed renamable $r3, 0, killed renamable $r4 :: (store (s8) into @globali1)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: test_i1_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $r3 = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-stack.0)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @globali1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STB killed renamable $r3, 0, killed renamable $x4 :: (store (s8) into @globali1)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+ %frombool = zext i1 %b to i8
+ store i8 %frombool, ptr @globali1, align 1
+ ret void
+}
+
+define void @call_test_i1_stack() {
+ ; 32BIT-LABEL: name: call_test_i1_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 60, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: renamable $r11 = LI 1
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: $r10 = LI 8
+ ; 32BIT-NEXT: STW killed renamable $r11, 56, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_i1_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 60, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: call_test_i1_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x11 = LI8 1
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: $x10 = LI8 8
+ ; 64BIT-NEXT: STD killed renamable $x11, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_i1_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+ call void @test_i1_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i1 true)
+ ret void
+}
+
+define double @test_fpr_stack(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %s10, double %l11, double %d12, double %d13, float %f14, double %d15, float %f16) {
+ ; 32BIT-LABEL: name: test_fpr_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $f0 = LFD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1)
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f2 = LFS 0, %fixed-stack.2 :: (load (s32) from %fixed-stack.2, align 16)
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f5, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f6, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f7, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f8, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f9, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f10, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f11, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f12, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, renamable $f13, implicit $rm
+ ; 32BIT-NEXT: renamable $f3 = LFS 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0)
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f13, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
+ ;
+ ; 64BIT-LABEL: name: test_fpr_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $f0 = LFD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1, align 16)
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f2 = LFS 0, %fixed-stack.2 :: (load (s32) from %fixed-stack.2, align 8)
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f5, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f6, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f7, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f8, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f9, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f10, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f11, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f12, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, renamable $f13, implicit $rm
+ ; 64BIT-NEXT: renamable $f3 = LFS 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0, align 8)
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f13, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $f1
+ entry:
+ %add = fadd double %d1, %d2
+ %add1 = fadd double %add, %d3
+ %add2 = fadd double %add1, %d4
+ %add3 = fadd double %add2, %d5
+ %add4 = fadd double %add3, %d6
+ %add5 = fadd double %add4, %d7
+ %add6 = fadd double %add5, %d8
+ %add7 = fadd double %add6, %d9
+ %add8 = fadd double %add7, %s10
+ %add9 = fadd double %add8, %l11
+ %add10 = fadd double %add9, %d12
+ %add11 = fadd double %add10, %d13
+ %add12 = fadd double %add11, %d13
+ %conv = fpext float %f14 to double
+ %add13 = fadd double %add12, %conv
+ %add14 = fadd double %add13, %d15
+ %conv15 = fpext float %f16 to double
+ %add16 = fadd double %add14, %conv15
+ ret double %add16
+ }
+
+ at f14 = common global float 0.000000e+00, align 4
+ at d15 = common global double 0.000000e+00, align 8
+ at f16 = common global float 0.000000e+00, align 4
+
+define void @caller_fpr_stack() {
+ ; 32BIT-LABEL: name: caller_fpr_stack
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc @d15, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc @f14, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f0 = LFD 0, killed renamable $r3 :: (dereferenceable load (s64) from @d15)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc @f16, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $r4 :: (load (s32) from @f14)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, killed renamable $r5 :: (load (s32) from @f16)
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 144, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: renamable $r5 = LI 0
+ ; 32BIT-NEXT: renamable $r6 = LIS 16352
+ ; 32BIT-NEXT: STW killed renamable $r5, 60, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 13107
+ ; 32BIT-NEXT: STW killed renamable $r6, 56, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16355
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 13107
+ ; 32BIT-NEXT: STW killed renamable $r5, 68, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 26214
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 13107
+ ; 32BIT-NEXT: STW killed renamable $r6, 64, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16358
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 26214
+ ; 32BIT-NEXT: STW killed renamable $r5, 76, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 39321
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 26214
+ ; 32BIT-NEXT: STW killed renamable $r6, 72, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16361
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 39321
+ ; 32BIT-NEXT: STW killed renamable $r6, 80, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 52428
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 52429
+ ; 32BIT-NEXT: STW killed renamable $r6, 92, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16364
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 39322
+ ; 32BIT-NEXT: STW renamable $r5, 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 52428
+ ; 32BIT-NEXT: STW killed renamable $r6, 88, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16313
+ ; 32BIT-NEXT: STW killed renamable $r5, 100, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 49807
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 39321
+ ; 32BIT-NEXT: STW killed renamable $r6, 96, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16316
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 23593
+ ; 32BIT-NEXT: STW killed renamable $r5, 108, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 60293
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 10485
+ ; 32BIT-NEXT: STW killed renamable $r6, 104, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16318
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 7864
+ ; 32BIT-NEXT: STW killed renamable $r5, 116, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LIS 2621
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 47185
+ ; 32BIT-NEXT: STW killed renamable $r6, 112, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16320
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r5, 28836
+ ; 32BIT-NEXT: STW killed renamable $r5, 124, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r6, 41943
+ ; 32BIT-NEXT: STW killed renamable $r6, 120, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.2, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f3 = LFD 0, killed renamable $r6 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.3, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f4 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.4, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f6 = LFD 0, killed renamable $r6 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.5, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f7 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.6, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f8 = LFD 0, killed renamable $r6 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.7, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f9 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.8, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r6 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.9, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f11 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.10, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f12 = LFD 0, killed renamable $r6 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r6 = LWZtoc %const.11, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f13 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $f5 = LFS 0, killed renamable $r6 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: STW killed renamable $r4, 140, $r1 :: (store (s32))
+ ; 32BIT-NEXT: STFD killed renamable $f0, 132, $r1 :: (store (s64))
+ ; 32BIT-NEXT: $f10 = COPY renamable $f1
+ ; 32BIT-NEXT: STW killed renamable $r3, 128, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .test_fpr_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $r2, implicit-def $r1, implicit-def dead $f1
+ ; 32BIT-NEXT: ADJCALLSTACKUP 144, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: caller_fpr_stack
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: renamable $x3 = LDtoc @f14, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtoc @d15, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = LDtoc @f16, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $r3 = LWZ 0, killed renamable $x3 :: (load (s32) from @f14)
+ ; 64BIT-NEXT: renamable $x4 = LD 0, killed renamable $x4 :: (load (s64) from @d15)
+ ; 64BIT-NEXT: renamable $r5 = LWZ 0, killed renamable $x5 :: (load (s32) from @f16)
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x6 = LDtocCPT %const.0, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: STW killed renamable $r5, 168, $x1 :: (store (s32))
+ ; 64BIT-NEXT: renamable $x5 = LDtocCPT %const.1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x7 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x6 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x6 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f3 = LFD 0, killed renamable $x5 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x5 = LDtocCPT %const.4, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f4 = LFD 0, killed renamable $x7 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x7 = LDtocCPT %const.5, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f6 = LFD 0, killed renamable $x6 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x6 = LDtocCPT %const.6, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f7 = LFD 0, killed renamable $x5 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: STD killed renamable $x4, 160, $x1 :: (store (s64))
+ ; 64BIT-NEXT: renamable $x4 = LDtocCPT %const.7, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f8 = LFD 0, killed renamable $x7 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x5 = LIS8 16320
+ ; 64BIT-NEXT: renamable $x7 = LDtocCPT %const.8, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f9 = LFD 0, killed renamable $x6 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x6 = LIS8 16318
+ ; 64BIT-NEXT: renamable $x8 = LDtocCPT %const.9, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x4 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x4 = LIS8 16316
+ ; 64BIT-NEXT: renamable $f11 = LFD 0, killed renamable $x7 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x7 = LIS8 16313
+ ; 64BIT-NEXT: renamable $f12 = LFD 0, killed renamable $x8 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x8 = LDtocCPT %const.10, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = ORI8 killed renamable $x5, 41943
+ ; 64BIT-NEXT: renamable $x6 = ORI8 killed renamable $x6, 47185
+ ; 64BIT-NEXT: renamable $x4 = ORI8 killed renamable $x4, 10485
+ ; 64BIT-NEXT: renamable $x7 = ORI8 killed renamable $x7, 39321
+ ; 64BIT-NEXT: renamable $f13 = LFD 0, killed renamable $x8 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x8 = LDtocCPT %const.11, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = RLDIC killed renamable $x5, 32, 2
+ ; 64BIT-NEXT: renamable $x6 = RLDIC killed renamable $x6, 32, 2
+ ; 64BIT-NEXT: renamable $x4 = RLDIC killed renamable $x4, 32, 2
+ ; 64BIT-NEXT: renamable $x7 = RLDIC killed renamable $x7, 32, 2
+ ; 64BIT-NEXT: renamable $x5 = ORIS8 killed renamable $x5, 2621
+ ; 64BIT-NEXT: renamable $x6 = ORIS8 killed renamable $x6, 60293
+ ; 64BIT-NEXT: renamable $x4 = ORIS8 killed renamable $x4, 49807
+ ; 64BIT-NEXT: renamable $x7 = ORIS8 killed renamable $x7, 39321
+ ; 64BIT-NEXT: renamable $x5 = ORI8 killed renamable $x5, 28836
+ ; 64BIT-NEXT: renamable $x6 = ORI8 killed renamable $x6, 7864
+ ; 64BIT-NEXT: renamable $x4 = ORI8 killed renamable $x4, 23593
+ ; 64BIT-NEXT: renamable $f5 = LFS 0, killed renamable $x8 :: (load (s32) from constant-pool)
+ ; 64BIT-NEXT: renamable $x8 = LIS8 4091
+ ; 64BIT-NEXT: renamable $x8 = ORI8 killed renamable $x8, 13107
+ ; 64BIT-NEXT: renamable $x7 = ORI8 killed renamable $x7, 39322
+ ; 64BIT-NEXT: renamable $x8 = RLDIC killed renamable $x8, 34, 2
+ ; 64BIT-NEXT: renamable $x8 = ORIS8 killed renamable $x8, 52428
+ ; 64BIT-NEXT: renamable $x8 = ORI8 killed renamable $x8, 52429
+ ; 64BIT-NEXT: $f10 = COPY renamable $f1
+ ; 64BIT-NEXT: STW killed renamable $r3, 152, $x1 :: (store (s32))
+ ; 64BIT-NEXT: STD killed renamable $x5, 144, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x6, 136, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x4, 128, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x7, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x8, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .test_fpr_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $f1
+ ; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+entry:
+ %0 = load float, ptr @f14, align 4
+ %1 = load double, ptr @d15, align 8
+ %2 = load float, ptr @f16, align 4
+ %call = call double @test_fpr_stack(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e-01, double 1.100000e-01, double 1.200000e-01, double 1.300000e-01, float %0, double %1, float %2)
+ ret void
+}
+
+define i32 @mix_callee(double %d1, double %d2, double %d3, double %d4, i8 zeroext %c1, i16 signext %s1, i64 %ll1, i32 %i1, i32 %i2, i32 %i3) {
+ ; 32BIT-LABEL: name: mix_callee
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $f3, $f4
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r3 = LWZ 0, %fixed-stack.3 :: (load (s32) from %fixed-stack.3)
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %fixed-stack.5 :: (load (s32) from %fixed-stack.5)
+ ; 32BIT-NEXT: renamable $r5 = LWZ 0, %fixed-stack.6 :: (load (s32) from %fixed-stack.6, align 8)
+ ; 32BIT-NEXT: renamable $r6 = LWZ 0, %fixed-stack.2 :: (load (s32) from %fixed-stack.2, align 8)
+ ; 32BIT-NEXT: renamable $r7 = LIS 17200
+ ; 32BIT-NEXT: STW killed renamable $r7, 0, %stack.1 :: (store (s32) into %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $r7 = LWZ 0, %fixed-stack.1 :: (load (s32) from %fixed-stack.1)
+ ; 32BIT-NEXT: renamable $r4 = nsw ADD4 killed renamable $r5, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r4, killed renamable $r3
+ ; 32BIT-NEXT: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0, align 16)
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r7
+ ; 32BIT-NEXT: renamable $f0 = LFS 0, killed renamable $r5 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: renamable $r3 = XORIS killed renamable $r3, 32768
+ ; 32BIT-NEXT: STW killed renamable $r3, 4, %stack.1 :: (store (s32) into %stack.1 + 4)
+ ; 32BIT-NEXT: renamable $f5 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FSUB killed renamable $f5, killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: mix_callee
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $x7, $x8, $x9, $x10
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $x3 = LWZ8 0, %fixed-stack.1 :: (load (s32) from %fixed-stack.1)
+ ; 64BIT-NEXT: renamable $r4 = nsw ADD4 renamable $r7, renamable $r8, implicit killed $x8, implicit killed $x7, implicit-def $x4
+ ; 64BIT-NEXT: renamable $x5 = LWZ8 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0)
+ ; 64BIT-NEXT: renamable $x4 = ADD8 killed renamable $x4, killed renamable $x9
+ ; 64BIT-NEXT: renamable $x4 = ADD8 killed renamable $x4, killed renamable $x10
+ ; 64BIT-NEXT: renamable $x3 = ADD8 killed renamable $x4, killed renamable $x3
+ ; 64BIT-NEXT: renamable $x3 = ADD8 killed renamable $x3, killed renamable $x5
+ ; 64BIT-NEXT: renamable $x3 = EXTSW killed renamable $x3
+ ; 64BIT-NEXT: STD killed renamable $x3, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f0 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FCFID killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x3 = LWZ8 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+ entry:
+ %add = fadd double %d1, %d2
+ %add1 = fadd double %add, %d3
+ %add2 = fadd double %add1, %d4
+ %conv = zext i8 %c1 to i32
+ %conv3 = sext i16 %s1 to i32
+ %add4 = add nsw i32 %conv, %conv3
+ %conv5 = sext i32 %add4 to i64
+ %add6 = add nsw i64 %conv5, %ll1
+ %conv7 = sext i32 %i1 to i64
+ %add8 = add nsw i64 %add6, %conv7
+ %conv9 = sext i32 %i2 to i64
+ %add10 = add nsw i64 %add8, %conv9
+ %conv11 = sext i32 %i3 to i64
+ %add12 = add nsw i64 %add10, %conv11
+ %conv13 = trunc i64 %add12 to i32
+ %conv14 = sitofp i32 %conv13 to double
+ %add15 = fadd double %conv14, %add2
+ %conv16 = fptosi double %add15 to i32
+ ret i32 %conv16
+ }
+
+define void @caller_mix() {
+ ; 32BIT-LABEL: name: caller_mix
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 84, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: renamable $r3 = LI 60
+ ; 32BIT-NEXT: STW killed renamable $r3, 80, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LI 50
+ ; 32BIT-NEXT: STW killed renamable $r3, 76, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LI 40
+ ; 32BIT-NEXT: STW killed renamable $r3, 72, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LI 0
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STW killed renamable $r3, 64, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LI 2
+ ; 32BIT-NEXT: STW killed renamable $r3, 60, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.2, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r3 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.3, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f3 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $f4 = LFD 0, killed renamable $r3 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = LI 1
+ ; 32BIT-NEXT: STW killed renamable $r3, 56, $r1 :: (store (s32))
+ ; 32BIT-NEXT: renamable $r3 = LIS 457
+ ; 32BIT-NEXT: renamable $r3 = ORI killed renamable $r3, 50048
+ ; 32BIT-NEXT: STW killed renamable $r3, 68, $r1 :: (store (s32))
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .mix_callee>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 84, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: caller_mix
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x3 = LDtocCPT %const.0, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x4 = LDtocCPT %const.1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x5 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x3 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x3 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x4 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x4 = LI8 60
+ ; 64BIT-NEXT: renamable $f3 = LFD 0, killed renamable $x5 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x5 = LI8 50
+ ; 64BIT-NEXT: renamable $f4 = LFD 0, killed renamable $x3 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x3 = LIS8 457
+ ; 64BIT-NEXT: renamable $x9 = ORI8 killed renamable $x3, 50048
+ ; 64BIT-NEXT: $x7 = LI8 1
+ ; 64BIT-NEXT: $x8 = LI8 2
+ ; 64BIT-NEXT: $x10 = LI8 40
+ ; 64BIT-NEXT: STD killed renamable $x4, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x5, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .mix_callee>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit killed $x7, implicit killed $x8, implicit $x9, implicit killed $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+%call = call i32 @mix_callee(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, i8 zeroext 1, i16 signext 2, i64 30000000, i32 40, i32 50, i32 60)
+ ret void
+ }
+
+ define i32 @mix_floats(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13, double %d14) {
+ ; 32BIT-LABEL: name: mix_floats
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
+ ; 32BIT-NEXT: {{ $}}
+ ; 32BIT-NEXT: renamable $r11 = LIS 17200
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
+ ; 32BIT-NEXT: STW killed renamable $r11, 0, %stack.1 :: (store (s32) into %stack.1, align 8)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r7
+ ; 32BIT-NEXT: renamable $f0 = LFS 0, killed renamable $r4 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r8
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r9
+ ; 32BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r10
+ ; 32BIT-NEXT: renamable $r3 = XORIS killed renamable $r3, 32768
+ ; 32BIT-NEXT: STW killed renamable $r3, 4, %stack.1 :: (store (s32) into %stack.1 + 4)
+ ; 32BIT-NEXT: renamable $f31 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 32BIT-NEXT: renamable $f30 = LFD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0, align 16)
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FSUB killed renamable $f31, killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f2, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f30, implicit $rm
+ ; 32BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 32BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 32BIT-NEXT: renamable $r3 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+ ;
+ ; 64BIT-LABEL: name: mix_floats
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
+ ; 64BIT-NEXT: {{ $}}
+ ; 64BIT-NEXT: renamable $f0 = LFD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0)
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 renamable $r3, renamable $r4, implicit killed $x4, implicit killed $x3
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r5, implicit killed $x5
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r6, implicit killed $x6
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r7, implicit killed $x7
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r8, implicit killed $x8
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r9, implicit killed $x9
+ ; 64BIT-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r10, implicit killed $x10
+ ; 64BIT-NEXT: renamable $x3 = EXTSW_32_64 killed renamable $r3
+ ; 64BIT-NEXT: STD killed renamable $x3, 0, %stack.1 :: (store (s64) into %stack.1)
+ ; 64BIT-NEXT: renamable $f31 = LFD 0, %stack.1 :: (load (s64) from %stack.1)
+ ; 64BIT-NEXT: renamable $f31 = nofpexcept FCFID killed renamable $f31, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f31, killed renamable $f1, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f3, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f4, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f5, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f6, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f7, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f8, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f9, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f10, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f11, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f12, implicit $rm
+ ; 64BIT-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f1, killed renamable $f13, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: renamable $f0 = nofpexcept FCTIWZ killed renamable $f0, implicit $rm
+ ; 64BIT-NEXT: STFD killed renamable $f0, 0, %stack.0 :: (store (s64) into %stack.0)
+ ; 64BIT-NEXT: renamable $x3 = LWZ8 4, %stack.0 :: (load (s32) from %stack.0 + 4, basealign 8)
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+ entry:
+ %add = add nsw i32 %i1, %i2
+ %add1 = add nsw i32 %add, %i3
+ %add2 = add nsw i32 %add1, %i4
+ %add3 = add nsw i32 %add2, %i5
+ %add4 = add nsw i32 %add3, %i6
+ %add5 = add nsw i32 %add4, %i7
+ %add6 = add nsw i32 %add5, %i8
+ %conv = sitofp i32 %add6 to double
+ %add7 = fadd double %conv, %d1
+ %add8 = fadd double %add7, %d2
+ %add9 = fadd double %add8, %d3
+ %add10 = fadd double %add9, %d4
+ %add11 = fadd double %add10, %d5
+ %add12 = fadd double %add11, %d6
+ %add13 = fadd double %add12, %d7
+ %add14 = fadd double %add13, %d8
+ %add15 = fadd double %add14, %d9
+ %add16 = fadd double %add15, %d10
+ %add17 = fadd double %add16, %d11
+ %add18 = fadd double %add17, %d12
+ %add19 = fadd double %add18, %d13
+ %add20 = fadd double %add19, %d14
+ %conv21 = fptosi double %add20 to i32
+ ret i32 %conv21
+ }
+
+ define void @mix_floats_caller() {
+ ; 32BIT-LABEL: name: mix_floats_caller
+ ; 32BIT: bb.0.entry:
+ ; 32BIT-NEXT: ADJCALLSTACKDOWN 168, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: renamable $r3 = LI 0
+ ; 32BIT-NEXT: renamable $r4 = LIS 16352
+ ; 32BIT-NEXT: renamable $r5 = LIS 16368
+ ; 32BIT-NEXT: renamable $r6 = LIS 39321
+ ; 32BIT-NEXT: renamable $r7 = LIS 16313
+ ; 32BIT-NEXT: renamable $r8 = LIS 16329
+ ; 32BIT-NEXT: renamable $r9 = LIS 13107
+ ; 32BIT-NEXT: renamable $r10 = LIS 16339
+ ; 32BIT-NEXT: STW renamable $r3, 92, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r11 = LIS 16345
+ ; 32BIT-NEXT: STW killed renamable $r4, 88, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16355
+ ; 32BIT-NEXT: STW killed renamable $r3, 132, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r3 = LIS 26214
+ ; 32BIT-NEXT: STW killed renamable $r5, 128, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r5 = ORI killed renamable $r6, 39322
+ ; 32BIT-NEXT: STW renamable $r5, 60, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r7, 39321
+ ; 32BIT-NEXT: STW killed renamable $r6, 56, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = LIS 16358
+ ; 32BIT-NEXT: STW renamable $r5, 68, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r7 = ORI killed renamable $r8, 39321
+ ; 32BIT-NEXT: STW killed renamable $r7, 64, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r7 = ORI killed renamable $r9, 13107
+ ; 32BIT-NEXT: STW renamable $r7, 76, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r8 = ORI killed renamable $r10, 13107
+ ; 32BIT-NEXT: STW killed renamable $r8, 72, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r8 = LIS 16361
+ ; 32BIT-NEXT: STW renamable $r5, 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r9 = ORI killed renamable $r11, 39321
+ ; 32BIT-NEXT: STW killed renamable $r9, 80, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r9 = LIS 52428
+ ; 32BIT-NEXT: STW renamable $r7, 100, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r4, 13107
+ ; 32BIT-NEXT: STW killed renamable $r4, 96, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r3 = ORI killed renamable $r3, 26214
+ ; 32BIT-NEXT: STW renamable $r3, 108, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r6, 26214
+ ; 32BIT-NEXT: STW killed renamable $r4, 104, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16364
+ ; 32BIT-NEXT: STW renamable $r5, 116, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r8, 39321
+ ; 32BIT-NEXT: STW killed renamable $r6, 112, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r6 = ORI killed renamable $r9, 52429
+ ; 32BIT-NEXT: STW renamable $r6, 124, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r4, 52428
+ ; 32BIT-NEXT: STW killed renamable $r4, 120, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16369
+ ; 32BIT-NEXT: STW killed renamable $r5, 140, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r4, 39321
+ ; 32BIT-NEXT: STW killed renamable $r4, 136, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16371
+ ; 32BIT-NEXT: STW killed renamable $r7, 148, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r4, 13107
+ ; 32BIT-NEXT: STW killed renamable $r4, 144, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16372
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.0, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STW killed renamable $r6, 156, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r4 = ORI killed renamable $r4, 52428
+ ; 32BIT-NEXT: STW killed renamable $r4, 152, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.1, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: STW killed renamable $r3, 164, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.2, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.3, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.4, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f3 = LFD 0, killed renamable $r3 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.5, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f4 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.6, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f6 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.7, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f7 = LFD 0, killed renamable $r3 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.8, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f8 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.9, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f9 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r4 = LWZtoc %const.10, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f11 = LFD 0, killed renamable $r3 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r3 = LWZtoc %const.11, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f12 = LFD 0, killed renamable $r5 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r5 = LWZtoc %const.12, $r2 :: (load (s32) from got)
+ ; 32BIT-NEXT: renamable $f13 = LFD 0, killed renamable $r4 :: (load (s64) from constant-pool)
+ ; 32BIT-NEXT: renamable $r4 = LIS 16374
+ ; 32BIT-NEXT: renamable $f5 = LFS 0, killed renamable $r3 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: renamable $r11 = ORI killed renamable $r4, 26214
+ ; 32BIT-NEXT: renamable $f10 = LFS 0, killed renamable $r5 :: (load (s32) from constant-pool)
+ ; 32BIT-NEXT: $r3 = LI 1
+ ; 32BIT-NEXT: $r4 = LI 2
+ ; 32BIT-NEXT: $r5 = LI 3
+ ; 32BIT-NEXT: $r6 = LI 4
+ ; 32BIT-NEXT: $r7 = LI 5
+ ; 32BIT-NEXT: $r8 = LI 6
+ ; 32BIT-NEXT: $r9 = LI 7
+ ; 32BIT-NEXT: $r10 = LI 8
+ ; 32BIT-NEXT: STW killed renamable $r11, 160, $r1 :: (store (s32), align 8)
+ ; 32BIT-NEXT: BL_NOP <mcsymbol .mix_floats>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $r2, implicit-def $r1, implicit-def dead $r3
+ ; 32BIT-NEXT: ADJCALLSTACKUP 168, 0, implicit-def dead $r1, implicit $r1
+ ; 32BIT-NEXT: BLR implicit $lr, implicit $rm
+ ;
+ ; 64BIT-LABEL: name: mix_floats_caller
+ ; 64BIT: bb.0.entry:
+ ; 64BIT-NEXT: ADJCALLSTACKDOWN 224, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: renamable $x3 = LI8 1023
+ ; 64BIT-NEXT: renamable $x4 = LI8 511
+ ; 64BIT-NEXT: renamable $x5 = LIS8 16374
+ ; 64BIT-NEXT: renamable $x6 = LIS8 16371
+ ; 64BIT-NEXT: renamable $x7 = LIS8 16358
+ ; 64BIT-NEXT: renamable $x8 = LIS8 16355
+ ; 64BIT-NEXT: renamable $x9 = LIS8 16339
+ ; 64BIT-NEXT: renamable $x10 = LIS8 4093
+ ; 64BIT-NEXT: renamable $x11 = LDtocCPT %const.0, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x29 = LIS8 16369
+ ; 64BIT-NEXT: renamable $x28 = LIS8 4091
+ ; 64BIT-NEXT: renamable $x12 = LDtocCPT %const.1, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x27 = LIS8 16361
+ ; 64BIT-NEXT: renamable $x31 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x11 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x26 = LIS8 16345
+ ; 64BIT-NEXT: renamable $x11 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x12 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x25 = LIS8 16329
+ ; 64BIT-NEXT: renamable $f3 = LFD 0, killed renamable $x31 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x24 = LIS8 16313
+ ; 64BIT-NEXT: renamable $x23 = LDtocCPT %const.4, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x22 = LDtocCPT %const.5, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x21 = LDtocCPT %const.6, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x20 = LDtocCPT %const.7, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x19 = LDtocCPT %const.8, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x18 = LDtocCPT %const.9, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x17 = LDtocCPT %const.10, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $f4 = LFD 0, killed renamable $x11 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x16 = LDtocCPT %const.11, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x11 = ORI8 killed renamable $x5, 26214
+ ; 64BIT-NEXT: renamable $x12 = ORI8 killed renamable $x6, 13107
+ ; 64BIT-NEXT: renamable $x0 = ORI8 killed renamable $x7, 26214
+ ; 64BIT-NEXT: renamable $x31 = ORI8 killed renamable $x8, 13107
+ ; 64BIT-NEXT: renamable $x30 = ORI8 killed renamable $x9, 13107
+ ; 64BIT-NEXT: renamable $x5 = ORI8 killed renamable $x10, 13107
+ ; 64BIT-NEXT: renamable $x6 = ORI8 killed renamable $x29, 39321
+ ; 64BIT-NEXT: renamable $x7 = ORI8 killed renamable $x28, 13107
+ ; 64BIT-NEXT: renamable $x8 = ORI8 killed renamable $x27, 39321
+ ; 64BIT-NEXT: renamable $x9 = ORI8 killed renamable $x26, 39321
+ ; 64BIT-NEXT: renamable $x10 = ORI8 killed renamable $x25, 39321
+ ; 64BIT-NEXT: renamable $x27 = ORI8 killed renamable $x24, 39321
+ ; 64BIT-NEXT: renamable $f6 = LFD 0, killed renamable $x23 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x26 = LDtocCPT %const.12, $x2 :: (load (s64) from got)
+ ; 64BIT-NEXT: renamable $x29 = RLDIC killed renamable $x3, 52, 2
+ ; 64BIT-NEXT: renamable $x28 = RLDIC killed renamable $x4, 53, 2
+ ; 64BIT-NEXT: renamable $x11 = RLDIMI killed renamable $x11, renamable $x11, 32, 0
+ ; 64BIT-NEXT: renamable $x12 = RLDIMI killed renamable $x12, renamable $x12, 32, 0
+ ; 64BIT-NEXT: renamable $x0 = RLDIMI killed renamable $x0, renamable $x0, 32, 0
+ ; 64BIT-NEXT: renamable $x31 = RLDIMI killed renamable $x31, renamable $x31, 32, 0
+ ; 64BIT-NEXT: renamable $x30 = RLDIMI killed renamable $x30, renamable $x30, 32, 0
+ ; 64BIT-NEXT: renamable $x3 = RLDIC killed renamable $x5, 34, 2
+ ; 64BIT-NEXT: renamable $x4 = RLDIC killed renamable $x6, 32, 2
+ ; 64BIT-NEXT: renamable $x5 = RLDIC killed renamable $x7, 34, 2
+ ; 64BIT-NEXT: renamable $x6 = RLDIC killed renamable $x8, 32, 2
+ ; 64BIT-NEXT: renamable $x7 = RLDIC killed renamable $x9, 32, 2
+ ; 64BIT-NEXT: renamable $x8 = RLDIC killed renamable $x10, 32, 2
+ ; 64BIT-NEXT: renamable $x9 = RLDIC killed renamable $x27, 32, 2
+ ; 64BIT-NEXT: renamable $x11 = RLWIMI8 killed renamable $x11, renamable $x11, 16, 0, 15
+ ; 64BIT-NEXT: renamable $x12 = RLWIMI8 killed renamable $x12, renamable $x12, 16, 0, 15
+ ; 64BIT-NEXT: renamable $x0 = RLWIMI8 killed renamable $x0, renamable $x0, 16, 0, 15
+ ; 64BIT-NEXT: renamable $x31 = RLWIMI8 killed renamable $x31, renamable $x31, 16, 0, 15
+ ; 64BIT-NEXT: renamable $x30 = RLWIMI8 killed renamable $x30, renamable $x30, 16, 0, 15
+ ; 64BIT-NEXT: renamable $x3 = ORIS8 killed renamable $x3, 52428
+ ; 64BIT-NEXT: renamable $x4 = ORIS8 killed renamable $x4, 39321
+ ; 64BIT-NEXT: renamable $x5 = ORIS8 killed renamable $x5, 52428
+ ; 64BIT-NEXT: renamable $x6 = ORIS8 killed renamable $x6, 39321
+ ; 64BIT-NEXT: renamable $x7 = ORIS8 killed renamable $x7, 39321
+ ; 64BIT-NEXT: renamable $x8 = ORIS8 killed renamable $x8, 39321
+ ; 64BIT-NEXT: renamable $x9 = ORIS8 killed renamable $x9, 39321
+ ; 64BIT-NEXT: renamable $f7 = LFD 0, killed renamable $x22 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x27 = ORI8 killed renamable $x3, 52429
+ ; 64BIT-NEXT: renamable $f8 = LFD 0, killed renamable $x21 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x25 = ORI8 killed renamable $x4, 39322
+ ; 64BIT-NEXT: renamable $f9 = LFD 0, killed renamable $x20 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x24 = ORI8 killed renamable $x5, 52429
+ ; 64BIT-NEXT: renamable $f11 = LFD 0, killed renamable $x19 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x23 = ORI8 killed renamable $x6, 39322
+ ; 64BIT-NEXT: renamable $f12 = LFD 0, killed renamable $x18 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x22 = ORI8 killed renamable $x7, 39322
+ ; 64BIT-NEXT: renamable $f13 = LFD 0, killed renamable $x17 :: (load (s64) from constant-pool)
+ ; 64BIT-NEXT: renamable $x21 = ORI8 killed renamable $x8, 39322
+ ; 64BIT-NEXT: renamable $f5 = LFS 0, killed renamable $x16 :: (load (s32) from constant-pool)
+ ; 64BIT-NEXT: renamable $x20 = ORI8 killed renamable $x9, 39322
+ ; 64BIT-NEXT: renamable $f10 = LFS 0, killed renamable $x26 :: (load (s32) from constant-pool)
+ ; 64BIT-NEXT: $x3 = LI8 1
+ ; 64BIT-NEXT: $x4 = LI8 2
+ ; 64BIT-NEXT: $x5 = LI8 3
+ ; 64BIT-NEXT: $x6 = LI8 4
+ ; 64BIT-NEXT: $x7 = LI8 5
+ ; 64BIT-NEXT: $x8 = LI8 6
+ ; 64BIT-NEXT: $x9 = LI8 7
+ ; 64BIT-NEXT: $x10 = LI8 8
+ ; 64BIT-NEXT: STD killed renamable $x29, 184, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x28, 144, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x11, 216, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x12, 200, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x0, 160, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x31, 152, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x30, 128, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x27, 208, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x25, 192, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x24, 176, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x23, 168, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x22, 136, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x21, 120, $x1 :: (store (s64))
+ ; 64BIT-NEXT: STD killed renamable $x20, 112, $x1 :: (store (s64))
+ ; 64BIT-NEXT: BL8_NOP <mcsymbol .mix_floats>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $x3
+ ; 64BIT-NEXT: ADJCALLSTACKUP 224, 0, implicit-def dead $r1, implicit $r1
+ ; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
+ entry:
+ %call = call i32 @mix_floats(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e+00, double 1.100000e+00, double 1.200000e+00, double 1.300000e+00, double 1.400000e+00)
+ ret void
+ }
+
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll b/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
index 02fe9943f39c41f..78d60f06c06786b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
@@ -1,42 +1,57 @@
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
-; RUN: FileCheck --check-prefixes=CHECK,32BIT %s
-
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECKASM,ASM32PWR4 %s
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
-; RUN: FileCheck --check-prefixes=CHECK,64BIT %s
-
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECKASM,ASM64PWR4 %s
define void @call_test_chars() {
+; ASM32PWR4-LABEL: call_test_chars:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 97
+; ASM32PWR4-NEXT: li 4, 97
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 5, 97
+; ASM32PWR4-NEXT: li 6, 97
+; ASM32PWR4-NEXT: bl .test_chars
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_chars:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: li 3, 97
+; ASM64PWR4-NEXT: li 4, 97
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: li 5, 97
+; ASM64PWR4-NEXT: li 6, 97
+; ASM64PWR4-NEXT: bl .test_chars
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call i8 @test_chars(i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97)
ret void
}
-; CHECK-LABEL: name: call_test_chars
-
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: $r3 = LI 97
-; 32BIT: $r4 = LI 97
-; 32BIT: $r5 = LI 97
-; 32BIT: $r6 = LI 97
-; 32BIT: BL_NOP <mcsymbol .test_chars>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: $x3 = LI8 97
-; 64BIT: $x4 = LI8 97
-; 64BIT: $x5 = LI8 97
-; 64BIT: $x6 = LI8 97
-; 64BIT: BL8_NOP <mcsymbol .test_chars>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define signext i8 @test_chars(i8 signext %c1, i8 signext %c2, i8 signext %c3, i8 signext %c4) {
+; CHECKASM-LABEL: test_chars:
+; CHECKASM: # %bb.0: # %entry
+; CHECKASM-NEXT: add 3, 3, 4
+; CHECKASM-NEXT: add 3, 3, 5
+; CHECKASM-NEXT: add 3, 3, 6
+; CHECKASM-NEXT: extsb 3, 3
+; CHECKASM-NEXT: blr
entry:
%conv = sext i8 %c1 to i32
%conv1 = sext i8 %c2 to i32
@@ -49,51 +64,51 @@ entry:
ret i8 %conv6
}
-; CHECK-LABEL: name: test_chars
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' }
-; 32BIT: body:
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT: body:
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
-
define void @call_test_chars_mix() {
+; ASM32PWR4-LABEL: call_test_chars_mix:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 97
+; ASM32PWR4-NEXT: li 4, 225
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 5, 97
+; ASM32PWR4-NEXT: li 6, -31
+; ASM32PWR4-NEXT: bl .test_chars_mix
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_chars_mix:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: li 3, 97
+; ASM64PWR4-NEXT: li 4, 225
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: li 5, 97
+; ASM64PWR4-NEXT: li 6, -31
+; ASM64PWR4-NEXT: bl .test_chars_mix
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call i8 @test_chars_mix(i8 signext 97, i8 zeroext -31, i8 zeroext 97, i8 signext -31)
ret void
}
-; CHECK-LABEL: name: call_test_chars_mix
-
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: $r3 = LI 97
-; 32BIT: $r4 = LI 225
-; 32BIT: $r5 = LI 97
-; 32BIT: $r6 = LI -31
-; 32BIT: BL_NOP <mcsymbol .test_chars_mix>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit $r2, implicit-def $r1
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: $x3 = LI8 97
-; 64BIT: $x4 = LI8 225
-; 64BIT: $x5 = LI8 97
-; 64BIT: $x6 = LI8 -31
-; 64BIT: BL8_NOP <mcsymbol .test_chars_mix>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define signext i8 @test_chars_mix(i8 signext %c1, i8 zeroext %c2, i8 zeroext %c3, i8 signext %c4) {
+; CHECKASM-LABEL: test_chars_mix:
+; CHECKASM: # %bb.0: # %entry
+; CHECKASM-NEXT: add 3, 3, 4
+; CHECKASM-NEXT: add 3, 3, 5
+; CHECKASM-NEXT: add 3, 3, 6
+; CHECKASM-NEXT: extsb 3, 3
+; CHECKASM-NEXT: blr
entry:
%conv = sext i8 %c1 to i32
%conv1 = zext i8 %c2 to i32
@@ -106,92 +121,88 @@ entry:
ret i8 %conv6
}
-; CHECK-LABEL: name: test_chars_mix
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' }
-; 32BIT: body:
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT: body:
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
-
@global_i1 = global i8 0, align 1
define void @test_i1(i1 %b) {
+; ASM32PWR4-LABEL: test_i1:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: lwz 4, L..C0(2) # @global_i1
+; ASM32PWR4-NEXT: clrlwi 3, 3, 31
+; ASM32PWR4-NEXT: stb 3, 0(4)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_i1:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: ld 4, L..C0(2) # @global_i1
+; ASM64PWR4-NEXT: clrlwi 3, 3, 31
+; ASM64PWR4-NEXT: stb 3, 0(4)
+; ASM64PWR4-NEXT: blr
entry:
%frombool = zext i1 %b to i8
store i8 %frombool, ptr @global_i1, align 1
ret void
}
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3
-; 32BIT: renamable $r3 = RLWINM killed renamable $r3, 0, 31, 31
-; 32BIT-NEXT: STB killed renamable $r3, 0, killed renamable $r4 :: (store (s8) into @global_i1)
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3
-; 64BIT: renamable $r[[REG1:[0-9]+]] = RLWINM renamable $r[[REG1]], 0, 31, 31, implicit killed $x3
-; 64BIT-NEXT: STB killed renamable $r[[REG1]], 0, killed renamable $x4 :: (store (s8) into @global_i1)
-
define void @call_test_i1() {
+; ASM32PWR4-LABEL: call_test_i1:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: bl .test_i1
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_i1:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: bl .test_i1
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call void @test_i1(i1 1)
ret void
}
-; CHECK-LABEL: name: call_test_i1
-
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: $r3 = LI 1
-; 32BIT: BL_NOP <mcsymbol .test_i1>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit $r2, implicit-def $r1
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: $x3 = LI8 1
-; 64BIT: BL8_NOP <mcsymbol .test_i1>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit $x2, implicit-def $r1
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
define void @test_i1zext(i1 zeroext %b) {
+; ASM32PWR4-LABEL: test_i1zext:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: lwz 4, L..C0(2) # @global_i1
+; ASM32PWR4-NEXT: stb 3, 0(4)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_i1zext:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: ld 4, L..C0(2) # @global_i1
+; ASM64PWR4-NEXT: stb 3, 0(4)
+; ASM64PWR4-NEXT: blr
entry:
%frombool = zext i1 %b to i8
store i8 %frombool, ptr @global_i1, align 1
ret void
}
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3
-; CHECK-NOT: RLWINM
-; 32BIT: STB killed renamable $r3, 0, killed renamable $r4 :: (store (s8) into @global_i1)
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3
-; CHECK-NOT: RLWINM
-; 64BIT: STB8 killed renamable $x3, 0, killed renamable $x4 :: (store (s8) into @global_i1)
-
define i32 @test_ints(i32 signext %a, i32 zeroext %b, i32 zeroext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h) {
+; CHECKASM-LABEL: test_ints:
+; CHECKASM: # %bb.0: # %entry
+; CHECKASM-NEXT: add 3, 3, 4
+; CHECKASM-NEXT: add 3, 3, 5
+; CHECKASM-NEXT: add 3, 3, 6
+; CHECKASM-NEXT: add 3, 3, 7
+; CHECKASM-NEXT: add 3, 3, 8
+; CHECKASM-NEXT: add 3, 3, 9
+; CHECKASM-NEXT: add 3, 3, 10
+; CHECKASM-NEXT: blr
entry:
%add = add i32 %a, %b
%add1 = add i32 %add, %c
@@ -203,84 +214,109 @@ entry:
ret i32 %add6
}
-; CHECK-LABEL: name: test_ints
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r9', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r10', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x7', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x8', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x9', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x10', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
-
define void @call_test_ints() {
+; ASM32PWR4-LABEL: call_test_ints:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: li 4, 1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: lis 5, -32768
+; ASM32PWR4-NEXT: lis 6, -32768
+; ASM32PWR4-NEXT: li 7, 1
+; ASM32PWR4-NEXT: li 8, 1
+; ASM32PWR4-NEXT: li 9, 1
+; ASM32PWR4-NEXT: li 10, 1
+; ASM32PWR4-NEXT: bl .test_ints
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_ints:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: li 4, 1
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: rldic 5, 3, 31, 32
+; ASM64PWR4-NEXT: lis 6, -32768
+; ASM64PWR4-NEXT: li 7, 1
+; ASM64PWR4-NEXT: li 8, 1
+; ASM64PWR4-NEXT: li 9, 1
+; ASM64PWR4-NEXT: li 10, 1
+; ASM64PWR4-NEXT: bl .test_ints
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call i32 @test_ints(i32 signext 1, i32 zeroext 1, i32 zeroext 2147483648, i32 signext -2147483648, i32 signext 1, i32 signext 1, i32 signext 1, i32 signext 1)
ret void
}
-; CHECK-LABEL: name: call_test_ints
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: renamable $x3 = LI8 1
-; 64BIT: renamable $x5 = RLDIC killed renamable $x3, 31, 32
-; 64BIT: $x3 = LI8 1
-; 64BIT: $x4 = LI8 1
-; 64BIT: $x6 = LIS8 32768
-; 64BIT: $x7 = LI8 1
-; 64BIT: $x8 = LI8 1
-; 64BIT: $x9 = LI8 1
-; 64BIT: $x10 = LI8 1
-; 64BIT: BL8_NOP <mcsymbol .test_ints>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define void @call_test_i64() {
+; ASM32PWR4-LABEL: call_test_i64:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 0
+; ASM32PWR4-NEXT: li 4, 1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 5, 0
+; ASM32PWR4-NEXT: li 6, 2
+; ASM32PWR4-NEXT: li 7, 0
+; ASM32PWR4-NEXT: li 8, 3
+; ASM32PWR4-NEXT: li 9, 0
+; ASM32PWR4-NEXT: li 10, 4
+; ASM32PWR4-NEXT: bl .test_i64
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_i64:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: bl .test_i64
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call i64 @test_i64(i64 1, i64 2, i64 3, i64 4)
ret void
}
-; CHECK-LABEL: name: call_test_i64
-
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: $r3 = LI 0
-; 32BIT: $r4 = LI 1
-; 32BIT: $r5 = LI 0
-; 32BIT: $r6 = LI 2
-; 32BIT: $r7 = LI 0
-; 32BIT: $r8 = LI 3
-; 32BIT: $r9 = LI 0
-; 32BIT: $r10 = LI 4
-; 32BIT: BL_NOP <mcsymbol .test_i64>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit killed $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $r2, implicit-def $r1
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: $x3 = LI8 1
-; 64BIT: $x4 = LI8 2
-; 64BIT: $x5 = LI8 3
-; 64BIT: $x6 = LI8 4
-; 64BIT: BL8_NOP <mcsymbol .test_i64>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit killed $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit $x2, implicit-def $r1
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define i64 @test_i64(i64 %a, i64 %b, i64 %c, i64 %d) {
+; ASM32PWR4-LABEL: test_i64:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: addc 4, 4, 6
+; ASM32PWR4-NEXT: adde 3, 3, 5
+; ASM32PWR4-NEXT: addc 4, 4, 8
+; ASM32PWR4-NEXT: adde 3, 3, 7
+; ASM32PWR4-NEXT: addc 4, 4, 10
+; ASM32PWR4-NEXT: adde 3, 3, 9
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_i64:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: add 3, 3, 6
+; ASM64PWR4-NEXT: blr
entry:
%add = add nsw i64 %a, %b
%add1 = add nsw i64 %add, %c
@@ -288,31 +324,36 @@ entry:
ret i64 %add2
}
-; CHECK-LABEL: name: test_i64
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r9', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r10', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6
-
define void @call_test_int_ptr() {
+; ASM32PWR4-LABEL: call_test_int_ptr:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 3, 0
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: stw 3, 60(1)
+; ASM32PWR4-NEXT: addi 3, 1, 60
+; ASM32PWR4-NEXT: bl .test_int_ptr
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_int_ptr:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: li 3, 0
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: stw 3, 124(1)
+; ASM64PWR4-NEXT: addi 3, 1, 124
+; ASM64PWR4-NEXT: bl .test_int_ptr
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%b = alloca i32, align 4
store i32 0, ptr %b, align 4
@@ -320,43 +361,56 @@ entry:
ret void
}
-; CHECK-LABEL: name: call_test_int_ptr
-
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: renamable $r3 = ADDI %stack.0.b, 0
-; 32BIT: BL_NOP <mcsymbol .test_int_ptr>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: renamable $x3 = ADDI8 %stack.0.b, 0
-; 64BIT: BL8_NOP <mcsymbol .test_int_ptr>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define void @test_int_ptr(ptr %a) {
+; ASM32PWR4-LABEL: test_int_ptr:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: stw 3, -8(1)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_int_ptr:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: std 3, -8(1)
+; ASM64PWR4-NEXT: blr
entry:
%a.addr = alloca ptr, align 8
store ptr %a, ptr %a.addr, align 8
ret void
}
-; CHECK-LABEL: name: test_int_ptr
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3
-; 32BIT: STW killed renamable $r3, 0, %stack.0.a.addr :: (store (s32) into %ir.a.addr, align 8)
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3
-; 64BIT: STD killed renamable $x3, 0, %stack.0.a.addr :: (store (s64) into %ir.a.addr)
-
-
define i32 @caller(i32 %i) {
+; ASM32PWR4-LABEL: caller:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: stw 3, 60(1)
+; ASM32PWR4-NEXT: cntlzw 3, 3
+; ASM32PWR4-NEXT: not 3, 3
+; ASM32PWR4-NEXT: rlwinm 3, 3, 27, 31, 31
+; ASM32PWR4-NEXT: stb 3, 59(1)
+; ASM32PWR4-NEXT: bl .call_test_bool[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: caller:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: stw 3, 124(1)
+; ASM64PWR4-NEXT: cntlzw 3, 3
+; ASM64PWR4-NEXT: srwi 3, 3, 5
+; ASM64PWR4-NEXT: xori 3, 3, 1
+; ASM64PWR4-NEXT: stb 3, 123(1)
+; ASM64PWR4-NEXT: bl .call_test_bool[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%i.addr = alloca i32, align 4
%b = alloca i8, align 1
@@ -373,187 +427,147 @@ entry:
declare i32 @call_test_bool(i1 zeroext)
-; CHECK-LABEL: name: caller
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT: liveins: $r3
-; 32BIT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT: BL_NOP <mcsymbol .call_test_bool[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r2, implicit-def $r1, implicit-def $r3
-; 32BIT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3
-; 64BIT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT: BL8_NOP <mcsymbol .call_test_bool[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def $x3
-; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
@f1 = global float 0.000000e+00, align 4
@d1 = global double 0.000000e+00, align 8
define void @call_test_floats() {
+; ASM32PWR4-LABEL: call_test_floats:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: fmr 2, 1
+; ASM32PWR4-NEXT: fmr 3, 1
+; ASM32PWR4-NEXT: bl .test_floats
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_floats:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: fmr 2, 1
+; ASM64PWR4-NEXT: fmr 3, 1
+; ASM64PWR4-NEXT: bl .test_floats
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
call float @test_floats(float %0, float %0, float %0)
ret void
}
-; CHECK-LABEL: name: call_test_floats{{.*}}
-
-; 32BIT: renamable $r3 = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $f2 = COPY renamable $f1
-; 32BIT-NEXT: $f3 = COPY renamable $f1
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_floats>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: renamable $x3 = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $f2 = COPY renamable $f1
-; 64BIT-NEXT: $f3 = COPY renamable $f1
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_floats>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define float @test_floats(float %f1, float %f2, float %f3) {
+; CHECKASM-LABEL: test_floats:
+; CHECKASM: # %bb.0: # %entry
+; CHECKASM-NEXT: fadds 0, 1, 2
+; CHECKASM-NEXT: fadds 1, 0, 3
+; CHECKASM-NEXT: blr
entry:
%add = fadd float %f1, %f2
%add1 = fadd float %add, %f3
ret float %add1
}
-; CHECK-LABEL: name: test_floats{{.*}}
-
-; CHECK: liveins:
-; CHECK-NEXT: - { reg: '$f1', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f2', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f3', virtual-reg: '' }
-; CHECK: body: |
-; CHECK-NEXT: bb.0.entry:
-; CHECK-NEXT: liveins: $f1, $f2, $f3
-
define void @call_test_fpr_max() {
+; ASM32PWR4-LABEL: call_test_fpr_max:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -128(1)
+; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1
+; ASM32PWR4-NEXT: stw 0, 136(1)
+; ASM32PWR4-NEXT: lfd 1, 0(3)
+; ASM32PWR4-NEXT: fmr 2, 1
+; ASM32PWR4-NEXT: fmr 3, 1
+; ASM32PWR4-NEXT: stfd 1, 120(1)
+; ASM32PWR4-NEXT: stfd 1, 112(1)
+; ASM32PWR4-NEXT: fmr 4, 1
+; ASM32PWR4-NEXT: fmr 5, 1
+; ASM32PWR4-NEXT: stfd 1, 104(1)
+; ASM32PWR4-NEXT: fmr 6, 1
+; ASM32PWR4-NEXT: fmr 7, 1
+; ASM32PWR4-NEXT: stfd 1, 96(1)
+; ASM32PWR4-NEXT: stfd 1, 88(1)
+; ASM32PWR4-NEXT: fmr 8, 1
+; ASM32PWR4-NEXT: fmr 9, 1
+; ASM32PWR4-NEXT: stfd 1, 80(1)
+; ASM32PWR4-NEXT: fmr 10, 1
+; ASM32PWR4-NEXT: fmr 11, 1
+; ASM32PWR4-NEXT: stfd 1, 72(1)
+; ASM32PWR4-NEXT: stfd 1, 64(1)
+; ASM32PWR4-NEXT: fmr 12, 1
+; ASM32PWR4-NEXT: fmr 13, 1
+; ASM32PWR4-NEXT: stfd 1, 56(1)
+; ASM32PWR4-NEXT: bl .test_fpr_max
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 128
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_fpr_max:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -160(1)
+; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1
+; ASM64PWR4-NEXT: std 0, 176(1)
+; ASM64PWR4-NEXT: lfd 1, 0(3)
+; ASM64PWR4-NEXT: fmr 2, 1
+; ASM64PWR4-NEXT: fmr 3, 1
+; ASM64PWR4-NEXT: stfd 1, 144(1)
+; ASM64PWR4-NEXT: stfd 1, 136(1)
+; ASM64PWR4-NEXT: fmr 4, 1
+; ASM64PWR4-NEXT: fmr 5, 1
+; ASM64PWR4-NEXT: stfd 1, 128(1)
+; ASM64PWR4-NEXT: fmr 6, 1
+; ASM64PWR4-NEXT: fmr 7, 1
+; ASM64PWR4-NEXT: stfd 1, 120(1)
+; ASM64PWR4-NEXT: stfd 1, 112(1)
+; ASM64PWR4-NEXT: fmr 8, 1
+; ASM64PWR4-NEXT: fmr 9, 1
+; ASM64PWR4-NEXT: fmr 10, 1
+; ASM64PWR4-NEXT: fmr 11, 1
+; ASM64PWR4-NEXT: fmr 12, 1
+; ASM64PWR4-NEXT: fmr 13, 1
+; ASM64PWR4-NEXT: bl .test_fpr_max
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 160
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load double, ptr @d1, align 8
call double @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0)
ret void
}
-; CHECK-LABEL: name: call_test_fpr_max{{.*}}
-
-; 32BIT: renamable $r[[REG:[0-9]+]] = LWZtoc @d1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load (s64) from @d1)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: STFD renamable $f1, 56, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 64, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 72, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 80, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 88, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 96, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 104, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 112, $r1 :: (store (s64))
-; 32BIT-DAG: STFD renamable $f1, 120, $r1 :: (store (s64))
-; 32BIT-DAG: $f2 = COPY renamable $f1
-; 32BIT-DAG: $f3 = COPY renamable $f1
-; 32BIT-DAG: $f4 = COPY renamable $f1
-; 32BIT-DAG: $f5 = COPY renamable $f1
-; 32BIT-DAG: $f6 = COPY renamable $f1
-; 32BIT-DAG: $f7 = COPY renamable $f1
-; 32BIT-DAG: $f8 = COPY renamable $f1
-; 32BIT-DAG: $f9 = COPY renamable $f1
-; 32BIT-DAG: $f10 = COPY renamable $f1
-; 32BIT-DAG: $f11 = COPY renamable $f1
-; 32BIT-DAG: $f12 = COPY renamable $f1
-; 32BIT-DAG: $f13 = COPY renamable $f1
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_fpr_max>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $r2, implicit-def $r1, implicit-def dead $f1
-; 32BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_fpr_max:
-
-; ASM32PWR4: stwu 1, -128(1)
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C2(2)
-; ASM32PWR4-NEXT: stw 0, 136(1)
-; ASM32PWR4-NEXT: lfd 1, 0([[REG]])
-; ASM32PWR4-DAG: stfd 1, 56(1)
-; ASM32PWR4-DAG: stfd 1, 64(1)
-; ASM32PWR4-DAG: stfd 1, 72(1)
-; ASM32PWR4-DAG: stfd 1, 80(1)
-; ASM32PWR4-DAG: stfd 1, 88(1)
-; ASM32PWR4-DAG: stfd 1, 96(1)
-; ASM32PWR4-DAG: stfd 1, 104(1)
-; ASM32PWR4-DAG: stfd 1, 112(1)
-; ASM32PWR4-DAG: stfd 1, 120(1)
-; ASM32PWR4-DAG: fmr 2, 1
-; ASM32PWR4-DAG: fmr 3, 1
-; ASM32PWR4-DAG: fmr 4, 1
-; ASM32PWR4-DAG: fmr 5, 1
-; ASM32PWR4-DAG: fmr 6, 1
-; ASM32PWR4-DAG: fmr 7, 1
-; ASM32PWR4-DAG: fmr 8, 1
-; ASM32PWR4-DAG: fmr 9, 1
-; ASM32PWR4-DAG: fmr 10, 1
-; ASM32PWR4-DAG: fmr 11, 1
-; ASM32PWR4-DAG: fmr 12, 1
-; ASM32PWR4-DAG: fmr 13, 1
-; ASM32PWR4-NEXT: bl .test_fpr_max
-; ASM32PWR4-NEXT: nop
-; ASM32PWR4-NEXT: addi 1, 1, 128
-
-; 64BIT: renamable $x[[REGD1ADDR:[0-9]+]] = LDtoc @d1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x[[REGD1ADDR:[0-9]+]] :: (dereferenceable load (s64) from @d1)
-; 64BIT-NEXT: ADJCALLSTACKDOWN 152, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: STFD renamable $f1, 112, $x1 :: (store (s64))
-; 64BIT-DAG: STFD renamable $f1, 120, $x1 :: (store (s64))
-; 64BIT-DAG: STFD renamable $f1, 128, $x1 :: (store (s64))
-; 64BIT-DAG: STFD renamable $f1, 136, $x1 :: (store (s64))
-; 64BIT-DAG: STFD renamable $f1, 144, $x1 :: (store (s64))
-; 64BIT-DAG: $f2 = COPY renamable $f1
-; 64BIT-DAG: $f3 = COPY renamable $f1
-; 64BIT-DAG: $f4 = COPY renamable $f1
-; 64BIT-DAG: $f5 = COPY renamable $f1
-; 64BIT-DAG: $f6 = COPY renamable $f1
-; 64BIT-DAG: $f7 = COPY renamable $f1
-; 64BIT-DAG: $f8 = COPY renamable $f1
-; 64BIT-DAG: $f9 = COPY renamable $f1
-; 64BIT-DAG: $f10 = COPY renamable $f1
-; 64BIT-DAG: $f11 = COPY renamable $f1
-; 64BIT-DAG: $f12 = COPY renamable $f1
-; 64BIT-DAG: $f13 = COPY renamable $f1
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_fpr_max>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit killed $f2, implicit killed $f3, implicit killed $f4, implicit killed $f5, implicit killed $f6, implicit killed $f7, implicit killed $f8, implicit killed $f9, implicit killed $f10, implicit killed $f11, implicit killed $f12, implicit killed $f13, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1
-
-; ASM64PWR4: stdu 1, -160(1)
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C2(2)
-; ASM64PWR4-NEXT: std 0, 176(1)
-; ASM64PWR4-NEXT: lfd 1, 0([[REG]])
-; ASM64PWR4-DAG: stfd 1, 112(1)
-; ASM64PWR4-DAG: stfd 1, 120(1)
-; ASM64PWR4-DAG: stfd 1, 128(1)
-; ASM64PWR4-DAG: stfd 1, 136(1)
-; ASM64PWR4-DAG: stfd 1, 144(1)
-; ASM64PWR4-DAG: fmr 2, 1
-; ASM64PWR4-DAG: fmr 3, 1
-; ASM64PWR4-DAG: fmr 4, 1
-; ASM64PWR4-DAG: fmr 5, 1
-; ASM64PWR4-DAG: fmr 6, 1
-; ASM64PWR4-DAG: fmr 7, 1
-; ASM64PWR4-DAG: fmr 8, 1
-; ASM64PWR4-DAG: fmr 9, 1
-; ASM64PWR4-DAG: fmr 10, 1
-; ASM64PWR4-DAG: fmr 11, 1
-; ASM64PWR4-DAG: fmr 12, 1
-; ASM64PWR4-DAG: fmr 13, 1
-; ASM64PWR4-NEXT: bl .test_fpr_max
-; ASM64PWR4-NEXT: nop
-; ASM64PWR4-NEXT: addi 1, 1, 160
-
define double @test_fpr_max(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13) {
+; CHECKASM-LABEL: test_fpr_max:
+; CHECKASM: # %bb.0: # %entry
+; CHECKASM-NEXT: fadd 0, 1, 2
+; CHECKASM-NEXT: fadd 0, 0, 3
+; CHECKASM-NEXT: fadd 0, 0, 4
+; CHECKASM-NEXT: fadd 0, 0, 5
+; CHECKASM-NEXT: fadd 0, 0, 6
+; CHECKASM-NEXT: fadd 0, 0, 7
+; CHECKASM-NEXT: fadd 0, 0, 8
+; CHECKASM-NEXT: fadd 0, 0, 9
+; CHECKASM-NEXT: fadd 0, 0, 10
+; CHECKASM-NEXT: fadd 0, 0, 11
+; CHECKASM-NEXT: fadd 0, 0, 12
+; CHECKASM-NEXT: fadd 1, 0, 13
+; CHECKASM-NEXT: blr
entry:
%add = fadd double %d1, %d2
%add1 = fadd double %add, %d3
@@ -570,27 +584,42 @@ entry:
ret double %add11
}
-; CHECK-LABEL: name: test_fpr_max{{.*}}
-
-; CHECK: liveins:
-; CHECK-NEXT: - { reg: '$f1', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f2', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f3', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f4', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f5', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f6', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f7', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f8', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f9', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f10', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f11', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f12', virtual-reg: '' }
-; CHECK-NEXT: - { reg: '$f13', virtual-reg: '' }
-; CHECK: body: |
-; CHECK-NEXT: bb.0.entry:
-; CHECK-NEXT: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
-
define void @call_test_mix() {
+; ASM32PWR4-LABEL: call_test_mix:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 4, 1
+; ASM32PWR4-NEXT: li 7, 97
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: bl .test_mix
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_mix:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -112(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 128(1)
+; ASM64PWR4-NEXT: li 4, 1
+; ASM64PWR4-NEXT: li 6, 97
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: bl .test_mix
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 112
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
%1 = load double, ptr @d1, align 8
@@ -598,29 +627,46 @@ entry:
ret void
}
-; CHECK-LABEL: name: call_test_mix{{.*}}
-
-; 32BIT: renamable $r[[REG1:[0-9]+]] = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $r[[REG2:[0-9]+]] = LWZtoc @d1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG1]] :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG2]] :: (dereferenceable load (s64) from @d1)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $r4 = LI 1
-; 32BIT-NEXT: $r7 = LI 97
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_mix>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r4, implicit $f2, implicit killed $r7, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT: renamable $x[[REG1:[0-9]+]] = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $x[[REG2:[0-9]+]] = LDtoc @d1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG1]] :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG2]] :: (dereferenceable load (s64) from @d1)
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $x4 = LI8 1
-; 64BIT-NEXT: $x6 = LI8 97
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_mix>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $x4, implicit $f2, implicit killed $x6, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
define i32 @test_mix(float %f, i32 signext %i, double %d, i8 signext %c) {
+; ASM32PWR4-LABEL: test_mix:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: lis 3, 17200
+; ASM32PWR4-NEXT: fadd 1, 1, 2
+; ASM32PWR4-NEXT: stw 3, -16(1)
+; ASM32PWR4-NEXT: lwz 3, L..C3(2) # %const.0
+; ASM32PWR4-NEXT: frsp 1, 1
+; ASM32PWR4-NEXT: lfs 0, 0(3)
+; ASM32PWR4-NEXT: clrlwi 3, 7, 24
+; ASM32PWR4-NEXT: add 3, 4, 3
+; ASM32PWR4-NEXT: xoris 3, 3, 32768
+; ASM32PWR4-NEXT: stw 3, -12(1)
+; ASM32PWR4-NEXT: addi 3, 1, -4
+; ASM32PWR4-NEXT: lfd 2, -16(1)
+; ASM32PWR4-NEXT: fsub 0, 2, 0
+; ASM32PWR4-NEXT: frsp 0, 0
+; ASM32PWR4-NEXT: fadds 0, 0, 1
+; ASM32PWR4-NEXT: fctiwz 0, 0
+; ASM32PWR4-NEXT: stfiwx 0, 0, 3
+; ASM32PWR4-NEXT: lwz 3, -4(1)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_mix:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: clrlwi 5, 6, 24
+; ASM64PWR4-NEXT: fadd 0, 1, 2
+; ASM64PWR4-NEXT: addi 3, 1, -4
+; ASM64PWR4-NEXT: frsp 0, 0
+; ASM64PWR4-NEXT: add 4, 4, 5
+; ASM64PWR4-NEXT: extsw 4, 4
+; ASM64PWR4-NEXT: std 4, -16(1)
+; ASM64PWR4-NEXT: lfd 1, -16(1)
+; ASM64PWR4-NEXT: fcfid 1, 1
+; ASM64PWR4-NEXT: frsp 1, 1
+; ASM64PWR4-NEXT: fadds 0, 1, 0
+; ASM64PWR4-NEXT: fctiwz 0, 0
+; ASM64PWR4-NEXT: stfiwx 0, 0, 3
+; ASM64PWR4-NEXT: lwz 3, -4(1)
+; ASM64PWR4-NEXT: blr
entry:
%conv = fpext float %f to double
%add = fadd double %conv, %d
@@ -633,28 +679,27 @@ entry:
ret i32 %conv6
}
-; CHECK-LABEL: name: test_mix{{.*}}
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$f1', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$f2', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $f1, $f2, $r4, $r7
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$f1', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$f2', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $f1, $f2, $x4, $x6
-
-
define i64 @callee_mixed_ints(i32 %a, i8 signext %b, i32 %c, i16 signext %d, i64 %e) {
+; ASM32PWR4-LABEL: callee_mixed_ints:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: clrlwi 4, 4, 24
+; ASM32PWR4-NEXT: add 3, 3, 4
+; ASM32PWR4-NEXT: add 3, 3, 5
+; ASM32PWR4-NEXT: add 3, 3, 6
+; ASM32PWR4-NEXT: srawi 5, 3, 31
+; ASM32PWR4-NEXT: addc 4, 3, 8
+; ASM32PWR4-NEXT: adde 3, 5, 7
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: callee_mixed_ints:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: clrlwi 4, 4, 24
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: add 3, 3, 6
+; ASM64PWR4-NEXT: extsw 3, 3
+; ASM64PWR4-NEXT: add 3, 3, 7
+; ASM64PWR4-NEXT: blr
entry:
%conv = zext i8 %b to i32
%add = add nsw i32 %a, %conv
@@ -666,30 +711,50 @@ entry:
ret i64 %add5
}
-; CHECK-LABEL: name: callee_mixed_ints
-
-; 32BIT: liveins:
-; 32BIT-NEXT: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r6', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r7', virtual-reg: '' }
-; 32BIT-NEXT: - { reg: '$r8', virtual-reg: '' }
-; 32BIT: body: |
-; 32BIT-NEXT: bb.0.entry:
-; 32BIT-NEXT: liveins: $r3, $r4, $r5, $r6, $r7, $r8
-
-; 64BIT: liveins:
-; 64BIT-NEXT: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x6', virtual-reg: '' }
-; 64BIT-NEXT: - { reg: '$x7', virtual-reg: '' }
-; 64BIT: body: |
-; 64BIT-NEXT: bb.0.entry:
-; 64BIT-NEXT: liveins: $x3, $x4, $x5, $x6, $x7
-
define void @call_test_vararg() {
+; ASM32PWR4-LABEL: call_test_vararg:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1
+; ASM32PWR4-NEXT: stfd 1, 64(1)
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: li 3, 42
+; ASM32PWR4-NEXT: stfd 2, 72(1)
+; ASM32PWR4-NEXT: lwz 4, 64(1)
+; ASM32PWR4-NEXT: lwz 5, 68(1)
+; ASM32PWR4-NEXT: lwz 6, 72(1)
+; ASM32PWR4-NEXT: lwz 7, 76(1)
+; ASM32PWR4-NEXT: bl .test_vararg[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_vararg:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1
+; ASM64PWR4-NEXT: stfd 1, 112(1)
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: li 3, 42
+; ASM64PWR4-NEXT: stfd 2, 120(1)
+; ASM64PWR4-NEXT: ld 4, 112(1)
+; ASM64PWR4-NEXT: ld 5, 120(1)
+; ASM64PWR4-NEXT: bl .test_vararg[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
%conv = fpext float %0 to double
@@ -700,69 +765,52 @@ entry:
declare void @test_vararg(i32, ...)
-; CHECK-LABEL: name: call_test_vararg
-
-; 32BIT: renamable $r[[REG:[0-9]+]] = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: renamable $r[[REG:[0-9]+]] = LWZtoc @d1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]], align 8)
-; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load (s64) from @d1)
-; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]] + 4)
-; 32BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 32BIT-NEXT: renamable $r6 = LWZ 0, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]], align 8)
-; 32BIT-NEXT: renamable $r7 = LWZ 4, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]] + 4)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $r3 = LI 42
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit $f2, implicit $r6, implicit $r7, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_vararg:
-
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C1(2)
-; ASM32PWR4-NEXT: stw 0, 88(1)
-; ASM32PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C2(2)
-; ASM32PWR4-NEXT: stfd 1, 64(1)
-; ASM32PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM32PWR4-NEXT: li 3, 42
-; ASM32PWR4-NEXT: stfd 2, 72(1)
-; ASM32PWR4-DAG: lwz 4, 64(1)
-; ASM32PWR4-DAG: lwz 5, 68(1)
-; ASM32PWR4-DAG: lwz 6, 72(1)
-; ASM32PWR4-DAG: lwz 7, 76(1)
-; ASM32PWR4-NEXT: bl .test_vararg[PR]
-; ASM32PWR4-NEXT: nop
-
-; 64BIT: renamable $x[[REG:[0-9]+]] = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: renamable $x[[REG:[0-9]+]] = LDtoc @d1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load (s64) from @d1)
-; 64BIT-NEXT: renamable $x4 = LD 0, %stack.[[SLOT1]] :: (load (s64) from %stack.[[SLOT1]])
-; 64BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 64BIT-NEXT: renamable $x5 = LD 0, %stack.[[SLOT2]] :: (load (s64) from %stack.[[SLOT2]])
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $x3 = LI8 42
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $f2, implicit $x5, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C1(2)
-; ASM64PWR4-NEXT: std 0, 144(1)
-; ASM64PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C2(2)
-; ASM64PWR4-NEXT: stfd 1, 112(1)
-; ASM64PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM64PWR4-NEXT: li 3, 42
-; ASM64PWR4-NEXT: stfd 2, 120(1)
-; ASM64PWR4-NEXT: ld 4, 112(1)
-; ASM64PWR4-NEXT: ld 5, 120(1)
-; ASM64PWR4-NEXT: bl .test_vararg[PR]
-; ASM64PWR4-NEXT: nop
-
define void @call_test_vararg2() {
+; ASM32PWR4-LABEL: call_test_vararg2:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: li 6, 42
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1
+; ASM32PWR4-NEXT: stfd 1, 64(1)
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: li 3, 42
+; ASM32PWR4-NEXT: stfd 2, 72(1)
+; ASM32PWR4-NEXT: lwz 4, 64(1)
+; ASM32PWR4-NEXT: lwz 5, 68(1)
+; ASM32PWR4-NEXT: lwz 7, 72(1)
+; ASM32PWR4-NEXT: lwz 8, 76(1)
+; ASM32PWR4-NEXT: bl .test_vararg[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_vararg2:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 5, 42
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1
+; ASM64PWR4-NEXT: stfd 1, 112(1)
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: li 3, 42
+; ASM64PWR4-NEXT: stfd 2, 120(1)
+; ASM64PWR4-NEXT: ld 4, 112(1)
+; ASM64PWR4-NEXT: ld 6, 120(1)
+; ASM64PWR4-NEXT: bl .test_vararg[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
%conv = fpext float %0 to double
@@ -771,71 +819,53 @@ entry:
ret void
}
-; CHECK-LABEL: name: call_test_vararg2
-
-; 32BIT: renamable $r[[REG:[0-9]+]] = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: renamable $r[[REG:[0-9]+]] = LWZtoc @d1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]], align 8)
-; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load (s64) from @d1)
-; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]] + 4)
-; 32BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 32BIT-NEXT: renamable $r7 = LWZ 0, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]], align 8)
-; 32BIT-NEXT: renamable $r8 = LWZ 4, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]] + 4)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $r3 = LI 42
-; 32BIT-NEXT: $r6 = LI 42
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit killed $r6, implicit $f2, implicit $r7, implicit $r8, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C1(2)
-; ASM32PWR4-NEXT: stw 0, 88(1)
-; ASM32PWR4-NEXT: li 6, 42
-; ASM32PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C2(2)
-; ASM32PWR4-NEXT: stfd 1, 64(1)
-; ASM32PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM32PWR4-NEXT: li 3, 42
-; ASM32PWR4-NEXT: stfd 2, 72(1)
-; ASM32PWR4-DAG: lwz 4, 64(1)
-; ASM32PWR4-DAG: lwz 5, 68(1)
-; ASM32PWR4-DAG: lwz 7, 72(1)
-; ASM32PWR4-DAG: lwz 8, 76(1)
-; ASM32PWR4-NEXT: bl .test_vararg[PR]
-; ASM32PWR4-NEXT: nop
-
-; 64BIT: renamable $x[[REG:[0-9]+]] = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: renamable $x[[REG:[0-9]+]] = LDtoc @d1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load (s64) from @d1)
-; 64BIT-NEXT: renamable $x4 = LD 0, %stack.[[SLOT1]] :: (load (s64) from %stack.[[SLOT1]])
-; 64BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 64BIT-NEXT: renamable $x6 = LD 0, %stack.[[SLOT2]] :: (load (s64) from %stack.[[SLOT2]])
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $x3 = LI8 42
-; 64BIT-NEXT: $x5 = LI8 42
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C1(2)
-; ASM64PWR4-NEXT: std 0, 144(1)
-; ASM64PWR4-NEXT: li 5, 42
-; ASM64PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C2(2)
-; ASM64PWR4-NEXT: stfd 1, 112(1)
-; ASM64PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM64PWR4-NEXT: li 3, 42
-; ASM64PWR4-NEXT: stfd 2, 120(1)
-; ASM64PWR4-NEXT: ld 4, 112(1)
-; ASM64PWR4-NEXT: ld 6, 120(1)
-; ASM64PWR4-NEXT: bl .test_vararg[PR]
-; ASM64PWR4-NEXT: nop
-
define void @call_test_vararg3() {
+; ASM32PWR4-LABEL: call_test_vararg3:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: li 6, 0
+; ASM32PWR4-NEXT: li 7, 42
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C2(2) # @d1
+; ASM32PWR4-NEXT: stfd 1, 64(1)
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: li 3, 42
+; ASM32PWR4-NEXT: stfd 2, 72(1)
+; ASM32PWR4-NEXT: lwz 4, 64(1)
+; ASM32PWR4-NEXT: lwz 5, 68(1)
+; ASM32PWR4-NEXT: lwz 8, 72(1)
+; ASM32PWR4-NEXT: lwz 9, 76(1)
+; ASM32PWR4-NEXT: bl .test_vararg[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_vararg3:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 5, 42
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C2(2) # @d1
+; ASM64PWR4-NEXT: stfd 1, 112(1)
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: li 3, 42
+; ASM64PWR4-NEXT: stfd 2, 120(1)
+; ASM64PWR4-NEXT: ld 4, 112(1)
+; ASM64PWR4-NEXT: ld 6, 120(1)
+; ASM64PWR4-NEXT: bl .test_vararg[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
%conv = fpext float %0 to double
@@ -844,118 +874,46 @@ entry:
ret void
}
-; CHECK-LABEL: name: call_test_vararg3
-
-; 32BIT: renamable $r[[REG:[0-9]+]] = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: renamable $r[[REG:[0-9]+]] = LWZtoc @d1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]], align 8)
-; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load (s64) from @d1)
-; 32BIT-NEXT: renamable $r5 = LWZ 4, %stack.[[SLOT1]] :: (load (s32) from %stack.[[SLOT1]] + 4)
-; 32BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 32BIT-NEXT: renamable $r8 = LWZ 0, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]], align 8)
-; 32BIT-NEXT: renamable $r9 = LWZ 4, %stack.[[SLOT2]] :: (load (s32) from %stack.[[SLOT2]] + 4)
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $r3 = LI 42
-; 32BIT-NEXT: $r6 = LI 0
-; 32BIT-NEXT: $r7 = LI 42
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r5, implicit killed $r6, implicit killed $r7, implicit $f2, implicit $r8, implicit $r9, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C1(2)
-; ASM32PWR4-DAG: li 6, 0
-; ASM32PWR4-DAG: li 7, 42
-; ASM32PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C2(2)
-; ASM32PWR4-NEXT: stfd 1, 64(1)
-; ASM32PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM32PWR4-NEXT: li 3, 42
-; ASM32PWR4-NEXT: stfd 2, 72(1)
-; ASM32PWR4-DAG: lwz 4, 64(1)
-; ASM32PWR4-DAG: lwz 5, 68(1)
-; ASM32PWR4-DAG: lwz 8, 72(1)
-; ASM32PWR4-DAG: lwz 9, 76(1)
-; ASM32PWR4-NEXT: bl .test_vararg[PR]
-; ASM32PWR4-NEXT: nop
-
-; 64BIT: renamable $x[[REG:[0-9]+]] = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: renamable $x[[REG:[0-9]+]] = LDtoc @d1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: STFD renamable $f1, 0, %stack.[[SLOT1:[0-9]+]] :: (store (s64) into %stack.[[SLOT1]])
-; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load (s64) from @d1)
-; 64BIT-NEXT: renamable $x4 = LD 0, %stack.[[SLOT1]] :: (load (s64) from %stack.[[SLOT1]])
-; 64BIT-NEXT: STFD renamable $f2, 0, %stack.[[SLOT2:[0-9]+]] :: (store (s64) into %stack.[[SLOT2]])
-; 64BIT-NEXT: renamable $x6 = LD 0, %stack.[[SLOT2]] :: (load (s64) from %stack.[[SLOT2]])
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $x3 = LI8 42
-; 64BIT-NEXT: $x5 = LI8 42
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit killed $x5, implicit $f2, implicit $x6, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C1(2)
-; ASM64PWR4-NEXT: std 0, 144(1)
-; ASM64PWR4-NEXT: li 5, 42
-; ASM64PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C2(2)
-; ASM64PWR4-NEXT: stfd 1, 112(1)
-; ASM64PWR4-NEXT: lfd 2, 0([[REG]])
-; ASM64PWR4-NEXT: li 3, 42
-; ASM64PWR4-NEXT: stfd 2, 120(1)
-; ASM64PWR4-DAG: ld 4, 112(1)
-; ASM64PWR4-DAG: ld 6, 120(1)
-; ASM64PWR4-NEXT: bl .test_vararg[PR]
-; ASM64PWR4-NEXT: nop
-
define void @call_test_vararg4() {
+; ASM32PWR4-LABEL: call_test_vararg4:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: lwz 3, L..C1(2) # @f1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: li 3, 42
+; ASM32PWR4-NEXT: stfs 1, 60(1)
+; ASM32PWR4-NEXT: lwz 4, 60(1)
+; ASM32PWR4-NEXT: bl .test_vararg[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_vararg4:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C1(2) # @f1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: li 3, 42
+; ASM64PWR4-NEXT: stfs 1, 124(1)
+; ASM64PWR4-NEXT: lwz 4, 124(1)
+; ASM64PWR4-NEXT: bl .test_vararg[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f1, align 4
call void (i32, ...) @test_vararg(i32 42, float %0)
ret void
}
-; CHECK-LABEL: name: call_test_vararg4
-
-; 32BIT: renamable $r[[REG:[0-9]+]] = LWZtoc @f1, $r2 :: (load (s32) from got)
-; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from @f1)
-; 32BIT-NEXT: STFS renamable $f1, 0, %stack.[[SLOT:[0-9]+]] :: (store (s32) into %stack.[[SLOT]])
-; 32BIT-NEXT: renamable $r4 = LWZ 0, %stack.[[SLOT]] :: (load (s32) from %stack.[[SLOT]])
-; 32BIT-NEXT: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: $r3 = LI 42
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_vararg[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r4, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; ASM32PWR4: stwu 1, -64(1)
-; ASM32PWR4-NEXT: lwz [[REG:[0-9]+]], L..C1(2)
-; ASM32PWR4-NEXT: stw 0, 72(1)
-; ASM32PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM32PWR4-NEXT: li 3, 42
-; ASM32PWR4-NEXT: stfs 1, 60(1)
-; ASM32PWR4-NEXT: lwz 4, 60(1)
-; ASM32PWR4-NEXT: bl .test_vararg[PR]
-; ASM32PWR4-NEXT: nop
-
-; 64BIT: renamable $x[[REG:[0-9]+]] = LDtoc @f1, $x2 :: (load (s64) from got)
-; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from @f1)
-; 64BIT-NEXT: STFS renamable $f1, 0, %stack.[[SLOT:[0-9]+]] :: (store (s32) into %stack.[[SLOT]])
-; 64BIT-NEXT: renamable $x4 = LWZ8 0, %stack.[[SLOT]] :: (load (s32) from %stack.[[SLOT]])
-; 64BIT-NEXT: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: $x3 = LI8 42
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_vararg[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $f1, implicit $x4, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-NEXT: ld [[REG:[0-9]+]], L..C1(2)
-; ASM64PWR4-NEXT: std 0, 144(1)
-; ASM64PWR4-NEXT: lfs 1, 0([[REG]])
-; ASM64PWR4-NEXT: li 3, 42
-; ASM64PWR4-NEXT: stfs 1, 124(1)
-; ASM64PWR4-NEXT: lwz 4, 124(1)
-; ASM64PWR4-NEXT: bl .test_vararg[PR]
-; ASM64PWR4-NEXT: nop
-
@c = common global i8 0, align 1
@si = common global i16 0, align 2
@i = common global i32 0, align 4
@@ -965,6 +923,73 @@ entry:
; Basic saving of integral type arguments to the parameter save area.
define void @call_test_stackarg_int() {
+; ASM32PWR4-LABEL: call_test_stackarg_int:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C4(2) # @si
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: lwz 4, L..C5(2) # @i
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: li 10, 8
+; ASM32PWR4-NEXT: lha 7, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C6(2) # @c
+; ASM32PWR4-NEXT: lbz 11, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C7(2) # @lli
+; ASM32PWR4-NEXT: lwz 5, 0(4)
+; ASM32PWR4-NEXT: lwz 4, 0(3)
+; ASM32PWR4-NEXT: lwz 3, 4(3)
+; ASM32PWR4-NEXT: stw 5, 76(1)
+; ASM32PWR4-NEXT: stw 3, 72(1)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stw 4, 68(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: stw 5, 64(1)
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: stw 7, 60(1)
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: stw 11, 56(1)
+; ASM32PWR4-NEXT: bl .test_stackarg_int[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_stackarg_int:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -160(1)
+; ASM64PWR4-NEXT: ld 3, L..C3(2) # @si
+; ASM64PWR4-NEXT: std 0, 176(1)
+; ASM64PWR4-NEXT: ld 4, L..C4(2) # @i
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: li 10, 8
+; ASM64PWR4-NEXT: lha 7, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C5(2) # @c
+; ASM64PWR4-NEXT: lbz 11, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C6(2) # @lli
+; ASM64PWR4-NEXT: lwz 5, 0(4)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: ld 3, 0(3)
+; ASM64PWR4-NEXT: std 5, 144(1)
+; ASM64PWR4-NEXT: std 3, 136(1)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: std 5, 128(1)
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: std 7, 120(1)
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: std 11, 112(1)
+; ASM64PWR4-NEXT: bl .test_stackarg_int[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 160
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load i8, ptr @c, align 1
%1 = load i16, ptr @si, align 2
@@ -977,121 +1002,60 @@ entry:
declare void @test_stackarg_int(i32, i32, i32, i32, i32, i32, i32, i32, i8 zeroext, i16 signext, i32, i64, i32)
-; CHECK-LABEL: name: call_test_stackarg_int{{.*}}
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 32BIT-DAG: ADJCALLSTACKDOWN 80, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: $r10 = LI 8
-; 32BIT-DAG: renamable $r[[REGCADDR:[0-9]+]] = LWZtoc @c, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGC:[0-9]+]] = LBZ 0, killed renamable $r[[REGCADDR]] :: (dereferenceable load (s8) from @c)
-; 32BIT-DAG: STW killed renamable $r[[REGC]], 56, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGSIADDR:[0-9]+]] = LWZtoc @si, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGSI:[0-9]+]] = LHA 0, killed renamable $r[[REGSIADDR]] :: (dereferenceable load (s16) from @si)
-; 32BIT-DAG: STW killed renamable $r[[REGSI]], 60, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGIADDR:[0-9]+]] = LWZtoc @i, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGI:[0-9]+]] = LWZ 0, killed renamable $r[[REGIADDR]] :: (dereferenceable load (s32) from @i)
-; 32BIT-DAG: STW killed renamable $r[[REGI]], 64, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGLLIADDR:[0-9]+]] = LWZtoc @lli, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGLLI1:[0-9]+]] = LWZ 0, renamable $r[[REGLLIADDR]] :: (dereferenceable load (s32) from @lli, align 8)
-; 32BIT-DAG: STW killed renamable $r[[REGLLI1]], 68, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGLLI2:[0-9]+]] = LWZ 4, killed renamable $r[[REGLLIADDR]] :: (dereferenceable load (s32) from @lli + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REGLLI2]], 72, $r1 :: (store (s32))
-; 32BIT-DAG: STW renamable $r[[REGI]], 76, $r1 :: (store (s32))
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_int[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 80, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_stackarg_int:
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: li 9, 7
-; ASM32PWR4-DAG: li 10, 8
-; ASM32PWR4-DAG: lwz [[REGCADDR:[0-9]+]], L..C6(2)
-; ASM32PWR4-DAG: lbz [[REGC:[0-9]+]], 0([[REGCADDR]])
-; ASM32PWR4-DAG: stw [[REGC]], 56(1)
-; ASM32PWR4-DAG: lwz [[REGSIADDR:[0-9]+]], L..C4(2)
-; ASM32PWR4-DAG: lha [[REGSI:[0-9]+]], 0([[REGSIADDR]])
-; ASM32PWR4-DAG: stw [[REGSI]], 60(1)
-; ASM32PWR4-DAG: lwz [[REGIADDR:[0-9]+]], L..C5(2)
-; ASM32PWR4-DAG: lwz [[REGI:[0-9]+]], 0([[REGIADDR]])
-; ASM32PWR4-DAG: stw [[REGI]], 64(1)
-; ASM32PWR4-DAG: lwz [[REGLLIADDR:[0-9]+]], L..C7(2)
-; ASM32PWR4-DAG: lwz [[REGLLI1:[0-9]+]], 0([[REGLLIADDR]])
-; ASM32PWR4-DAG: stw [[REGLLI1]], 68(1)
-; ASM32PWR4-DAG: lwz [[REGLLI2:[0-9]+]], 4([[REGLLIADDR]])
-; ASM32PWR4-DAG: stw [[REGLLI2]], 72(1)
-; ASM32PWR4-DAG: stw [[REGI]], 76(1)
-; ASM32PWR4-NEXT: bl .test_stackarg_int[PR]
-; ASM32PWR4-NEXT: nop
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 64BIT-DAG: ADJCALLSTACKDOWN 152, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: $x10 = LI8 8
-; 64BIT-DAG: renamable $x[[REGCADDR:[0-9]+]] = LDtoc @c, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGC:[0-9]+]] = LBZ8 0, killed renamable $x[[REGCADDR]] :: (dereferenceable load (s8) from @c)
-; 64BIT-DAG: STD killed renamable $x[[REGC]], 112, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGSIADDR:[0-9]+]] = LDtoc @si, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGSI:[0-9]+]] = LHA8 0, killed renamable $x[[REGSIADDR]] :: (dereferenceable load (s16) from @si)
-; 64BIT-DAG: STD killed renamable $x[[REGSI]], 120, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGIADDR:[0-9]+]] = LDtoc @i, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGI:[0-9]+]] = LWZ8 0, killed renamable $x[[REGIADDR]] :: (dereferenceable load (s32) from @i)
-; 64BIT-DAG: STD killed renamable $x[[REGI]], 128, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGLLIADDR:[0-9]+]] = LDtoc @lli, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGLLI:[0-9]+]] = LD 0, killed renamable $x[[REGLLIADDR]] :: (dereferenceable load (s64) from @lli)
-; 64BIT-DAG: STD killed renamable $x[[REGLLI]], 136, $x1 :: (store (s64))
-; 64BIT-DAG: STD renamable $x[[REGI]], 144, $x1 :: (store (s64))
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_int[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 152, 0, implicit-def dead $r1, implicit $r1
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM64PWR4-DAG: stdu 1, -160(1)
-; ASM64PWR4-DAG: li 3, 1
-; ASM64PWR4-DAG: li 4, 2
-; ASM64PWR4-DAG: li 5, 3
-; ASM64PWR4-DAG: li 6, 4
-; ASM64PWR4-DAG: li 7, 5
-; ASM64PWR4-DAG: li 8, 6
-; ASM64PWR4-DAG: li 9, 7
-; ASM64PWR4-DAG: li 10, 8
-; ASM64PWR4-DAG: ld [[REGCADDR:[0-9]+]], L..C5(2)
-; ASM64PWR4-DAG: lbz [[REGC:[0-9]+]], 0([[REGCADDR]])
-; ASM64PWR4-DAG: std [[REGC]], 112(1)
-; ASM64PWR4-DAG: ld [[REGSIADDR:[0-9]+]], L..C3(2)
-; ASM64PWR4-DAG: lha [[REGSI:[0-9]+]], 0([[REGSIADDR]])
-; ASM64PWR4-DAG: std [[REGSI]], 120(1)
-; ASM64PWR4-DAG: ld [[REGIADDR:[0-9]+]], L..C4(2)
-; ASM64PWR4-DAG: lwz [[REGI:[0-9]+]], 0([[REGIADDR]])
-; ASM64PWR4-DAG: std [[REGI]], 128(1)
-; ASM64PWR4-DAG: ld [[REGLLIADDR:[0-9]+]], L..C6(2)
-; ASM64PWR4-DAG: ld [[REGLLI:[0-9]+]], 0([[REGLLIADDR]])
-; ASM64PWR4-DAG: std [[REGLLI]], 136(1)
-; ASM64PWR4-DAG: std [[REGI]], 144(1)
-; ASM64PWR4-NEXT: bl .test_stackarg_int[PR]
-; ASM64PWR4-NEXT: nop
-
; Basic saving of floating point type arguments to the parameter save area.
; The float and double arguments will pass in both fpr as well as parameter save area.
define void @call_test_stackarg_float() {
+; ASM32PWR4-LABEL: call_test_stackarg_float:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C8(2) # @f
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: lfs 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: li 10, 8
+; ASM32PWR4-NEXT: stfd 2, 60(1)
+; ASM32PWR4-NEXT: stfs 1, 56(1)
+; ASM32PWR4-NEXT: bl .test_stackarg_float[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_stackarg_float:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C7(2) # @f
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: lfs 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: li 10, 8
+; ASM64PWR4-NEXT: stfd 2, 120(1)
+; ASM64PWR4-NEXT: stfs 1, 112(1)
+; ASM64PWR4-NEXT: bl .test_stackarg_float[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f, align 4
%1 = load double, ptr @d, align 8
@@ -1101,89 +1065,51 @@ entry:
declare void @test_stackarg_float(i32, i32, i32, i32, i32, i32, i32, i32, float, double)
-; CHECK-LABEL: name: call_test_stackarg_float
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 32BIT-DAG: ADJCALLSTACKDOWN 68, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: $r10 = LI 8
-; 32BIT-DAG: renamable $r[[REGF:[0-9]+]] = LWZtoc @f, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f1 = LFS 0, killed renamable $r[[REGF]] :: (dereferenceable load (s32) from @f)
-; 32BIT-DAG: renamable $r[[REGD:[0-9]+]] = LWZtoc @d, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f2 = LFD 0, killed renamable $r[[REGD]] :: (dereferenceable load (s64) from @d)
-; 32BIT-DAG: STFS renamable $f1, 56, $r1 :: (store (s32))
-; 32BIT-DAG: STFD renamable $f2, 60, $r1 :: (store (s64))
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit killed $r10, implicit $f1, implicit $f2, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 68, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_stackarg_float:
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: li 9, 7
-; ASM32PWR4-DAG: li 10, 8
-; ASM32PWR4-DAG: lwz [[REGF:[0-9]+]], L..C8(2)
-; ASM32PWR4-DAG: lfs 1, 0([[REGF]])
-; ASM32PWR4-DAG: lwz [[REGD:[0-9]+]], L..C9(2)
-; ASM32PWR4-DAG: lfd 2, 0([[REGD:[0-9]+]])
-; ASM32PWR4-DAG: stfs 1, 56(1)
-; ASM32PWR4-DAG: stfd 2, 60(1)
-; ASM32PWR4-NEXT: bl .test_stackarg_float[PR]
-; ASM32PWR4-NEXT: nop
-; ASM32PWR4-NEXT: addi 1, 1, 80
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 64BIT-DAG: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: $x10 = LI8 8
-; 64BIT-DAG: renamable $x[[REGF:[0-9]+]] = LDtoc @f, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f1 = LFS 0, killed renamable $x[[REGF]] :: (dereferenceable load (s32) from @f)
-; 64BIT-DAG: renamable $x[[REGD:[0-9]+]] = LDtoc @d, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x[[REGD]] :: (dereferenceable load (s64) from @d)
-; 64BIT-DAG: STFS renamable $f1, 112, $x1 :: (store (s32))
-; 64BIT-DAG: STFD renamable $f2, 120, $x1 :: (store (s64))
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit killed $x10, implicit $f1, implicit $f2, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-DAG: li 3, 1
-; ASM64PWR4-DAG: li 4, 2
-; ASM64PWR4-DAG: li 5, 3
-; ASM64PWR4-DAG: li 6, 4
-; ASM64PWR4-DAG: li 7, 5
-; ASM64PWR4-DAG: li 8, 6
-; ASM64PWR4-DAG: li 9, 7
-; ASM64PWR4-DAG: li 10, 8
-; ASM64PWR4-DAG: ld [[REGF:[0-9]+]], L..C7(2)
-; ASM64PWR4-DAG: lfs 1, 0([[REGF]])
-; ASM64PWR4-DAG: ld [[REGD:[0-9]+]], L..C8(2)
-; ASM64PWR4-DAG: lfd 2, 0([[REGD]])
-; ASM64PWR4-DAG: stfs 1, 112(1)
-; ASM64PWR4-DAG: stfd 2, 120(1)
-; ASM64PWR4-NEXT: bl .test_stackarg_float[PR]
-; ASM64PWR4-NEXT: nop
-; ASM64PWR4-NEXT: addi 1, 1, 128
-
define void @call_test_stackarg_float2() {
+; ASM32PWR4-LABEL: call_test_stackarg_float2:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: lfd 1, 0(3)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: stfd 1, 56(1)
+; ASM32PWR4-NEXT: lwz 9, 56(1)
+; ASM32PWR4-NEXT: lwz 10, 60(1)
+; ASM32PWR4-NEXT: bl .test_stackarg_float2[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_stackarg_float2:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: lfd 1, 0(3)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: stfd 1, 120(1)
+; ASM64PWR4-NEXT: ld 9, 120(1)
+; ASM64PWR4-NEXT: bl .test_stackarg_float2[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load double, ptr @d, align 8
call void (i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, double %0)
@@ -1192,76 +1118,60 @@ entry:
declare void @test_stackarg_float2(i32, i32, i32, i32, i32, i32, ...)
-; CHECK-LABEL: name: call_test_stackarg_float2{{.*}}
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 32BIT-DAG: ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: renamable $r[[REG:[0-9]+]] = LWZtoc @d, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f1 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load (s64) from @d)
-; 32BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
-; 32BIT-DAG: renamable $r9 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
-; 32BIT-DAG: renamable $r10 = LWZ 4, %stack.0 :: (load (s32) from %stack.0 + 4)
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float2[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit $f1, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_stackarg_float2:
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM32PWR4: stwu 1, -64(1)
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: lwz [[REG:[0-9]+]], L..C9(2)
-; ASM32PWR4-DAG: lfd 1, 0([[REG]])
-; ASM32PWR4-DAG: stfd 1, 56(1)
-; ASM32PWR4-DAG: lwz 9, 56(1)
-; ASM32PWR4-DAG: lwz 10, 60(1)
-; ASM32PWR4-NEXT: bl .test_stackarg_float2[PR]
-; ASM32PWR4-NEXT: nop
-; ASM32PWR4-NEXT: addi 1, 1, 64
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; 64BIT-DAG: ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: renamable $x[[REG:[0-9]+]] = LDtoc @d, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f1 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load (s64) from @d)
-; 64BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
-; 64BIT-DAG: renamable $x9 = LD 0, %stack.0 :: (load (s64) from %stack.0)
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float2[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit $f1, implicit $x9, implicit $x2, implicit-def $r1
-; 64BIT-NEXT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-DAG: li 3, 1
-; ASM64PWR4-DAG: li 4, 2
-; ASM64PWR4-DAG: li 5, 3
-; ASM64PWR4-DAG: li 6, 4
-; ASM64PWR4-DAG: li 7, 5
-; ASM64PWR4-DAG: li 8, 6
-; ASM64PWR4-DAG: ld [[REG:[0-9]+]], L..C8(2)
-; ASM64PWR4-DAG: lfd 1, 0([[REG]])
-; ASM64PWR4-DAG: stfd 1, 120(1)
-; ASM64PWR4-DAG: ld 9, 120(1)
-; ASM64PWR4-NEXT: bl .test_stackarg_float2[PR]
-; ASM64PWR4-NEXT: nop
-; ASM64PWR4-NEXT: addi 1, 1, 128
-
; A double arg will pass on the stack in PPC32 if there is only one available GPR.
define void @call_test_stackarg_float3() {
+; ASM32PWR4-LABEL: call_test_stackarg_float3:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -80(1)
+; ASM32PWR4-NEXT: lwz 3, L..C9(2) # @d
+; ASM32PWR4-NEXT: stw 0, 88(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: lfd 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C8(2) # @f
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: stfd 1, 72(1)
+; ASM32PWR4-NEXT: lwz 10, 72(1)
+; ASM32PWR4-NEXT: lfs 2, 0(3)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stfs 2, 60(1)
+; ASM32PWR4-NEXT: stfd 1, 52(1)
+; ASM32PWR4-NEXT: bl .test_stackarg_float3[PR]
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 80
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_stackarg_float3:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C8(2) # @d
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: lfd 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C7(2) # @f
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: stfd 1, 120(1)
+; ASM64PWR4-NEXT: ld 10, 120(1)
+; ASM64PWR4-NEXT: lfs 2, 0(3)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: stfs 2, 112(1)
+; ASM64PWR4-NEXT: bl .test_stackarg_float3[PR]
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load double, ptr @d, align 8
%1 = load float, ptr @f, align 4
@@ -1271,94 +1181,79 @@ entry:
declare void @test_stackarg_float3(i32, i32, i32, i32, i32, i32, i32, ...)
-; CHECK-LABEL: name: call_test_stackarg_float3{{.*}}
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; In 32-bit the double arg is written to memory because it cannot be fully stored in the last 32-bit GPR.
-; 32BIT-DAG: ADJCALLSTACKDOWN 64, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: renamable $r[[REGD:[0-9]+]] = LWZtoc @d, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f1 = LFD 0, killed renamable $r[[REGD]] :: (dereferenceable load (s64) from @d)
-; 32BIT-DAG: renamable $r[[REGF:[0-9]+]] = LWZtoc @f, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f2 = LFS 0, killed renamable $r[[REGF]] :: (dereferenceable load (s32) from @f)
-; 32BIT-DAG: STFD renamable $f1, 52, $r1 :: (store (s64))
-; 32BIT-DAG: STFS renamable $f2, 60, $r1 :: (store (s32))
-; 32BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
-; 32BIT-DAG: renamable $r10 = LWZ 0, %stack.0 :: (load (s32) from %stack.0, align 8)
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_stackarg_float3[PR]>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit killed $r4, implicit killed $r5, implicit killed $r6, implicit killed $r7, implicit killed $r8, implicit killed $r9, implicit $f1, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1
-; 32BIT-NEXT: ADJCALLSTACKUP 64, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_stackarg_float3:
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM32PWR4: stwu 1, -80(1)
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: li 9, 7
-; ASM32PWR4-DAG: lwz [[REGD:[0-9]+]], L..C9(2)
-; ASM32PWR4-DAG: lfd 1, 0([[REGD]])
-; ASM32PWR4-DAG: lwz [[REGF:[0-9]+]], L..C8(2)
-; ASM32PWR4-DAG: lfs 2, 0([[REGF]])
-; ASM32PWR4-DAG: stfd 1, 52(1)
-; ASM32PWR4-DAG: stfs 2, 60(1)
-; ASM32PWR4-DAG: stfd 1, 72(1)
-; ASM32PWR4-DAG: lwz 10, 72(1)
-; ASM32PWR4-NEXT: bl .test_stackarg_float3[PR]
-; ASM32PWR4-NEXT: nop
-; ASM32PWR4-NEXT: addi 1, 1, 80
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; In 64-bit the double arg is not written to memory because it is fully stored in the last 64-bit GPR.
-; 64BIT-DAG: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: renamable $x[[REGD:[0-9]+]] = LDtoc @d, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f1 = LFD 0, killed renamable $x[[REGD]] :: (dereferenceable load (s64) from @d)
-; 64BIT-DAG: renamable $x[[REGF:[0-9]+]] = LDtoc @f, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f2 = LFS 0, killed renamable $x[[REGF]] :: (dereferenceable load (s32) from @f)
-; 64BIT-DAG: STFS renamable $f2, 112, $x1 :: (store (s32))
-; 64BIT-DAG: STFD renamable $f1, 0, %stack.0 :: (store (s64) into %stack.0)
-; 64BIT-DAG: renamable $x10 = LD 0, %stack.0 :: (load (s64) from %stack.0)
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_stackarg_float3[PR]>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit killed $x4, implicit killed $x5, implicit killed $x6, implicit killed $x7, implicit killed $x8, implicit killed $x9, implicit $f1, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1
-
-; 64BIT-NEXT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
-
-; The DAG block permits some invalid inputs for the benefit of allowing more valid orderings.
-; ASM64PWR4: stdu 1, -128(1)
-; ASM64PWR4-DAG: li 3, 1
-; ASM64PWR4-DAG: li 4, 2
-; ASM64PWR4-DAG: li 5, 3
-; ASM64PWR4-DAG: li 6, 4
-; ASM64PWR4-DAG: li 7, 5
-; ASM64PWR4-DAG: li 8, 6
-; ASM64PWR4-DAG: li 9, 7
-; ASM64PWR4-DAG: ld [[REGD:[0-9]+]], L..C8(2)
-; ASM64PWR4-DAG: lfd 1, 0([[REGD]])
-; ASM64PWR4-DAG: ld [[REGF:[0-9]+]], L..C7(2)
-; ASM64PWR4-DAG: lfs 2, 0([[REGF]])
-; ASM64PWR4-DAG: stfs 2, 112(1)
-; ASM64PWR4-DAG: stfd 1, 120(1)
-; ASM64PWR4-DAG: ld 10, 120(1)
-; ASM64PWR4-NEXT: bl .test_stackarg_float3[PR]
-; ASM64PWR4-NEXT: nop
-; ASM64PWR4-NEXT: addi 1, 1, 128
-
define i64 @test_ints_stack(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i64 %ll9, i16 signext %s10, i8 zeroext %c11, i32 %ui12, i32 %si13, i64 %ll14, i8 zeroext %uc15, i32 %i16) {
+; ASM32PWR4-LABEL: test_ints_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: add 3, 3, 4
+; ASM32PWR4-NEXT: lwz 11, 92(1)
+; ASM32PWR4-NEXT: add 3, 3, 5
+; ASM32PWR4-NEXT: add 3, 3, 6
+; ASM32PWR4-NEXT: add 3, 3, 7
+; ASM32PWR4-NEXT: lwz 12, 76(1)
+; ASM32PWR4-NEXT: add 3, 3, 8
+; ASM32PWR4-NEXT: add 3, 3, 9
+; ASM32PWR4-NEXT: lwz 6, 60(1)
+; ASM32PWR4-NEXT: add 3, 3, 10
+; ASM32PWR4-NEXT: srawi 5, 11, 31
+; ASM32PWR4-NEXT: srawi 8, 3, 31
+; ASM32PWR4-NEXT: lwz 4, 64(1)
+; ASM32PWR4-NEXT: lwz 7, 56(1)
+; ASM32PWR4-NEXT: stw 31, -4(1) # 4-byte Folded Spill
+; ASM32PWR4-NEXT: srawi 31, 12, 31
+; ASM32PWR4-NEXT: addc 3, 3, 6
+; ASM32PWR4-NEXT: adde 7, 8, 7
+; ASM32PWR4-NEXT: lwz 6, 68(1)
+; ASM32PWR4-NEXT: srawi 8, 4, 31
+; ASM32PWR4-NEXT: addc 3, 3, 4
+; ASM32PWR4-NEXT: adde 7, 7, 8
+; ASM32PWR4-NEXT: lwz 4, 72(1)
+; ASM32PWR4-NEXT: addc 3, 3, 6
+; ASM32PWR4-NEXT: addze 6, 7
+; ASM32PWR4-NEXT: addc 3, 3, 4
+; ASM32PWR4-NEXT: lwz 0, 84(1)
+; ASM32PWR4-NEXT: addze 4, 6
+; ASM32PWR4-NEXT: addc 3, 3, 12
+; ASM32PWR4-NEXT: lwz 7, 80(1)
+; ASM32PWR4-NEXT: adde 4, 4, 31
+; ASM32PWR4-NEXT: addc 3, 3, 0
+; ASM32PWR4-NEXT: lwz 6, 88(1)
+; ASM32PWR4-NEXT: adde 4, 4, 7
+; ASM32PWR4-NEXT: addc 3, 3, 6
+; ASM32PWR4-NEXT: lwz 31, -4(1) # 4-byte Folded Reload
+; ASM32PWR4-NEXT: addze 6, 4
+; ASM32PWR4-NEXT: addc 4, 3, 11
+; ASM32PWR4-NEXT: adde 3, 6, 5
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_ints_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: ld 4, 112(1)
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: add 3, 3, 6
+; ASM64PWR4-NEXT: add 3, 3, 7
+; ASM64PWR4-NEXT: lwa 12, 124(1)
+; ASM64PWR4-NEXT: add 3, 3, 8
+; ASM64PWR4-NEXT: add 3, 3, 9
+; ASM64PWR4-NEXT: add 3, 3, 10
+; ASM64PWR4-NEXT: extsw 3, 3
+; ASM64PWR4-NEXT: lwz 5, 132(1)
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: add 3, 3, 12
+; ASM64PWR4-NEXT: std 31, -8(1) # 8-byte Folded Spill
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: lwz 31, 140(1)
+; ASM64PWR4-NEXT: lwa 11, 148(1)
+; ASM64PWR4-NEXT: add 3, 3, 31
+; ASM64PWR4-NEXT: add 3, 3, 11
+; ASM64PWR4-NEXT: ld 4, 152(1)
+; ASM64PWR4-NEXT: lwz 0, 164(1)
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: lwa 5, 172(1)
+; ASM64PWR4-NEXT: add 3, 3, 0
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: ld 31, -8(1) # 8-byte Folded Reload
+; ASM64PWR4-NEXT: blr
entry:
%add = add nsw i32 %i1, %i2
%add1 = add nsw i32 %add, %i3
@@ -1385,79 +1280,6 @@ entry:
ret i64 %add20
}
-; CHECK-LABEL: name: test_ints_stack
-
-; 32BIT-LABEL: liveins:
-; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
-
-; 32BIT-LABEL: fixedStack:
-; 32BIT-DAG: - { id: 9, type: default, offset: 56, size: 4
-; 32BIT-DAG: - { id: 8, type: default, offset: 60, size: 4
-; 32BIT-DAG: - { id: 7, type: default, offset: 64, size: 4
-; 32BIT-DAG: - { id: 6, type: default, offset: 68, size: 4
-; 32BIT-DAG: - { id: 5, type: default, offset: 72, size: 4
-; 32BIT-DAG: - { id: 4, type: default, offset: 76, size: 4
-; 32BIT-DAG: - { id: 3, type: default, offset: 80, size: 4
-; 32BIT-DAG: - { id: 2, type: default, offset: 84, size: 4
-; 32BIT-DAG: - { id: 1, type: default, offset: 88, size: 4
-; 32BIT-DAG: - { id: 0, type: default, offset: 92, size: 4
-
-; 32BIT-LABEL: body: |
-; 32BIT-DAG: bb.0.entry:
-; 32BIT-DAG: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
-
-; 64BIT-LABEL: liveins:
-; 64BIT-DAG: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
-
-; 64BIT-LABEL: fixedStack:
-; 64BIT-DAG: - { id: 7, type: default, offset: 112, size: 8
-; 64BIT-DAG: - { id: 6, type: default, offset: 124, size: 4
-; 64BIT-DAG: - { id: 5, type: default, offset: 132, size: 4
-; 64BIT-DAG: - { id: 4, type: default, offset: 140, size: 4
-; 64BIT-DAG: - { id: 3, type: default, offset: 148, size: 4
-; 64BIT-DAG: - { id: 2, type: default, offset: 152, size: 8
-; 64BIT-DAG: - { id: 1, type: default, offset: 164, size: 4
-; 64BIT-DAG: - { id: 0, type: default, offset: 172, size: 4
-; 64BIT-DAG: body: |
-; 64BIT-DAG: bb.0.entry:
-; 64BIT-DAG: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
-
-; CHECKASM-LABEL: .test_ints_stack:
-
-; ASM32PWR4-DAG: lwz [[REG1:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: lwz [[REG2:[0-9]+]], 60(1)
-; ASM32PWR4-DAG: lwz [[REG3:[0-9]+]], 64(1)
-; ASM32PWR4-DAG: lwz [[REG4:[0-9]+]], 68(1)
-; ASM32PWR4-DAG: lwz [[REG5:[0-9]+]], 72(1)
-; ASM32PWR4-DAG: lwz [[REG6:[0-9]+]], 76(1)
-; ASM32PWR4-DAG: lwz [[REG7:[0-9]+]], 80(1)
-; ASM32PWR4-DAG: lwz [[REG8:[0-9]+]], 84(1)
-; ASM32PWR4-DAG: lwz [[REG9:[0-9]+]], 88(1)
-; ASM32PWR4-DAG: lwz [[REG10:[0-9]+]], 92(1)
-
-; ASM64PWR4-DAG: ld [[REG1:[0-9]+]], 112(1)
-; ASM64PWR4-DAG: lwa [[REG2:[0-9]+]], 124(1)
-; ASM64PWR4-DAG: lwz [[REG3:[0-9]+]], 132(1)
-; ASM64PWR4-DAG: lwz [[REG4:[0-9]+]], 140(1)
-; ASM64PWR4-DAG: lwa [[REG5:[0-9]+]], 148(1)
-; ASM64PWR4-DAG: ld [[REG6:[0-9]+]], 152(1)
-; ASM64PWR4-DAG: lwz [[REG7:[0-9]+]], 164(1)
-; ASM64PWR4-DAG: lwa [[REG8:[0-9]+]], 172(1)
-
@ll1 = common global i64 0, align 8
@si1 = common global i16 0, align 2
@ch = common global i8 0, align 1
@@ -1468,6 +1290,97 @@ entry:
@i1 = common global i32 0, align 4
define void @caller_ints_stack() {
+; ASM32PWR4-LABEL: caller_ints_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -96(1)
+; ASM32PWR4-NEXT: lwz 3, L..C10(2) # @si1
+; ASM32PWR4-NEXT: stw 0, 104(1)
+; ASM32PWR4-NEXT: lwz 4, L..C11(2) # @ch
+; ASM32PWR4-NEXT: lwz 6, L..C12(2) # @sint
+; ASM32PWR4-NEXT: lwz 8, L..C13(2) # @ll2
+; ASM32PWR4-NEXT: lwz 10, L..C14(2) # @uc1
+; ASM32PWR4-NEXT: lwz 12, L..C15(2) # @i1
+; ASM32PWR4-NEXT: lha 5, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C16(2) # @ll1
+; ASM32PWR4-NEXT: lwz 11, 0(3)
+; ASM32PWR4-NEXT: lwz 7, 4(3)
+; ASM32PWR4-NEXT: lwz 3, L..C17(2) # @ui
+; ASM32PWR4-NEXT: lbz 4, 0(4)
+; ASM32PWR4-NEXT: lwz 3, 0(3)
+; ASM32PWR4-NEXT: lwz 6, 0(6)
+; ASM32PWR4-NEXT: lwz 9, 0(8)
+; ASM32PWR4-NEXT: lwz 8, 4(8)
+; ASM32PWR4-NEXT: lbz 10, 0(10)
+; ASM32PWR4-NEXT: lwz 12, 0(12)
+; ASM32PWR4-NEXT: stw 10, 88(1)
+; ASM32PWR4-NEXT: li 10, 8
+; ASM32PWR4-NEXT: stw 8, 84(1)
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: stw 9, 80(1)
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: stw 6, 76(1)
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: stw 3, 72(1)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stw 4, 68(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: stw 5, 64(1)
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: stw 7, 60(1)
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: stw 12, 92(1)
+; ASM32PWR4-NEXT: stw 11, 56(1)
+; ASM32PWR4-NEXT: bl .test_ints_stack
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 96
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: caller_ints_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -176(1)
+; ASM64PWR4-NEXT: ld 3, L..C9(2) # @si1
+; ASM64PWR4-NEXT: std 0, 192(1)
+; ASM64PWR4-NEXT: ld 4, L..C10(2) # @ch
+; ASM64PWR4-NEXT: ld 6, L..C11(2) # @ll2
+; ASM64PWR4-NEXT: ld 8, L..C12(2) # @uc1
+; ASM64PWR4-NEXT: ld 9, L..C13(2) # @i1
+; ASM64PWR4-NEXT: li 10, 8
+; ASM64PWR4-NEXT: lha 7, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C14(2) # @ll1
+; ASM64PWR4-NEXT: ld 11, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C15(2) # @ui
+; ASM64PWR4-NEXT: lbz 5, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C16(2) # @sint
+; ASM64PWR4-NEXT: lwz 3, 0(3)
+; ASM64PWR4-NEXT: lwz 4, 0(4)
+; ASM64PWR4-NEXT: ld 6, 0(6)
+; ASM64PWR4-NEXT: lbz 8, 0(8)
+; ASM64PWR4-NEXT: lwz 9, 0(9)
+; ASM64PWR4-NEXT: std 9, 168(1)
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: std 8, 160(1)
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: std 6, 152(1)
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: std 4, 144(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: std 3, 136(1)
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: std 5, 128(1)
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: std 7, 120(1)
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: std 11, 112(1)
+; ASM64PWR4-NEXT: bl .test_ints_stack
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 176
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load i64, ptr @ll1, align 8
%1 = load i16, ptr @si1, align 2
@@ -1481,267 +1394,123 @@ entry:
ret void
}
-; CHECK-LABEL: name: caller_ints_stack
-
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: $r10 = LI 8
-; 32BIT-DAG: renamable $r[[REGLL1ADDR:[0-9]+]] = LWZtoc @ll1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGLL1A:[0-9]+]] = LWZ 0, renamable $r[[REGLL1ADDR]] :: (dereferenceable load (s32) from @ll1, align 8)
-; 32BIT-DAG: renamable $r[[REGLL1B:[0-9]+]] = LWZ 4, killed renamable $r[[REGLL1ADDR]] :: (dereferenceable load (s32) from @ll1 + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REGLL1A]], 56, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REGLL1B]], 60, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGSIADDR:[0-9]+]] = LWZtoc @si1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGSI:[0-9]+]] = LHA 0, killed renamable $r[[REGSIADDR]] :: (dereferenceable load (s16) from @si1)
-; 32BIT-DAG: STW killed renamable $r[[REGSI]], 64, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGCHADDR:[0-9]+]] = LWZtoc @ch, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGCH:[0-9]+]] = LBZ 0, killed renamable $r[[REGCHADDR]] :: (dereferenceable load (s8) from @ch)
-; 32BIT-DAG: STW killed renamable $r[[REGCH]], 68, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGUIADDR:[0-9]+]] = LWZtoc @ui, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGUI:[0-9]+]] = LWZ 0, killed renamable $r[[REGUIADDR]] :: (dereferenceable load (s32) from @ui)
-; 32BIT-DAG: STW killed renamable $r[[REGUI]], 72, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGSIADDR:[0-9]+]] = LWZtoc @sint, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGSI:[0-9]+]] = LWZ 0, killed renamable $r[[REGSIADDR]] :: (dereferenceable load (s32) from @sint)
-; 32BIT-DAG: STW killed renamable $r[[REGSI]], 76, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGLL2ADDR:[0-9]+]] = LWZtoc @ll2, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGLL2A:[0-9]+]] = LWZ 0, renamable $r[[REGLL2ADDR]] :: (dereferenceable load (s32) from @ll2, align 8)
-; 32BIT-DAG: renamable $r[[REGLL2B:[0-9]+]] = LWZ 4, killed renamable $r[[REGLL2ADDR]] :: (dereferenceable load (s32) from @ll2 + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REGLL2A]], 80, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REGLL2B]], 84, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGUCADDR:[0-9]+]] = LWZtoc @uc1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGUC:[0-9]+]] = LBZ 0, killed renamable $r[[REGUCADDR]] :: (dereferenceable load (s8) from @uc1)
-; 32BIT-DAG: STW killed renamable $r[[REGUC]], 88, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGIADDR:[0-9]+]] = LWZtoc @i1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[REGI:[0-9]+]] = LWZ 0, killed renamable $r[[REGIADDR]] :: (dereferenceable load (s32) from @i1)
-; 32BIT-DAG: STW killed renamable $r[[REGI]], 92, $r1 :: (store (s32))
-; 32BIT-DAG: ADJCALLSTACKDOWN 96, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_ints_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1, implicit-def dead $r3
-; 32BIT-NEXT: ADJCALLSTACKUP 96, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: $x10 = LI8 8
-; 64BIT-DAG: renamable $x[[REGLL1ADDR:[0-9]+]] = LDtoc @ll1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGLL1:[0-9]+]] = LD 0, killed renamable $x[[REGLL1ADDR]] :: (dereferenceable load (s64) from @ll1)
-; 64BIT-DAG: STD killed renamable $x[[REGLL1]], 112, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGSIADDR:[0-9]+]] = LDtoc @si1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGSI:[0-9]+]] = LHA8 0, killed renamable $x[[REGSIADDR]] :: (dereferenceable load (s16) from @si1)
-; 64BIT-DAG: STD killed renamable $x[[REGSI]], 120, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGCHADDR:[0-9]+]] = LDtoc @ch, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGCH:[0-9]+]] = LBZ8 0, killed renamable $x[[REGCHADDR]] :: (dereferenceable load (s8) from @ch)
-; 64BIT-DAG: STD killed renamable $x[[REGCH]], 128, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGUIADDR:[0-9]+]] = LDtoc @ui, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGUI:[0-9]+]] = LWZ8 0, killed renamable $x[[REGUIADDR]] :: (dereferenceable load (s32) from @ui)
-; 64BIT-DAG: STD killed renamable $x[[REGUI]], 136, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGSIADDR:[0-9]+]] = LDtoc @sint, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGSI:[0-9]+]] = LWZ8 0, killed renamable $x[[REGSIADDR]] :: (dereferenceable load (s32) from @sint)
-; 64BIT-DAG: STD killed renamable $x[[REGSI]], 144, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGLL2ADDR:[0-9]+]] = LDtoc @ll2, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGLL2:[0-9]+]] = LD 0, killed renamable $x[[REGLL2ADDR]] :: (dereferenceable load (s64) from @ll2)
-; 64BIT-DAG: STD killed renamable $x[[REGLL2]], 152, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGUCADDR:[0-9]+]] = LDtoc @uc1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGUC:[0-9]+]] = LBZ8 0, killed renamable $x[[REGUCADDR]] :: (dereferenceable load (s8) from @uc1)
-; 64BIT-DAG: STD killed renamable $x[[REGUC]], 160, $x1 :: (store (s64))
-; 64BIT-DAG: renamable $x[[REGIADDR:[0-9]+]] = LDtoc @i1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGI:[0-9]+]] = LWZ8 0, killed renamable $x[[REGIADDR]] :: (dereferenceable load (s32) from @i1)
-; 64BIT-DAG: STD killed renamable $x[[REGI]], 168, $x1 :: (store (s64))
-; 64BIT-DAG: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: BL8_NOP <mcsymbol .test_ints_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1, implicit-def dead $x3
-; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
-
-; CHECKASM-LABEL: .caller_ints_stack:
-
-; ASM32PWR4: mflr 0
-; ASM32PWR4-NEXT: stwu 1, -96(1)
-; ASM32PWR4-DAG: stw 0, 104(1)
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 9, 7
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: li 10, 8
-; ASM32PWR4-DAG: lwz [[REG1:[0-9]+]], L..C10(2)
-; ASM32PWR4-DAG: lwz [[REG2:[0-9]+]], L..C11(2)
-; ASM32PWR4-DAG: lwz [[REG3:[0-9]+]], L..C12(2)
-; ASM32PWR4-DAG: lwz [[REG4:[0-9]+]], L..C13(2)
-; ASM32PWR4-DAG: lwz [[REG5:[0-9]+]], L..C14(2)
-; ASM32PWR4-DAG: lwz [[REG6:[0-9]+]], L..C15(2)
-; ASM32PWR4-DAG: lwz [[REG7:[0-9]+]], L..C16(2)
-; ASM32PWR4-DAG: lwz [[REG8:[0-9]+]], L..C17(2)
-; ASM32PWR4-DAG: lha 5, 0([[REG1]])
-; ASM32PWR4-DAG: lwz 11, 0([[REG7]])
-; ASM32PWR4-DAG: lwz 7, 4([[REG7]])
-; ASM32PWR4-DAG: lbz 4, 0([[REG2]])
-; ASM32PWR4-DAG: lwz 3, 0([[REG8]])
-; ASM32PWR4-DAG: lwz 6, 0([[REG3]])
-; ASM32PWR4-DAG: lwz 9, 0([[REG4]])
-; ASM32PWR4-DAG: lwz 8, 4([[REG4]])
-; ASM32PWR4-DAG: lbz 10, 0([[REG5]])
-; ASM32PWR4-DAG: lwz 12, 0([[REG6]])
-; ASM32PWR4-DAG: stw 11, 56(1)
-; ASM32PWR4-DAG: stw 7, 60(1)
-; ASM32PWR4-DAG: stw 5, 64(1)
-; ASM32PWR4-DAG: stw 4, 68(1)
-; ASM32PWR4-DAG: stw 3, 72(1)
-; ASM32PWR4-DAG: stw 6, 76(1)
-; ASM32PWR4-DAG: stw 9, 80(1)
-; ASM32PWR4-DAG: stw 8, 84(1)
-; ASM32PWR4-DAG: stw 10, 88(1)
-; ASM32PWR4-DAG: stw 12, 92(1)
-; ASM32PWR4-DAG: bl .test_ints_stack
-; ASM32PWR4-DAG: nop
-; ASM32PWR4-DAG: addi 1, 1, 96
-; ASM32PWR4-DAG: lwz 0, 8(1)
-; ASM32PWR4-NEXT: mtlr 0
-; ASM32PWR4-NEXT: blr
-
-; ASM64PWR4: mflr 0
-; ASM64PWR4-NEXT: stdu 1, -176(1)
-; ASM64PWR4-DAG: std 0, 192(1)
-; ASM64PWR4-DAG: li 3, 1
-; ASM64PWR4-DAG: li 4, 2
-; ASM64PWR4-DAG: li 5, 3
-; ASM64PWR4-DAG: li 6, 4
-; ASM64PWR4-DAG: li 7, 5
-; ASM64PWR4-DAG: li 8, 6
-; ASM64PWR4-DAG: li 9, 7
-; ASM64PWR4-DAG: li 10, 8
-; ASM64PWR4-DAG: ld [[REG1:[0-9]+]], L..C9(2)
-; ASM64PWR4-DAG: ld [[REG2:[0-9]+]], L..C10(2)
-; ASM64PWR4-DAG: ld [[REG3:[0-9]+]], L..C11(2)
-; ASM64PWR4-DAG: ld [[REG4:[0-9]+]], L..C12(2)
-; ASM64PWR4-DAG: ld [[REG5:[0-9]+]], L..C13(2)
-; ASM64PWR4-DAG: ld [[REG6:[0-9]+]], L..C14(2)
-; ASM64PWR4-DAG: ld [[REG7:[0-9]+]], L..C15(2)
-; ASM64PWR4-DAG: ld [[REG8:[0-9]+]], L..C16(2)
-; ASM64PWR4-DAG: lha 7, 0([[REG1]])
-; ASM64PWR4-DAG: lbz 5, 0([[REG2]])
-; ASM64PWR4-DAG: ld 6, 0([[REG3]])
-; ASM64PWR4-DAG: lbz 8, 0([[REG4]])
-; ASM64PWR4-DAG: lwz 9, 0([[REG5]])
-; ASM64PWR4-DAG: ld 11, 0([[REG6]])
-; ASM64PWR4-DAG: lwz 3, 0([[REG7]])
-; ASM64PWR4-DAG: lwz 4, 0([[REG8]])
-; ASM64PWR4-DAG: std 11, 112(1)
-; ASM64PWR4-DAG: std 7, 120(1)
-; ASM64PWR4-DAG: std 5, 128(1)
-; ASM64PWR4-DAG: std 3, 136(1)
-; ASM64PWR4-DAG: std 4, 144(1)
-; ASM64PWR4-DAG: std 6, 152(1)
-; ASM64PWR4-DAG: std 8, 160(1)
-; ASM64PWR4-DAG: std 9, 168(1)
-; ASM64PWR4-NEXT: bl .test_ints_stack
-; ASM64PWR4-NEXT: nop
-; ASM64PWR4-NEXT: addi 1, 1, 176
-; ASM64PWR4-NEXT: ld 0, 16(1)
-; ASM64PWR4-NEXT: mtlr 0
-; ASM64PWR4-NEXT: blr
-
@globali1 = global i8 0, align 1
define void @test_i1_stack(i32 %a, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 zeroext %b) {
+; ASM32PWR4-LABEL: test_i1_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: lbz 3, 59(1)
+; ASM32PWR4-NEXT: lwz 4, L..C18(2) # @globali1
+; ASM32PWR4-NEXT: stb 3, 0(4)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_i1_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: lbz 3, 119(1)
+; ASM64PWR4-NEXT: ld 4, L..C17(2) # @globali1
+; ASM64PWR4-NEXT: stb 3, 0(4)
+; ASM64PWR4-NEXT: blr
entry:
%frombool = zext i1 %b to i8
store i8 %frombool, ptr @globali1, align 1
ret void
}
-; CHECK-LABEL: name: test_i1_stack
-
-; 32BIT-LABEL: fixedStack:
-; 32BIT-DAG: - { id: 0, type: default, offset: 59, size: 1
-; 32BIT-DAG: body: |
-; 32BIT-DAG: bb.0.entry:
-; 32BIT-DAG: renamable $r[[REGB:[0-9]+]] = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-stack.0)
-; 32BIT-DAG: renamable $r[[REGBTOC:[0-9]+]] = LWZtoc @globali1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: STB killed renamable $r[[REGB]], 0, killed renamable $r[[REGBTOC]] :: (store (s8) into @globali1)
-
-; 64BIT-LABEL: fixedStack:
-; 64BIT-DAG: - { id: 0, type: default, offset: 119, size: 1
-; 64BIT-DAG: body: |
-; 64BIT-DAG: bb.0.entry:
-; 64BIT-DAG: renamable $r[[REGB:[0-9]+]] = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-stack.0)
-; 64BIT-DAG: renamable $x[[REGBTOC:[0-9]+]] = LDtoc @globali1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: STB killed renamable $r[[SCRATCHREG:[0-9]+]], 0, killed renamable $x[[REGBTOC]] :: (store (s8) into @globali1)
-; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm
-
-; CHECKASM-LABEL: test_i1_stack:
-
-; ASM32PWR4-DAG: lbz [[REGB:[0-9]+]], 59(1)
-; ASM32PWR4-DAG: lwz [[REGBTOC:[0-9]+]], L..C18(2)
-; ASM32PWR4-DAG: stb [[SCRATCHREG:[0-9]+]], 0([[REGBTOC]])
-; ASM32PWR4-DAG: blr
-
-; ASM64PWR4-DAG: lbz [[REGB:[0-9]+]], 119(1)
-; ASM64PWR4-DAG: ld [[REGBTOC:[0-9]+]], L..C17(2)
-; ASM64PWR4-DAG: stb [[SCRATCHREG:[0-9]+]], 0([[REGBTOC]])
-; ASM64PWR4-DAG: blr
-
define void @call_test_i1_stack() {
+; ASM32PWR4-LABEL: call_test_i1_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -64(1)
+; ASM32PWR4-NEXT: li 11, 1
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stw 0, 72(1)
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: stw 11, 56(1)
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: li 10, 8
+; ASM32PWR4-NEXT: bl .test_i1_stack
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 64
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: call_test_i1_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: li 11, 1
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: std 11, 112(1)
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: li 10, 8
+; ASM64PWR4-NEXT: bl .test_i1_stack
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
call void @test_i1_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i1 true)
ret void
}
-; CHECK-LABEL: name: call_test_i1_stack
-
-; 32BIT-DAG: ADJCALLSTACKDOWN 60, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: $r10 = LI 8
-; 32BIT-DAG: renamable $r[[REGBOOLADDR:[0-9]+]] = LI 1
-; 32BIT-DAG: STW killed renamable $r[[REGBOOLADDR]], 56, $r1 :: (store (s32))
-; 32BIT-DAG: BL_NOP <mcsymbol .test_i1_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
-; 32BIT-DAG: ADJCALLSTACKUP 60, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT-DAG: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: $x10 = LI8 8
-; 64BIT-DAG: renamable $x[[REGBOOLADDR:[0-9]+]] = LI8 1
-; 64BIT-DAG: STD killed renamable $x[[REGBOOLADDR]], 112, $x1 :: (store (s64))
-; 64BIT-DAG: BL8_NOP <mcsymbol .test_i1_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
-; 64BIT-DAG: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
-
-; CHECKASM-LABEL: .call_test_i1_stack:
-
-; ASM32PWR4-DAG: mflr 0
-; ASM32PWR4-DAG: li 3, 1
-; ASM32PWR4-DAG: li 4, 2
-; ASM32PWR4-DAG: li 5, 3
-; ASM32PWR4-DAG: li 6, 4
-; ASM32PWR4-DAG: li 7, 5
-; ASM32PWR4-DAG: li 8, 6
-; ASM32PWR4-DAG: li 9, 7
-; ASM32PWR4-DAG: li 10, 8
-; ASM32PWR4-DAG: stw [[REGB:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: li [[REGB]], 1
-; ASM32PWR4-DAG: bl .test_i1
-
define double @test_fpr_stack(double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %s10, double %l11, double %d12, double %d13, float %f14, double %d15, float %f16) {
+; ASM32PWR4-LABEL: test_fpr_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: fadd 0, 1, 2
+; ASM32PWR4-NEXT: lfs 1, 128(1)
+; ASM32PWR4-NEXT: fadd 0, 0, 3
+; ASM32PWR4-NEXT: lfd 2, 132(1)
+; ASM32PWR4-NEXT: fadd 0, 0, 4
+; ASM32PWR4-NEXT: fadd 0, 0, 5
+; ASM32PWR4-NEXT: fadd 0, 0, 6
+; ASM32PWR4-NEXT: fadd 0, 0, 7
+; ASM32PWR4-NEXT: fadd 0, 0, 8
+; ASM32PWR4-NEXT: fadd 0, 0, 9
+; ASM32PWR4-NEXT: fadd 0, 0, 10
+; ASM32PWR4-NEXT: fadd 0, 0, 11
+; ASM32PWR4-NEXT: fadd 0, 0, 12
+; ASM32PWR4-NEXT: fadd 0, 0, 13
+; ASM32PWR4-NEXT: fadd 0, 0, 13
+; ASM32PWR4-NEXT: fadd 0, 0, 1
+; ASM32PWR4-NEXT: lfs 1, 140(1)
+; ASM32PWR4-NEXT: fadd 0, 0, 2
+; ASM32PWR4-NEXT: fadd 1, 0, 1
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: test_fpr_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: fadd 0, 1, 2
+; ASM64PWR4-NEXT: lfs 1, 152(1)
+; ASM64PWR4-NEXT: fadd 0, 0, 3
+; ASM64PWR4-NEXT: lfd 2, 160(1)
+; ASM64PWR4-NEXT: fadd 0, 0, 4
+; ASM64PWR4-NEXT: fadd 0, 0, 5
+; ASM64PWR4-NEXT: fadd 0, 0, 6
+; ASM64PWR4-NEXT: fadd 0, 0, 7
+; ASM64PWR4-NEXT: fadd 0, 0, 8
+; ASM64PWR4-NEXT: fadd 0, 0, 9
+; ASM64PWR4-NEXT: fadd 0, 0, 10
+; ASM64PWR4-NEXT: fadd 0, 0, 11
+; ASM64PWR4-NEXT: fadd 0, 0, 12
+; ASM64PWR4-NEXT: fadd 0, 0, 13
+; ASM64PWR4-NEXT: fadd 0, 0, 13
+; ASM64PWR4-NEXT: fadd 0, 0, 1
+; ASM64PWR4-NEXT: lfs 1, 168(1)
+; ASM64PWR4-NEXT: fadd 0, 0, 2
+; ASM64PWR4-NEXT: fadd 1, 0, 1
+; ASM64PWR4-NEXT: blr
entry:
%add = fadd double %d1, %d2
%add1 = fadd double %add, %d3
@@ -1764,57 +1533,182 @@ define double @test_fpr_stack(double %d1, double %d2, double %d3, double %d4, do
ret double %add16
}
-; CHECK-LABEL: name: test_fpr_stack{{.*}}
-
-; CHECK-LABEL: liveins:
-; CHECK-DAG: - { reg: '$f1', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f2', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f3', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f4', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f5', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f6', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f7', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f8', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f9', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f10', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f11', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f12', virtual-reg: '' }
-; CHECK-DAG: - { reg: '$f13', virtual-reg: '' }
-
-; CHECK-LABEL: fixedStack:
-; 32BIT-DAG: - { id: 2, type: default, offset: 128, size: 4
-; 32BIT-DAG: - { id: 1, type: default, offset: 132, size: 8
-; 32BIT-DAG: - { id: 0, type: default, offset: 140, size: 4
-
-; 64BIT-DAG: - { id: 2, type: default, offset: 152, size: 4
-; 64BIT-DAG: - { id: 1, type: default, offset: 160, size: 8
-; 64BIT-DAG: - { id: 0, type: default, offset: 168, size: 4
-
-; CHECK-LABEL: body: |
-; CHECK-DAG: bb.0.entry:
-; CHECK-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
-
-; CHECKASM-LABEL: .test_fpr_stack:
-
-; ASM32PWR4-DAG: lfs [[REG1:[0-9]+]], 128(1)
-; ASM32PWR4-DAG: lfd [[REG2:[0-9]+]], 132(1)
-; ASM32PWR4-DAG: lfs [[REG3:[0-9]+]], 140(1)
-; ASM32PWR4-DAG: fadd 0, 0, [[REG1]]
-; ASM32PWR4-DAG: fadd 0, 0, [[REG2]]
-; ASM32PWR4-DAG: fadd 1, 0, [[REG3]]
-
-; ASM64PWR4-DAG: lfs [[REG1:[0-9]+]], 152(1)
-; ASM64PWR4-DAG: lfd [[REG2:[0-9]+]], 160(1)
-; ASM64PWR4-DAG: lfs [[REG3:[0-9]+]], 168(1)
-; ASM64PWR4-DAG: fadd 0, 0, [[REG1]]
-; ASM64PWR4-DAG: fadd 0, 0, [[REG2]]
-; ASM64PWR4-DAG: fadd 1, 0, [[REG3]]
-
@f14 = common global float 0.000000e+00, align 4
@d15 = common global double 0.000000e+00, align 8
@f16 = common global float 0.000000e+00, align 4
define void @caller_fpr_stack() {
+; ASM32PWR4-LABEL: caller_fpr_stack:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -144(1)
+; ASM32PWR4-NEXT: lwz 3, L..C19(2) # @d15
+; ASM32PWR4-NEXT: lwz 4, L..C20(2) # @f14
+; ASM32PWR4-NEXT: lwz 5, L..C21(2) # @f16
+; ASM32PWR4-NEXT: stw 0, 152(1)
+; ASM32PWR4-NEXT: lis 6, 16361
+; ASM32PWR4-NEXT: ori 6, 6, 39321
+; ASM32PWR4-NEXT: lfd 0, 0(3)
+; ASM32PWR4-NEXT: lwz 3, 0(4)
+; ASM32PWR4-NEXT: lwz 4, 0(5)
+; ASM32PWR4-NEXT: li 5, 0
+; ASM32PWR4-NEXT: stw 5, 60(1)
+; ASM32PWR4-NEXT: lis 5, 16352
+; ASM32PWR4-NEXT: stw 5, 56(1)
+; ASM32PWR4-NEXT: lis 5, 13107
+; ASM32PWR4-NEXT: ori 5, 5, 13107
+; ASM32PWR4-NEXT: stw 5, 68(1)
+; ASM32PWR4-NEXT: lis 5, 16355
+; ASM32PWR4-NEXT: ori 5, 5, 13107
+; ASM32PWR4-NEXT: stw 5, 64(1)
+; ASM32PWR4-NEXT: lis 5, 26214
+; ASM32PWR4-NEXT: ori 5, 5, 26214
+; ASM32PWR4-NEXT: stw 5, 76(1)
+; ASM32PWR4-NEXT: lis 5, 16358
+; ASM32PWR4-NEXT: ori 5, 5, 26214
+; ASM32PWR4-NEXT: stw 5, 72(1)
+; ASM32PWR4-NEXT: lis 5, -26215
+; ASM32PWR4-NEXT: ori 5, 5, 39322
+; ASM32PWR4-NEXT: stw 5, 84(1)
+; ASM32PWR4-NEXT: stw 5, 100(1)
+; ASM32PWR4-NEXT: lis 5, 16313
+; ASM32PWR4-NEXT: ori 5, 5, 39321
+; ASM32PWR4-NEXT: stw 5, 96(1)
+; ASM32PWR4-NEXT: lis 5, -15729
+; ASM32PWR4-NEXT: ori 5, 5, 23593
+; ASM32PWR4-NEXT: stw 5, 108(1)
+; ASM32PWR4-NEXT: lis 5, 16316
+; ASM32PWR4-NEXT: ori 5, 5, 10485
+; ASM32PWR4-NEXT: stw 5, 104(1)
+; ASM32PWR4-NEXT: lis 5, -5243
+; ASM32PWR4-NEXT: ori 5, 5, 7864
+; ASM32PWR4-NEXT: stw 5, 116(1)
+; ASM32PWR4-NEXT: lis 5, 16318
+; ASM32PWR4-NEXT: ori 5, 5, 47185
+; ASM32PWR4-NEXT: stw 6, 80(1)
+; ASM32PWR4-NEXT: lis 6, -13108
+; ASM32PWR4-NEXT: ori 6, 6, 52429
+; ASM32PWR4-NEXT: stw 5, 112(1)
+; ASM32PWR4-NEXT: lis 5, 2621
+; ASM32PWR4-NEXT: ori 5, 5, 28836
+; ASM32PWR4-NEXT: stw 6, 92(1)
+; ASM32PWR4-NEXT: lis 6, 16364
+; ASM32PWR4-NEXT: ori 6, 6, 52428
+; ASM32PWR4-NEXT: stw 5, 124(1)
+; ASM32PWR4-NEXT: lis 5, 16320
+; ASM32PWR4-NEXT: ori 5, 5, 41943
+; ASM32PWR4-NEXT: stw 6, 88(1)
+; ASM32PWR4-NEXT: lwz 6, L..C22(2) # %const.0
+; ASM32PWR4-NEXT: stw 5, 120(1)
+; ASM32PWR4-NEXT: lwz 5, L..C23(2) # %const.1
+; ASM32PWR4-NEXT: lfd 2, 0(6)
+; ASM32PWR4-NEXT: lwz 6, L..C24(2) # %const.2
+; ASM32PWR4-NEXT: lfd 3, 0(5)
+; ASM32PWR4-NEXT: lwz 5, L..C25(2) # %const.3
+; ASM32PWR4-NEXT: lfd 4, 0(6)
+; ASM32PWR4-NEXT: lwz 6, L..C26(2) # %const.4
+; ASM32PWR4-NEXT: lfd 6, 0(5)
+; ASM32PWR4-NEXT: lwz 5, L..C27(2) # %const.5
+; ASM32PWR4-NEXT: lfd 7, 0(6)
+; ASM32PWR4-NEXT: lwz 6, L..C28(2) # %const.6
+; ASM32PWR4-NEXT: lfd 8, 0(5)
+; ASM32PWR4-NEXT: lwz 5, L..C29(2) # %const.7
+; ASM32PWR4-NEXT: lfd 9, 0(6)
+; ASM32PWR4-NEXT: lwz 6, L..C30(2) # %const.8
+; ASM32PWR4-NEXT: lfd 1, 0(5)
+; ASM32PWR4-NEXT: lwz 5, L..C31(2) # %const.9
+; ASM32PWR4-NEXT: lfd 11, 0(6)
+; ASM32PWR4-NEXT: lwz 6, L..C32(2) # %const.10
+; ASM32PWR4-NEXT: fmr 10, 1
+; ASM32PWR4-NEXT: lfd 12, 0(5)
+; ASM32PWR4-NEXT: lwz 5, L..C33(2) # %const.11
+; ASM32PWR4-NEXT: lfd 13, 0(6)
+; ASM32PWR4-NEXT: lfs 5, 0(5)
+; ASM32PWR4-NEXT: stfd 0, 132(1)
+; ASM32PWR4-NEXT: stw 4, 140(1)
+; ASM32PWR4-NEXT: stw 3, 128(1)
+; ASM32PWR4-NEXT: bl .test_fpr_stack
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 144
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: caller_fpr_stack:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -176(1)
+; ASM64PWR4-NEXT: ld 3, L..C18(2) # @f14
+; ASM64PWR4-NEXT: std 0, 192(1)
+; ASM64PWR4-NEXT: ld 4, L..C19(2) # @d15
+; ASM64PWR4-NEXT: ld 5, L..C20(2) # @f16
+; ASM64PWR4-NEXT: ld 6, L..C21(2) # %const.9
+; ASM64PWR4-NEXT: lis 7, 16313
+; ASM64PWR4-NEXT: lwz 3, 0(3)
+; ASM64PWR4-NEXT: ld 4, 0(4)
+; ASM64PWR4-NEXT: lwz 5, 0(5)
+; ASM64PWR4-NEXT: stw 3, 152(1)
+; ASM64PWR4-NEXT: ld 3, L..C22(2) # %const.0
+; ASM64PWR4-NEXT: std 4, 160(1)
+; ASM64PWR4-NEXT: ld 4, L..C23(2) # %const.1
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C24(2) # %const.2
+; ASM64PWR4-NEXT: lfd 3, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C25(2) # %const.3
+; ASM64PWR4-NEXT: lfd 4, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C26(2) # %const.4
+; ASM64PWR4-NEXT: lfd 6, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C27(2) # %const.5
+; ASM64PWR4-NEXT: lfd 7, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C28(2) # %const.6
+; ASM64PWR4-NEXT: lfd 8, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C29(2) # %const.7
+; ASM64PWR4-NEXT: lfd 9, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C30(2) # %const.8
+; ASM64PWR4-NEXT: lfd 1, 0(4)
+; ASM64PWR4-NEXT: lis 4, 16320
+; ASM64PWR4-NEXT: ori 4, 4, 41943
+; ASM64PWR4-NEXT: rldic 4, 4, 32, 2
+; ASM64PWR4-NEXT: lfd 11, 0(3)
+; ASM64PWR4-NEXT: lis 3, 16316
+; ASM64PWR4-NEXT: fmr 10, 1
+; ASM64PWR4-NEXT: ori 3, 3, 10485
+; ASM64PWR4-NEXT: oris 4, 4, 2621
+; ASM64PWR4-NEXT: stw 5, 168(1)
+; ASM64PWR4-NEXT: lis 5, 16318
+; ASM64PWR4-NEXT: rldic 3, 3, 32, 2
+; ASM64PWR4-NEXT: ori 5, 5, 47185
+; ASM64PWR4-NEXT: ori 4, 4, 28836
+; ASM64PWR4-NEXT: lfd 12, 0(6)
+; ASM64PWR4-NEXT: ld 6, L..C31(2) # %const.10
+; ASM64PWR4-NEXT: oris 3, 3, 49807
+; ASM64PWR4-NEXT: ori 3, 3, 23593
+; ASM64PWR4-NEXT: std 4, 144(1)
+; ASM64PWR4-NEXT: rldic 4, 5, 32, 2
+; ASM64PWR4-NEXT: oris 4, 4, 60293
+; ASM64PWR4-NEXT: ori 4, 4, 7864
+; ASM64PWR4-NEXT: std 3, 128(1)
+; ASM64PWR4-NEXT: ld 3, L..C32(2) # %const.11
+; ASM64PWR4-NEXT: ori 5, 7, 39321
+; ASM64PWR4-NEXT: rldic 5, 5, 32, 2
+; ASM64PWR4-NEXT: std 4, 136(1)
+; ASM64PWR4-NEXT: lis 4, 4091
+; ASM64PWR4-NEXT: ori 4, 4, 13107
+; ASM64PWR4-NEXT: rldic 4, 4, 34, 2
+; ASM64PWR4-NEXT: lfs 5, 0(3)
+; ASM64PWR4-NEXT: oris 3, 5, 39321
+; ASM64PWR4-NEXT: ori 3, 3, 39322
+; ASM64PWR4-NEXT: lfd 13, 0(6)
+; ASM64PWR4-NEXT: std 3, 120(1)
+; ASM64PWR4-NEXT: oris 3, 4, 52428
+; ASM64PWR4-NEXT: ori 3, 3, 52429
+; ASM64PWR4-NEXT: std 3, 112(1)
+; ASM64PWR4-NEXT: bl .test_fpr_stack
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 176
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%0 = load float, ptr @f14, align 4
%1 = load double, ptr @d15, align 8
@@ -1823,152 +1717,60 @@ entry:
ret void
}
-; CHECK-LABEL: caller_fpr_stack
-
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.0, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.2, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.3, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.4, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.5, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.6, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.7, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.8, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.9, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.10, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.11, $r2 :: (load (s32) from got)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 56, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 60, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 64, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 68, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 72, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 76, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 80, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[SCRATCHREG:[0-9]+]], 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 88, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 92, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 96, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 100, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 104, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 108, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 112, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 116, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 120, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 124, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 128, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGF1:[0-9]+]] = LWZtoc @f14, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r3 = LWZ 0, killed renamable $r[[REGF1]] :: (load (s32) from @f14)
-; 32BIT-DAG: STFD killed renamable $f0, 132, $r1 :: (store (s64))
-; 32BIT-DAG: renamable $r[[REGD:[0-9]+]] = LWZtoc @d15, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f0 = LFD 0, killed renamable $r[[REGD]] :: (dereferenceable load (s64) from @d15)
-; 32BIT-DAG: STW killed renamable $r[[SCRATCHREG:[0-9]+]], 140, $r1 :: (store (s32))
-; 32BIT-DAG: renamable $r[[REGF2:[0-9]+]] = LWZtoc @f16, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZ 0, killed renamable $r[[REGF2]] :: (load (s32) from @f16)
-; 32BIT-DAG: renamable $f1 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f2 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f3 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f4 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f5 = LFS 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s32) from constant-pool)
-; 32BIT-DAG: renamable $f6 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f7 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f8 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f9 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: $f10 = COPY renamable $f1
-; 32BIT-DAG: renamable $f11 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f12 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $f13 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-NEXT: BL_NOP <mcsymbol .test_fpr_stack>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $r2, implicit-def $r1, implicit-def dead $f1
-; 32BIT-NEXT: ADJCALLSTACKUP 144, 0, implicit-def dead $r1, implicit $r1
-
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.0, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.2, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.[[SCRATCHREG:[0-9]+]], $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.4, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.5, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.6, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.7, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.8, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.9, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.10, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[REGF1:[0-9]+]] = LDtoc @f14, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $r3 = LWZ 0, killed renamable $x[[REGF1]] :: (load (s32) from @f14)
-; 64BIT-DAG: renamable $x[[REGF2:[0-9]+]] = LDtoc @f16, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $r5 = LWZ 0, killed renamable $x[[REGF2]] :: (load (s32) from @f16)
-; 64BIT-DAG: renamable $x[[REGD:[0-9]+]] = LDtoc @d15, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x4 = LD 0, killed renamable $x[[REGD]] :: (load (s64) from @d15)
-; 64BIT-DAG: ADJCALLSTACKDOWN 176, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: renamable $f1 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f[[SCRATCHREG:[0-9]+]] = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f4 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f5 = LFS 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s32) from constant-pool)
-; 64BIT-DAG: renamable $f6 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f7 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f8 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f9 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: $f10 = COPY renamable $f1
-; 64BIT-DAG: renamable $f11 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f12 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f13 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: BL8_NOP <mcsymbol .test_fpr_stack>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit killed $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $f1
-; 64BIT-NEXT: ADJCALLSTACKUP 176, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
-
-; CHECKASM-LABEL: .caller_fpr_stack:
-
-; ASM32PWR4: mflr 0
-; ASM32PWR4-NEXT: stwu 1, -144(1)
-; ASM32PWR4-DAG: stw 0, 152(1)
-; ASM32PWR4-DAG: lwz [[REGF1ADDR:[0-9]+]], L..C20(2)
-; ASM32PWR4-DAG: lwz [[REGF1:[0-9]+]], 0([[REGF1ADDR]])
-; ASM32PWR4-DAG: lwz [[REGDADDR:[0-9]+]], L..C19(2)
-; ASM32PWR4-DAG: lfd [[REGD:[0-9]+]], 0([[REGDADDR]])
-; ASM32PWR4-DAG: lwz [[REGF2ADDR:[0-9]+]], L..C21(2)
-; ASM32PWR4-DAG: lwz [[REGF2:[0-9]+]], 0([[REGF2ADDR]])
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 60(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 64(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 68(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 72(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 76(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 80(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 84(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 88(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 92(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 96(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 100(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 108(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 104(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 112(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 116(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 120(1)
-; ASM32PWR4-DAG: stw [[SCRATCHREG:[0-9]+]], 124(1)
-; ASM32PWR4-DAG: stw [[REGF1]], 128(1)
-; ASM32PWR4-DAG: stfd [[REGD]], 132(1)
-; ASM32PWR4-DAG: stw [[REGF2]], 140(1)
-; ASM32PWR4-NEXT: bl .test_fpr_stack
-
-; ASM64PWR4: mflr 0
-; ASM64PWR4-NEXT: stdu 1, -176(1)
-; ASM64PWR4-DAG: std 0, 192(1)
-; ASM64PWR4-DAG: ld [[REGF1ADDR:[0-9]+]], L..C18(2)
-; ASM64PWR4-DAG: lwz [[REGF1:[0-9]+]], 0([[REGF1ADDR]])
-; ASM64PWR4-DAG: ld [[REGDADDR:[0-9]+]], L..C19(2)
-; ASM64PWR4-DAG: ld [[REGD:[0-9]+]], 0([[REGDADDR]])
-; ASM64PWR4-DAG: ld [[REGF2ADDR:[0-9]+]], L..C20(2)
-; ASM64PWR4-DAG: lwz [[REGF2:[0-9]+]], 0([[REGF2ADDR]])
-; ASM64PWR4-DAG: std [[SCRATCHREG:[0-9]+]], 112(1)
-; ASM64PWR4-DAG: std [[SCRATCHREG:[0-9]+]], 120(1)
-; ASM64PWR4-DAG: std [[SCRATCHREG:[0-9]+]], 128(1)
-; ASM64PWR4-DAG: std [[SCRATCHREG:[0-9]+]], 136(1)
-; ASM64PWR4-DAG: std [[SCRATCHREG:[0-9]+]], 144(1)
-; ASM64PWR4-DAG: stw [[REGF1]], 152(1)
-; ASM64PWR4-DAG: std [[REGD]], 160(1)
-; ASM64PWR4-DAG: stw [[REGF2]], 168(1)
-; ASM64PWR4-NEXT: bl .test_fpr_stack
-
define i32 @mix_callee(double %d1, double %d2, double %d3, double %d4, i8 zeroext %c1, i16 signext %s1, i64 %ll1, i32 %i1, i32 %i2, i32 %i3) {
+; ASM32PWR4-LABEL: mix_callee:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: lwz 4, 60(1)
+; ASM32PWR4-NEXT: lis 8, 17200
+; ASM32PWR4-NEXT: fadd 1, 1, 2
+; ASM32PWR4-NEXT: fadd 1, 1, 3
+; ASM32PWR4-NEXT: lwz 5, 56(1)
+; ASM32PWR4-NEXT: lwz 3, 68(1)
+; ASM32PWR4-NEXT: add 4, 5, 4
+; ASM32PWR4-NEXT: lwz 5, L..C34(2) # %const.0
+; ASM32PWR4-NEXT: fadd 1, 1, 4
+; ASM32PWR4-NEXT: lwz 6, 72(1)
+; ASM32PWR4-NEXT: add 3, 4, 3
+; ASM32PWR4-NEXT: lwz 7, 76(1)
+; ASM32PWR4-NEXT: add 3, 3, 6
+; ASM32PWR4-NEXT: stw 8, -16(1)
+; ASM32PWR4-NEXT: add 3, 3, 7
+; ASM32PWR4-NEXT: lwz 8, 80(1)
+; ASM32PWR4-NEXT: add 3, 3, 8
+; ASM32PWR4-NEXT: lfs 0, 0(5)
+; ASM32PWR4-NEXT: xoris 3, 3, 32768
+; ASM32PWR4-NEXT: stw 3, -12(1)
+; ASM32PWR4-NEXT: addi 3, 1, -4
+; ASM32PWR4-NEXT: lfd 2, -16(1)
+; ASM32PWR4-NEXT: fsub 0, 2, 0
+; ASM32PWR4-NEXT: fadd 0, 0, 1
+; ASM32PWR4-NEXT: fctiwz 0, 0
+; ASM32PWR4-NEXT: stfiwx 0, 0, 3
+; ASM32PWR4-NEXT: lwz 3, -4(1)
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: mix_callee:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: lwz 3, 116(1)
+; ASM64PWR4-NEXT: add 4, 7, 8
+; ASM64PWR4-NEXT: fadd 0, 1, 2
+; ASM64PWR4-NEXT: add 4, 4, 9
+; ASM64PWR4-NEXT: fadd 0, 0, 3
+; ASM64PWR4-NEXT: add 4, 4, 10
+; ASM64PWR4-NEXT: lwz 5, 124(1)
+; ASM64PWR4-NEXT: add 3, 4, 3
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: fadd 0, 0, 4
+; ASM64PWR4-NEXT: extsw 3, 3
+; ASM64PWR4-NEXT: std 3, -16(1)
+; ASM64PWR4-NEXT: addi 3, 1, -4
+; ASM64PWR4-NEXT: lfd 1, -16(1)
+; ASM64PWR4-NEXT: fcfid 1, 1
+; ASM64PWR4-NEXT: fadd 0, 1, 0
+; ASM64PWR4-NEXT: fctiwz 0, 0
+; ASM64PWR4-NEXT: stfiwx 0, 0, 3
+; ASM64PWR4-NEXT: lwz 3, -4(1)
+; ASM64PWR4-NEXT: blr
entry:
%add = fadd double %d1, %d2
%add1 = fadd double %add, %d3
@@ -1991,137 +1793,149 @@ define i32 @mix_callee(double %d1, double %d2, double %d3, double %d4, i8 zeroex
ret i32 %conv16
}
-; CHECK-LABEL: mix_callee
-
-; 32BIT-LABEL: liveins:
-; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f2', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f3', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f4', virtual-reg: '' }
-
-; 32BIT-LABEL: fixedStack:
-; 32BIT-DAG: - { id: 6, type: default, offset: 56, size: 4
-; 32BIT-DAG: - { id: 5, type: default, offset: 60, size: 4
-; 32BIT-DAG: - { id: 4, type: default, offset: 64, size: 4
-; 32BIT-DAG: - { id: 3, type: default, offset: 68, size: 4
-; 32BIT-DAG: - { id: 2, type: default, offset: 72, size: 4
-; 32BIT-DAG: - { id: 1, type: default, offset: 76, size: 4
-; 32BIT-DAG: - { id: 0, type: default, offset: 80, size: 4
-
-; 32BIT-LABEL: body: |
-; 32BIT-DAG: bb.0.entry:
-; 32BIT-DAG: liveins: $f1, $f2, $f3, $f4
-
-; 64BIT-LABEL: liveins:
-; 64BIT-DAG: - { reg: '$f1', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f2', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f3', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f4', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
-
-; 64BIT-LABEL: fixedStack:
-; 64BIT-DAG: - { id: 1, type: default, offset: 116, size: 4
-; 64BIT-DAG: - { id: 0, type: default, offset: 124, size: 4
-
-; 64BIT-LABEL: body: |
-; 64BIT-DAG: bb.0.entry:
-; 64BIT-DAG: liveins: $f1, $f2, $f3, $f4, $x7, $x8, $x9, $x10
-
-; CHECKASM-LABEL: .mix_callee
-
-; ASM32PWR4-DAG: lwz [[REG1:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: lwz [[REG2:[0-9]+]], 60(1)
-; ASM32PWR4-DAG: lwz [[REG4:[0-9]+]], 68(1)
-; ASM32PWR4-DAG: lwz [[REG5:[0-9]+]], 72(1)
-; ASM32PWR4-DAG: lwz [[REG6:[0-9]+]], 76(1)
-; ASM32PWR4-DAG: lwz [[REG7:[0-9]+]], 80(1)
-; ASM32PWR4-DAG: blr
-
-; ASM64PWR-DAG: ld [[REG1:[0-9]+]], 112(1)
-; ASM64PWR-DAG: ld [[REG2:[0-9]+]], 120(1)
-; ASM64PWR-DAG: fadd 0, 0, [[REG1]]
-; ASM64PWR-DAG: add 3, 3, [[REG2]]
-; ASM64PWR-DAG: blr
-
define void @caller_mix() {
+; ASM32PWR4-LABEL: caller_mix:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -96(1)
+; ASM32PWR4-NEXT: li 3, 60
+; ASM32PWR4-NEXT: stw 0, 104(1)
+; ASM32PWR4-NEXT: stw 3, 80(1)
+; ASM32PWR4-NEXT: li 3, 50
+; ASM32PWR4-NEXT: stw 3, 76(1)
+; ASM32PWR4-NEXT: li 3, 40
+; ASM32PWR4-NEXT: stw 3, 72(1)
+; ASM32PWR4-NEXT: li 3, 0
+; ASM32PWR4-NEXT: stw 3, 64(1)
+; ASM32PWR4-NEXT: li 3, 2
+; ASM32PWR4-NEXT: stw 3, 60(1)
+; ASM32PWR4-NEXT: lwz 3, L..C35(2) # %const.0
+; ASM32PWR4-NEXT: lfd 1, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C36(2) # %const.1
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C37(2) # %const.2
+; ASM32PWR4-NEXT: lfd 3, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C38(2) # %const.3
+; ASM32PWR4-NEXT: lfd 4, 0(3)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: stw 3, 56(1)
+; ASM32PWR4-NEXT: lis 3, 457
+; ASM32PWR4-NEXT: ori 3, 3, 50048
+; ASM32PWR4-NEXT: stw 3, 68(1)
+; ASM32PWR4-NEXT: bl .mix_callee
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 96
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: caller_mix:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -128(1)
+; ASM64PWR4-NEXT: ld 3, L..C33(2) # %const.0
+; ASM64PWR4-NEXT: ld 4, L..C34(2) # %const.1
+; ASM64PWR4-NEXT: lis 5, 457
+; ASM64PWR4-NEXT: li 7, 1
+; ASM64PWR4-NEXT: std 0, 144(1)
+; ASM64PWR4-NEXT: ori 9, 5, 50048
+; ASM64PWR4-NEXT: li 8, 2
+; ASM64PWR4-NEXT: lfd 1, 0(3)
+; ASM64PWR4-NEXT: ld 3, L..C35(2) # %const.2
+; ASM64PWR4-NEXT: li 10, 40
+; ASM64PWR4-NEXT: lfd 2, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C36(2) # %const.3
+; ASM64PWR4-NEXT: lfd 3, 0(3)
+; ASM64PWR4-NEXT: li 3, 60
+; ASM64PWR4-NEXT: lfd 4, 0(4)
+; ASM64PWR4-NEXT: li 4, 50
+; ASM64PWR4-NEXT: std 3, 120(1)
+; ASM64PWR4-NEXT: std 4, 112(1)
+; ASM64PWR4-NEXT: bl .mix_callee
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: addi 1, 1, 128
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%call = call i32 @mix_callee(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, i8 zeroext 1, i16 signext 2, i64 30000000, i32 40, i32 50, i32 60)
ret void
}
-; CHECK-LABEL: name: caller_mix
-
-; 32BIT-DAG: ADJCALLSTACKDOWN 84, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.0, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f1 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.1, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f2 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.2, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f3 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LWZtoc %const.3, $r2 :: (load (s32) from got)
-; 32BIT-DAG: renamable $f4 = LFD 0, killed renamable $r[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 1
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 2
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LIS 457
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 0
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 40
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 50
-; 32BIT-DAG: renamable $r[[SCRATCHREG:[0-9]+]] = LI 60
-; 32BIT-DAG: STW killed renamable $r[[REG1:[0-9]+]], 56, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG2:[0-9]+]], 60, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG3:[0-9]+]], 64, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG4:[0-9]+]], 68, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG5:[0-9]+]], 72, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG6:[0-9]+]], 76, $r1 :: (store (s32))
-; 32BIT-DAG: STW killed renamable $r[[REG7:[0-9]+]], 80, $r1 :: (store (s32))
-; 32BIT-DAG: BL_NOP <mcsymbol .mix_callee>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $r2, implicit-def $r1, implicit-def dead $r3
-; 32BIT-DAG: ADJCALLSTACKUP 84, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-NEXT: BLR implicit $lr, implicit $rm
-
-; 64BIT-DAG: ADJCALLSTACKDOWN 128, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.0, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.1, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.2, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LDtocCPT %const.3, $x2 :: (load (s64) from got)
-; 64BIT-DAG: renamable $f1 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f3 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $f4 = LFD 0, killed renamable $x[[SCRATCHREG:[0-9]+]] :: (load (s64) from constant-pool)
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LI8 50
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LI8 60
-; 64BIT-DAG: renamable $x[[SCRATCHREG:[0-9]+]] = LIS8 457
-; 64BIT-DAG: $x7 = LI8 1
-; 64BIT-DAG: $x8 = LI8 2
-; 64BIT-DAG: $x10 = LI8 40
-; 64BIT-DAG: STD killed renamable $x[[REG1:[0-9]+]], 112, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG2:[0-9]+]], 120, $x1 :: (store (s64))
-; 64BIT: ADJCALLSTACKUP 128, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-NEXT: BLR8 implicit $lr8, implicit $rm
-
-; CHEKASM-LABEL: .caller_mix
-
-; ASM32PWR4: mflr 0
-; ASM32PWR4-DAG: stw [[REG1:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: stw [[REG2:[0-9]+]], 60(1)
-; ASM32PWR4-DAG: stw [[REG3:[0-9]+]], 64(1)
-; ASM32PWR4-DAG: stw [[REG4:[0-9]+]], 68(1)
-; ASM32PWR4-DAG: stw [[REG5:[0-9]+]], 72(1)
-; ASM32PWR4-DAG: stw [[REG6:[0-9]+]], 76(1)
-; ASM32PWR4-DAG: stw [[REG7:[0-9]+]], 80(1)
-; ASM32PWR4-DAG: bl .mix_callee
-; ASM32PWR4-DAG: blr
-
-; ASM64PWR4: mflr 0
-; ASM64PWR4-DAG: std [[REG1:[0-9]+]], 112(1)
-; ASM64PWR4-DAG: std [[REG2:[0-9]+]], 120(1)
-; ASM64PWR4-DAG: bl .mix_callee
-; ASM64PWR4-DAG: blr
-
-
define i32 @mix_floats(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10, double %d11, double %d12, double %d13, double %d14) {
+; ASM32PWR4-LABEL: mix_floats:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: add 3, 3, 4
+; ASM32PWR4-NEXT: lwz 4, L..C39(2) # %const.0
+; ASM32PWR4-NEXT: lis 11, 17200
+; ASM32PWR4-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
+; ASM32PWR4-NEXT: add 3, 3, 5
+; ASM32PWR4-NEXT: add 3, 3, 6
+; ASM32PWR4-NEXT: add 3, 3, 7
+; ASM32PWR4-NEXT: stw 11, -24(1)
+; ASM32PWR4-NEXT: add 3, 3, 8
+; ASM32PWR4-NEXT: add 3, 3, 9
+; ASM32PWR4-NEXT: add 3, 3, 10
+; ASM32PWR4-NEXT: lfs 0, 0(4)
+; ASM32PWR4-NEXT: xoris 3, 3, 32768
+; ASM32PWR4-NEXT: stw 3, -20(1)
+; ASM32PWR4-NEXT: addi 3, 1, -12
+; ASM32PWR4-NEXT: lfd 31, -24(1)
+; ASM32PWR4-NEXT: fsub 0, 31, 0
+; ASM32PWR4-NEXT: fadd 0, 0, 1
+; ASM32PWR4-NEXT: lfd 1, 160(1)
+; ASM32PWR4-NEXT: fadd 0, 0, 2
+; ASM32PWR4-NEXT: fadd 0, 0, 3
+; ASM32PWR4-NEXT: fadd 0, 0, 4
+; ASM32PWR4-NEXT: fadd 0, 0, 5
+; ASM32PWR4-NEXT: fadd 0, 0, 6
+; ASM32PWR4-NEXT: fadd 0, 0, 7
+; ASM32PWR4-NEXT: fadd 0, 0, 8
+; ASM32PWR4-NEXT: fadd 0, 0, 9
+; ASM32PWR4-NEXT: fadd 0, 0, 10
+; ASM32PWR4-NEXT: fadd 0, 0, 11
+; ASM32PWR4-NEXT: fadd 0, 0, 12
+; ASM32PWR4-NEXT: fadd 0, 0, 13
+; ASM32PWR4-NEXT: fadd 0, 0, 1
+; ASM32PWR4-NEXT: fctiwz 0, 0
+; ASM32PWR4-NEXT: stfiwx 0, 0, 3
+; ASM32PWR4-NEXT: lwz 3, -12(1)
+; ASM32PWR4-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: mix_floats:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: add 3, 3, 4
+; ASM64PWR4-NEXT: add 3, 3, 5
+; ASM64PWR4-NEXT: add 3, 3, 6
+; ASM64PWR4-NEXT: add 3, 3, 7
+; ASM64PWR4-NEXT: add 3, 3, 8
+; ASM64PWR4-NEXT: add 3, 3, 9
+; ASM64PWR4-NEXT: add 3, 3, 10
+; ASM64PWR4-NEXT: extsw 3, 3
+; ASM64PWR4-NEXT: std 3, -16(1)
+; ASM64PWR4-NEXT: addi 3, 1, -4
+; ASM64PWR4-NEXT: lfd 0, -16(1)
+; ASM64PWR4-NEXT: fcfid 0, 0
+; ASM64PWR4-NEXT: fadd 0, 0, 1
+; ASM64PWR4-NEXT: lfd 1, 216(1)
+; ASM64PWR4-NEXT: fadd 0, 0, 2
+; ASM64PWR4-NEXT: fadd 0, 0, 3
+; ASM64PWR4-NEXT: fadd 0, 0, 4
+; ASM64PWR4-NEXT: fadd 0, 0, 5
+; ASM64PWR4-NEXT: fadd 0, 0, 6
+; ASM64PWR4-NEXT: fadd 0, 0, 7
+; ASM64PWR4-NEXT: fadd 0, 0, 8
+; ASM64PWR4-NEXT: fadd 0, 0, 9
+; ASM64PWR4-NEXT: fadd 0, 0, 10
+; ASM64PWR4-NEXT: fadd 0, 0, 11
+; ASM64PWR4-NEXT: fadd 0, 0, 12
+; ASM64PWR4-NEXT: fadd 0, 0, 13
+; ASM64PWR4-NEXT: fadd 0, 0, 1
+; ASM64PWR4-NEXT: fctiwz 0, 0
+; ASM64PWR4-NEXT: stfiwx 0, 0, 3
+; ASM64PWR4-NEXT: lwz 3, -4(1)
+; ASM64PWR4-NEXT: blr
entry:
%add = add nsw i32 %i1, %i2
%add1 = add nsw i32 %add, %i3
@@ -2149,203 +1963,240 @@ define void @caller_mix() {
ret i32 %conv21
}
-; CHECK-LABEL: mix_floats
-
-; 32BIT-LABEL: liveins:
-; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f2', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f3', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f4', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f5', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f6', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f7', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f8', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f9', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f10', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f11', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f12', virtual-reg: '' }
-; 32BIT-DAG: - { reg: '$f13', virtual-reg: '' }
-
-; 32BIT-LABEL: fixedStack:
-; 32BIT-DAG: - { id: 0, type: default, offset: 160, size: 8
-
-; 32BIT-LABEL: body: |
-; 32BIT-DAG: bb.0.entry:
-; 32BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
-
-; 64BIT-DAG: liveins:
-; 64BIT-DAG: - { reg: '$x3', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f1', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f2', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f3', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f4', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f5', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f6', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f7', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f8', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f9', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f10', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f11', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f12', virtual-reg: '' }
-; 64BIT-DAG: - { reg: '$f13', virtual-reg: '' }
-
-; 64BIT-LABEL: fixedStack:
-; 64BIT-DAG: - { id: 0, type: default, offset: 216, size: 8
-
-; 64BIT-LABEL: body: |
-; 64BIT-DAG: bb.0.entry:
-; 64BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
-
-; CHECKASM-LABEL: .mix_floats:
-
-; ASM32PWR4-DAG: lfd [[REGF:[0-9]+]], 160(1)
-; ASM32PWR4-DAG: fadd 0, 0, [[REGF]]
-; ASM32PWR4-DAG: blr
-
-; ASM64PWR4-DAG: lfd [[REG1:[0-9]+]], 216(1)
-; ASM64PWR4-DAG: fadd 0, 0, [[REG1]]
-; ASM64PWR4-DAG: blr
-
define void @mix_floats_caller() {
+; ASM32PWR4-LABEL: mix_floats_caller:
+; ASM32PWR4: # %bb.0: # %entry
+; ASM32PWR4-NEXT: mflr 0
+; ASM32PWR4-NEXT: stwu 1, -176(1)
+; ASM32PWR4-NEXT: li 3, 0
+; ASM32PWR4-NEXT: stw 0, 184(1)
+; ASM32PWR4-NEXT: lis 4, 16352
+; ASM32PWR4-NEXT: lis 5, 16339
+; ASM32PWR4-NEXT: lis 6, 16364
+; ASM32PWR4-NEXT: stw 3, 92(1)
+; ASM32PWR4-NEXT: ori 5, 5, 13107
+; ASM32PWR4-NEXT: ori 6, 6, 52428
+; ASM32PWR4-NEXT: stw 3, 132(1)
+; ASM32PWR4-NEXT: lis 3, 16368
+; ASM32PWR4-NEXT: li 8, 6
+; ASM32PWR4-NEXT: li 9, 7
+; ASM32PWR4-NEXT: li 10, 8
+; ASM32PWR4-NEXT: stw 3, 128(1)
+; ASM32PWR4-NEXT: lis 3, -26215
+; ASM32PWR4-NEXT: ori 3, 3, 39322
+; ASM32PWR4-NEXT: stw 4, 88(1)
+; ASM32PWR4-NEXT: lis 4, 16313
+; ASM32PWR4-NEXT: ori 4, 4, 39321
+; ASM32PWR4-NEXT: stw 3, 60(1)
+; ASM32PWR4-NEXT: stw 3, 68(1)
+; ASM32PWR4-NEXT: stw 3, 84(1)
+; ASM32PWR4-NEXT: stw 3, 116(1)
+; ASM32PWR4-NEXT: stw 3, 140(1)
+; ASM32PWR4-NEXT: lis 3, 16369
+; ASM32PWR4-NEXT: ori 3, 3, 39321
+; ASM32PWR4-NEXT: stw 4, 56(1)
+; ASM32PWR4-NEXT: lis 4, 16329
+; ASM32PWR4-NEXT: ori 4, 4, 39321
+; ASM32PWR4-NEXT: stw 3, 136(1)
+; ASM32PWR4-NEXT: lis 3, 16371
+; ASM32PWR4-NEXT: ori 3, 3, 13107
+; ASM32PWR4-NEXT: stw 4, 64(1)
+; ASM32PWR4-NEXT: lis 4, 13107
+; ASM32PWR4-NEXT: ori 4, 4, 13107
+; ASM32PWR4-NEXT: stw 3, 144(1)
+; ASM32PWR4-NEXT: lis 3, 16372
+; ASM32PWR4-NEXT: ori 3, 3, 52428
+; ASM32PWR4-NEXT: stw 4, 76(1)
+; ASM32PWR4-NEXT: stw 4, 100(1)
+; ASM32PWR4-NEXT: stw 4, 148(1)
+; ASM32PWR4-NEXT: lwz 4, L..C40(2) # %const.0
+; ASM32PWR4-NEXT: stw 3, 152(1)
+; ASM32PWR4-NEXT: lwz 3, L..C41(2) # %const.1
+; ASM32PWR4-NEXT: lfd 1, 0(4)
+; ASM32PWR4-NEXT: lwz 4, L..C42(2) # %const.2
+; ASM32PWR4-NEXT: lfd 2, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C43(2) # %const.3
+; ASM32PWR4-NEXT: stw 5, 72(1)
+; ASM32PWR4-NEXT: lis 5, 16345
+; ASM32PWR4-NEXT: ori 5, 5, 39321
+; ASM32PWR4-NEXT: stw 5, 80(1)
+; ASM32PWR4-NEXT: lis 5, 16355
+; ASM32PWR4-NEXT: ori 5, 5, 13107
+; ASM32PWR4-NEXT: lfd 3, 0(4)
+; ASM32PWR4-NEXT: lwz 4, L..C44(2) # %const.4
+; ASM32PWR4-NEXT: lfd 4, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C45(2) # %const.5
+; ASM32PWR4-NEXT: stw 5, 96(1)
+; ASM32PWR4-NEXT: lis 5, 26214
+; ASM32PWR4-NEXT: ori 7, 5, 26214
+; ASM32PWR4-NEXT: lis 5, 16358
+; ASM32PWR4-NEXT: lfd 6, 0(4)
+; ASM32PWR4-NEXT: lwz 4, L..C46(2) # %const.6
+; ASM32PWR4-NEXT: ori 5, 5, 26214
+; ASM32PWR4-NEXT: lfd 7, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C47(2) # %const.7
+; ASM32PWR4-NEXT: stw 5, 104(1)
+; ASM32PWR4-NEXT: lis 5, 16361
+; ASM32PWR4-NEXT: ori 5, 5, 39321
+; ASM32PWR4-NEXT: lfd 8, 0(4)
+; ASM32PWR4-NEXT: lwz 4, L..C48(2) # %const.8
+; ASM32PWR4-NEXT: lfd 9, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C49(2) # %const.9
+; ASM32PWR4-NEXT: stw 5, 112(1)
+; ASM32PWR4-NEXT: lis 5, -13108
+; ASM32PWR4-NEXT: ori 5, 5, 52429
+; ASM32PWR4-NEXT: stw 5, 124(1)
+; ASM32PWR4-NEXT: stw 5, 156(1)
+; ASM32PWR4-NEXT: lwz 5, L..C50(2) # %const.12
+; ASM32PWR4-NEXT: lfd 11, 0(4)
+; ASM32PWR4-NEXT: lwz 4, L..C51(2) # %const.10
+; ASM32PWR4-NEXT: lfd 12, 0(3)
+; ASM32PWR4-NEXT: lwz 3, L..C52(2) # %const.11
+; ASM32PWR4-NEXT: lfd 13, 0(4)
+; ASM32PWR4-NEXT: lis 4, 16374
+; ASM32PWR4-NEXT: ori 11, 4, 26214
+; ASM32PWR4-NEXT: li 4, 2
+; ASM32PWR4-NEXT: lfs 5, 0(3)
+; ASM32PWR4-NEXT: li 3, 1
+; ASM32PWR4-NEXT: lfs 10, 0(5)
+; ASM32PWR4-NEXT: li 5, 3
+; ASM32PWR4-NEXT: stw 7, 108(1)
+; ASM32PWR4-NEXT: stw 6, 120(1)
+; ASM32PWR4-NEXT: li 6, 4
+; ASM32PWR4-NEXT: stw 7, 164(1)
+; ASM32PWR4-NEXT: li 7, 5
+; ASM32PWR4-NEXT: stw 11, 160(1)
+; ASM32PWR4-NEXT: bl .mix_floats
+; ASM32PWR4-NEXT: nop
+; ASM32PWR4-NEXT: addi 1, 1, 176
+; ASM32PWR4-NEXT: lwz 0, 8(1)
+; ASM32PWR4-NEXT: mtlr 0
+; ASM32PWR4-NEXT: blr
+;
+; ASM64PWR4-LABEL: mix_floats_caller:
+; ASM64PWR4: # %bb.0: # %entry
+; ASM64PWR4-NEXT: mflr 0
+; ASM64PWR4-NEXT: stdu 1, -240(1)
+; ASM64PWR4-NEXT: li 3, 1023
+; ASM64PWR4-NEXT: std 0, 256(1)
+; ASM64PWR4-NEXT: ld 4, L..C37(2) # %const.0
+; ASM64PWR4-NEXT: ld 8, L..C38(2) # %const.6
+; ASM64PWR4-NEXT: lis 5, 16371
+; ASM64PWR4-NEXT: ld 6, L..C39(2) # %const.3
+; ASM64PWR4-NEXT: ld 9, L..C40(2) # %const.9
+; ASM64PWR4-NEXT: ld 10, L..C41(2) # %const.11
+; ASM64PWR4-NEXT: rldic 3, 3, 52, 2
+; ASM64PWR4-NEXT: lis 11, 4091
+; ASM64PWR4-NEXT: std 3, 184(1)
+; ASM64PWR4-NEXT: li 3, 511
+; ASM64PWR4-NEXT: lis 12, 16361
+; ASM64PWR4-NEXT: rldic 3, 3, 53, 2
+; ASM64PWR4-NEXT: lfd 1, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C42(2) # %const.2
+; ASM64PWR4-NEXT: lis 0, 16345
+; ASM64PWR4-NEXT: std 3, 144(1)
+; ASM64PWR4-NEXT: ld 3, L..C43(2) # %const.1
+; ASM64PWR4-NEXT: lfd 2, 0(3)
+; ASM64PWR4-NEXT: lis 3, 16374
+; ASM64PWR4-NEXT: ori 7, 3, 26214
+; ASM64PWR4-NEXT: ori 3, 5, 13107
+; ASM64PWR4-NEXT: ld 5, L..C44(2) # %const.5
+; ASM64PWR4-NEXT: lfd 8, 0(8)
+; ASM64PWR4-NEXT: ld 8, L..C45(2) # %const.8
+; ASM64PWR4-NEXT: rldimi 7, 7, 32, 0
+; ASM64PWR4-NEXT: rlwimi 7, 7, 16, 0, 15
+; ASM64PWR4-NEXT: rldimi 3, 3, 32, 0
+; ASM64PWR4-NEXT: lfd 3, 0(4)
+; ASM64PWR4-NEXT: ld 4, L..C46(2) # %const.4
+; ASM64PWR4-NEXT: rlwimi 3, 3, 16, 0, 15
+; ASM64PWR4-NEXT: lfd 4, 0(6)
+; ASM64PWR4-NEXT: lis 6, 16355
+; ASM64PWR4-NEXT: lfd 7, 0(5)
+; ASM64PWR4-NEXT: ori 5, 6, 13107
+; ASM64PWR4-NEXT: ld 6, L..C47(2) # %const.7
+; ASM64PWR4-NEXT: rldimi 5, 5, 32, 0
+; ASM64PWR4-NEXT: rlwimi 5, 5, 16, 0, 15
+; ASM64PWR4-NEXT: lfd 11, 0(8)
+; ASM64PWR4-NEXT: ld 8, L..C48(2) # %const.10
+; ASM64PWR4-NEXT: lfd 6, 0(4)
+; ASM64PWR4-NEXT: lis 4, 16358
+; ASM64PWR4-NEXT: ori 4, 4, 26214
+; ASM64PWR4-NEXT: rldimi 4, 4, 32, 0
+; ASM64PWR4-NEXT: lfd 9, 0(6)
+; ASM64PWR4-NEXT: lis 6, 16339
+; ASM64PWR4-NEXT: rlwimi 4, 4, 16, 0, 15
+; ASM64PWR4-NEXT: ori 6, 6, 13107
+; ASM64PWR4-NEXT: lfd 12, 0(9)
+; ASM64PWR4-NEXT: lis 9, 4093
+; ASM64PWR4-NEXT: ori 9, 9, 13107
+; ASM64PWR4-NEXT: lfd 13, 0(8)
+; ASM64PWR4-NEXT: lis 8, 16369
+; ASM64PWR4-NEXT: ori 8, 8, 39321
+; ASM64PWR4-NEXT: rldimi 6, 6, 32, 0
+; ASM64PWR4-NEXT: std 31, 232(1) # 8-byte Folded Spill
+; ASM64PWR4-NEXT: ld 31, L..C49(2) # %const.12
+; ASM64PWR4-NEXT: rldic 9, 9, 34, 2
+; ASM64PWR4-NEXT: rlwimi 6, 6, 16, 0, 15
+; ASM64PWR4-NEXT: oris 9, 9, 52428
+; ASM64PWR4-NEXT: lfs 5, 0(10)
+; ASM64PWR4-NEXT: lis 10, 16329
+; ASM64PWR4-NEXT: ori 10, 10, 39321
+; ASM64PWR4-NEXT: std 7, 216(1)
+; ASM64PWR4-NEXT: ori 7, 11, 13107
+; ASM64PWR4-NEXT: ori 11, 12, 39321
+; ASM64PWR4-NEXT: ori 12, 0, 39321
+; ASM64PWR4-NEXT: std 4, 160(1)
+; ASM64PWR4-NEXT: rldic 4, 8, 32, 2
+; ASM64PWR4-NEXT: rldic 7, 7, 34, 2
+; ASM64PWR4-NEXT: oris 4, 4, 39321
+; ASM64PWR4-NEXT: std 30, 224(1) # 8-byte Folded Spill
+; ASM64PWR4-NEXT: lis 30, 16313
+; ASM64PWR4-NEXT: rldic 8, 11, 32, 2
+; ASM64PWR4-NEXT: rldic 11, 12, 32, 2
+; ASM64PWR4-NEXT: std 3, 200(1)
+; ASM64PWR4-NEXT: ori 3, 30, 39321
+; ASM64PWR4-NEXT: ori 4, 4, 39322
+; ASM64PWR4-NEXT: rldic 3, 3, 32, 2
+; ASM64PWR4-NEXT: std 5, 152(1)
+; ASM64PWR4-NEXT: rldic 5, 10, 32, 2
+; ASM64PWR4-NEXT: oris 5, 5, 39321
+; ASM64PWR4-NEXT: oris 3, 3, 39321
+; ASM64PWR4-NEXT: std 6, 128(1)
+; ASM64PWR4-NEXT: oris 6, 7, 52428
+; ASM64PWR4-NEXT: ori 7, 9, 52429
+; ASM64PWR4-NEXT: li 9, 7
+; ASM64PWR4-NEXT: lfs 10, 0(31)
+; ASM64PWR4-NEXT: li 10, 8
+; ASM64PWR4-NEXT: std 7, 208(1)
+; ASM64PWR4-NEXT: oris 7, 8, 39321
+; ASM64PWR4-NEXT: oris 8, 11, 39321
+; ASM64PWR4-NEXT: ori 11, 3, 39322
+; ASM64PWR4-NEXT: li 3, 1
+; ASM64PWR4-NEXT: std 4, 192(1)
+; ASM64PWR4-NEXT: ori 4, 6, 52429
+; ASM64PWR4-NEXT: ori 6, 8, 39322
+; ASM64PWR4-NEXT: std 4, 176(1)
+; ASM64PWR4-NEXT: ori 4, 7, 39322
+; ASM64PWR4-NEXT: ori 7, 5, 39322
+; ASM64PWR4-NEXT: li 5, 3
+; ASM64PWR4-NEXT: li 8, 6
+; ASM64PWR4-NEXT: std 4, 168(1)
+; ASM64PWR4-NEXT: li 4, 2
+; ASM64PWR4-NEXT: std 6, 136(1)
+; ASM64PWR4-NEXT: li 6, 4
+; ASM64PWR4-NEXT: std 7, 120(1)
+; ASM64PWR4-NEXT: li 7, 5
+; ASM64PWR4-NEXT: std 11, 112(1)
+; ASM64PWR4-NEXT: bl .mix_floats
+; ASM64PWR4-NEXT: nop
+; ASM64PWR4-NEXT: ld 31, 232(1) # 8-byte Folded Reload
+; ASM64PWR4-NEXT: ld 30, 224(1) # 8-byte Folded Reload
+; ASM64PWR4-NEXT: addi 1, 1, 240
+; ASM64PWR4-NEXT: ld 0, 16(1)
+; ASM64PWR4-NEXT: mtlr 0
+; ASM64PWR4-NEXT: blr
entry:
%call = call i32 @mix_floats(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e+00, double 1.100000e+00, double 1.200000e+00, double 1.300000e+00, double 1.400000e+00)
ret void
}
-; CHECK-LABEL: mix_floats_caller
-
-; 32BIT-DAG: ADJCALLSTACKDOWN 168, 0, implicit-def dead $r1, implicit $r1
-; 32BIT-DAG: $r3 = LI 1
-; 32BIT-DAG: $r4 = LI 2
-; 32BIT-DAG: $r5 = LI 3
-; 32BIT-DAG: $r6 = LI 4
-; 32BIT-DAG: $r7 = LI 5
-; 32BIT-DAG: $r8 = LI 6
-; 32BIT-DAG: $r9 = LI 7
-; 32BIT-DAG: $r10 = LI 8
-; 32BIT-DAG: STW killed renamable $r[[REG1:[0-9]+]], 56, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG2:[0-9]+]], 60, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG3:[0-9]+]], 64, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG4:[0-9]+]], 68, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG5:[0-9]+]], 72, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG6:[0-9]+]], 76, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG7:[0-9]+]], 80, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG8:[0-9]+]], 84, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG9:[0-9]+]], 88, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG10:[0-9]+]], 92, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG11:[0-9]+]], 96, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG12:[0-9]+]], 100, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG13:[0-9]+]], 104, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG14:[0-9]+]], 108, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG15:[0-9]+]], 112, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG16:[0-9]+]], 116, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG17:[0-9]+]], 120, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[REG18:[0-9]+]], 128, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW renamable $r[[REG19:[0-9]+]], 124, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG20:[0-9]+]], 132, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG21:[0-9]+]], 136, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[REG22:[0-9]+]], 140, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG23:[0-9]+]], 144, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[REG24:[0-9]+]], 148, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG25:[0-9]+]], 152, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[REG26:[0-9]+]], 156, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-DAG: STW killed renamable $r[[REG27:[0-9]+]], 160, $r1 :: (store (s32), align 8)
-; 32BIT-DAG: STW killed renamable $r[[REG28:[0-9]+]], 164, $r1 :: (store (s32) into unknown-address + 4, basealign 8)
-; 32BIT-NEXT: BL_NOP <mcsymbol .mix_floats>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $r2, implicit-def $r1, implicit-def dead $r3
-; 32BIT-NEXT: ADJCALLSTACKUP 168, 0, implicit-def dead $r1, implicit $r1
-
-
-; 64BIT-DAG: ADJCALLSTACKDOWN 224, 0, implicit-def dead $r1, implicit $r1
-; 64BIT-DAG: $x3 = LI8 1
-; 64BIT-DAG: $x4 = LI8 2
-; 64BIT-DAG: $x5 = LI8 3
-; 64BIT-DAG: $x6 = LI8 4
-; 64BIT-DAG: $x7 = LI8 5
-; 64BIT-DAG: $x8 = LI8 6
-; 64BIT-DAG: $x9 = LI8 7
-; 64BIT-DAG: $x10 = LI8 8
-; 64BIT-DAG: STD killed renamable $x[[REG1:[0-9]+]], 112, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG2:[0-9]+]], 120, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG3:[0-9]+]], 128, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG4:[0-9]+]], 136, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG5:[0-9]+]], 144, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG6:[0-9]+]], 152, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG7:[0-9]+]], 160, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG8:[0-9]+]], 168, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG9:[0-9]+]], 176, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG10:[0-9]+]], 184, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG12:[0-9]+]], 192, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG13:[0-9]+]], 200, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG14:[0-9]+]], 208, $x1 :: (store (s64))
-; 64BIT-DAG: STD killed renamable $x[[REG15:[0-9]+]], 216, $x1 :: (store (s64))
-; 64BIT-DAG: BL8_NOP <mcsymbol .mix_floats>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $f1, implicit $f2, implicit $f3, implicit $f4, implicit $f5, implicit $f6, implicit $f7, implicit $f8, implicit $f9, implicit $f10, implicit $f11, implicit $f12, implicit $f13, implicit $x2, implicit-def $r1, implicit-def dead $x3
-; 64BIT-NEXT: ADJCALLSTACKUP 224, 0, implicit-def dead $r1, implicit $r1
-
-; CHEKASM-LABEL: .mix_floats_caller:
-
-; ASM32PWR4: mflr 0
-; ASM32PWR4-NEXT: stwu 1, -176(1)
-; ASM32PWR4-DAG: stw 0, 184(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 56(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 60(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 64(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 68(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 72(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 76(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 80(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 84(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 88(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 92(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 96(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 100(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 104(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 108(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 112(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 116(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 120(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 124(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 128(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 132(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 136(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 140(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 144(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 148(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 152(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 156(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 160(1)
-; ASM32PWR4-DAG: stw [[REG:[0-9]+]], 164(1)
-; ASM32PWR4: bl .mix_floats
-
-; ASM64PWR4: mflr 0
-; ASM64PWR4-NEXT: stdu 1, -240(1)
-; ASM64PWR4-DAG: std 0, 256(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 112(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 120(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 128(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 136(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 144(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 152(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 160(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 168(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 176(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 184(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 192(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 200(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 208(1)
-; ASM64PWR4-DAG: std [[REG:[0-9]+]], 216(1)
-; ASM64PWR4: bl .mix_floats
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