[llvm] [RISCV][GISel] Reverse the operands the buildStore created in legalizeVAStart. (PR #73989)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 30 13:40:15 PST 2023


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

<details>
<summary>Changes</summary>

We need to store the frame index to the location pointed to by the VASTART, not the other way around.

Apparently we're missing tests for G_VASTART so no tests changed.

---
Full diff: https://github.com/llvm/llvm-project/pull/73989.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 153bac34986ec1c..25620129b38e145 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -339,7 +339,7 @@ bool RISCVLegalizerInfo::legalizeVAStart(MachineInstr &MI,
   LLT AddrTy = MIRBuilder.getMRI()->getType(MI.getOperand(0).getReg());
   auto FINAddr = MIRBuilder.buildFrameIndex(AddrTy, FI);
   assert(MI.hasOneMemOperand());
-  MIRBuilder.buildStore(MI.getOperand(0).getReg(), FINAddr,
+  MIRBuilder.buildStore(FINAddr, MI.getOperand(0).getReg(),
                         *MI.memoperands()[0]);
   MI.eraseFromParent();
   return true;

``````````

</details>


https://github.com/llvm/llvm-project/pull/73989


More information about the llvm-commits mailing list