[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

[Valery Pykhtin via llvm-commits]

================
@@ -102,20 +102,56 @@ bool GCNRegPressure::less(const GCNSubtarget &ST,
     std::min(MaxOccupancy,
              ST.getOccupancyWithNumVGPRs(O.getVGPRNum(ST.hasGFX90AInsts())));
 
+  unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF);
+  unsigned MaxSGPRs = ST.getMaxNumSGPRs(MF);
+
+  bool ExcessVGPR = getVGPRNum(false) > MaxVGPRs || getAGPRNum() > MaxVGPRs;
+  bool ExcessSGPR = getSGPRNum() > MaxSGPRs;
+  bool OtherExcessVGPR =
+      O.getVGPRNum(false) > MaxVGPRs || O.getAGPRNum() > MaxVGPRs;
----------------
vpykhtin wrote:

Should _getVGPRNum_ has _ST.hasGFX90AInsts()_ here?

https://github.com/llvm/llvm-project/pull/71882