[llvm] [RISCV] Support Global Dynamic TLSDESC in the RISC-V backend (PR #66915)
Paul Kirth via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 29 15:11:30 PST 2023
ilovepi wrote:
I don't think they are required to be contiguous, based on https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tls-descriptors .
specifically it mentions
```
- Instructions outside the sequence that do not clobber the registers used within the sequence may be inserted in-between the instructions of the sequence (known as instruction scheduling).
- Instructions in the sequence with no data dependency may be reordered. In the preceding example, the only instructions that can be reordered are lw and addi.
```
The relaxations listed here https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tls-descriptors--initial-exec-relaxation and here https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tls-descriptors--local-exec-relaxation don't seem to require them either.
My understanding of the discussion on the psABI thread is that the relocations should allow the linker to identify the instructions within the sequence, and it should have enough freedom given the number of instructions to relax it in all cases. I don thin it would make relaxation far simpler if it was required to be a contiguous sequence.
https://github.com/llvm/llvm-project/pull/66915
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