[llvm] [RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (PR #73721)
Paul Kirth via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 29 10:14:34 PST 2023
================
@@ -101,7 +101,8 @@ class MCAsmBackend {
/// Hook to check if a relocation is needed for some target specific reason.
virtual bool shouldForceRelocation(const MCAssembler &Asm,
const MCFixup &Fixup,
- const MCValue &Target) {
+ const MCValue &Target,
+ const MCSubtargetInfo *STI) {
----------------
ilovepi wrote:
Doesn't the STI argument shadow the class members of derived classes? For example https://github.com/llvm/llvm-project/blob/859338a695169d2804d6999f44e1e94bedf6ddd7/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h#L25? Looking at the RISCV case where `STI.hasFeature(RISCV::FeatureRelax)` changes to `STI->hasFeature(RISCV::FeatureRelax)` I think it would easy to make a mistake an select the wrong one ...
I don't see an easy way to handle that aside from renaming either the parameter or class member.
https://github.com/llvm/llvm-project/pull/73721
More information about the llvm-commits
mailing list