[llvm] 9535e01 - [AMDGPU] Fix -Wc++98-compat-extra-semi after c1511a65d5c09f7cff15feba91ce9bda23d74b6e

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2023-11-28T21:45:09-08:00
New Revision: 9535e011c7b25ece5e51c0b9e0f2c43a2912a417

URL: https://github.com/llvm/llvm-project/commit/9535e011c7b25ece5e51c0b9e0f2c43a2912a417
DIFF: https://github.com/llvm/llvm-project/commit/9535e011c7b25ece5e51c0b9e0f2c43a2912a417.diff

LOG: [AMDGPU] Fix -Wc++98-compat-extra-semi after c1511a65d5c09f7cff15feba91ce9bda23d74b6e

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index fa91dc409317638..d24c7da964ce850 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -4503,11 +4503,11 @@ bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,
 }
 
 // Return whether the operation has NoUnsignedWrap property.
-bool isNoUnsignedWrap(MachineInstr *Addr) {
+static bool isNoUnsignedWrap(MachineInstr *Addr) {
   return Addr->getOpcode() == TargetOpcode::G_OR ||
          (Addr->getOpcode() == TargetOpcode::G_PTR_ADD &&
           Addr->getFlag(MachineInstr::NoUWrap));
-};
+}
 
 // Check that the base address of flat scratch load/store in the form of `base +
 // offset` is legal to be put in SGPR/VGPR (i.e. unsigned per hardware