[llvm] [RISCV] Support Global Dynamic TLSDESC in the RISC-V backend (PR #66915)

[Paul Kirth via llvm-commits]

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@@ -3107,6 +3136,41 @@ void RISCVAsmParser::emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc,
                     RISCV::ADDI, IDLoc, Out);
 }
 
+void RISCVAsmParser::emitLoadTLSDescAddress(MCInst &Inst, SMLoc IDLoc,
+                                            MCStreamer &Out) {
+  // The load TLS GD address pseudo-instruction "la.tlsdesc" is used in
+  // global-dynamic TLS model addressing of global symbols:
+  //   la.tlsdesc rdest, symbol
+  // expands to
+  //   TmpLabel: AUIPC rdest, %tlsdesc_hi(symbol)
+  //             ADDI rdest, rdest, %pcrel_lo(TmpLabel)
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ilovepi wrote:

Actually now that you’ve mentioned that bug in the documentation I’m questioning whether using the pseudo instruction is the correct approach. I followed the example for the existing TLS implementations, but those are also mentioned in the psABI and I think this may have been my own invention when I was first learning my way around the backend (and still am). To work correctly I think the pseudo would either need another register or I guess assemblers would need to scavenge one.  Either way I don’t think that is quite right. Well … unless there is a way to make a pseudo (or something like) it completely internal, which I’m not aware of. 

In that case, I guess I would need to translate the pseudo expansion into SelectionDag code instead. 


https://github.com/llvm/llvm-project/pull/66915