[llvm] [RISCV] Move performCombineVMergeAndVOps into RISCVFoldMasks (PR #71764)
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Tue Nov 28 03:21:12 PST 2023
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git-clang-format --diff c66c15a76dc7b021c29479a54aa1785928e9d1bf dc1739a88df0f98fbcaf36ee2e66eba872e04863 -- llvm/lib/Target/RISCV/RISCVFoldMasks.cpp llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVFoldMasks.cpp b/llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
index 4acd641fe6..9c698bc344 100644
--- a/llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
@@ -375,7 +375,7 @@ bool RISCVFoldMasks::convertVMergeToVMv(MachineInstr &MI, MachineInstr *V0Def) {
Register FalseReg = MI.getOperand(2).getReg();
// Check merge == false (or merge == undef)
if (MergeReg != RISCV::NoRegister && TRI->lookThruCopyLike(MergeReg, MRI) !=
- TRI->lookThruCopyLike(FalseReg, MRI))
+ TRI->lookThruCopyLike(FalseReg, MRI))
return false;
assert(MI.getOperand(4).isReg() && MI.getOperand(4).getReg() == RISCV::V0);
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https://github.com/llvm/llvm-project/pull/71764
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