[llvm] [RISCV][GISEL] Legalize G_VAARG through expansion. (PR #73065)

[via llvm-commits]

github-actions[bot] wrote:

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git-clang-format --diff 331111277a3e80aedd1a6877524feadfbcb41a88 4078504dba15d0edd80fbad168b1718f1ae58f92 -- llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 542dba6b9f..c6f0ade764 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -7892,8 +7892,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerVAArg(MachineInstr &MI) {
     Register AlignAmt =
         MIRBuilder.buildConstant(PtrTyAsScalarTy, MA->value() - 1).getReg(0);
     auto AddDst = MIRBuilder.buildPtrAdd(PtrTy, HeadOfList, AlignAmt);
-    auto AndDst =
-        MIRBuilder.buildMaskLowPtrBits(PtrTy, AddDst, Log2(*MA));
+    auto AndDst = MIRBuilder.buildMaskLowPtrBits(PtrTy, AddDst, Log2(*MA));
     VAList = AndDst.getReg(0);
   }
 

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https://github.com/llvm/llvm-project/pull/73065