[llvm] [AMDGPU] Fix folding of v2i16/v2f16 splat imms (PR #72709)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

And then this only happens with BF16, for I16 and F16 we do not emit literal thinking it is an inline constant even with the existing code. And the inline constant handling for BF16 seems to be completely broken because we think of it as of either I16 or F16 and use those values, while the same manual says:
```
  7.5.1. Inline Constants with Packed Math
  ...
  BF16 uses 32-bit float constants and then the BF16 operand selects the upper 16 bits of the FP32 constant
  (matches the definition of BF16).
```
So this maybe have to be replaced with special operand types for BF16/2xBF16 accepting fp32 bit inline constants in packed form and not accepting literals in any form. For instance this 0x10001 may not be what we think it is even if the literal is legal here. I have found this description of the inline constants handling in this case, but I do not see a description of what happens with actual literals either in packed or scalar form.

https://github.com/llvm/llvm-project/pull/72709