[llvm] [X86][MC] Update condition about ExplicitVEXPrefix (PR #73312)

[via llvm-commits]

https://github.com/XinWang10 updated https://github.com/llvm/llvm-project/pull/73312

>From 19be1df8e95df487b5ce38d12a99714018ab2930 Mon Sep 17 00:00:00 2001
From: XinWang10 <xin10.wang at intel.com>
Date: Fri, 24 Nov 2023 18:16:46 +0800
Subject: [PATCH 1/2] Update condition about ExplicitVEXPrefix refactor in PR
 72835

---
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp            | 3 ++-
 llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index f6fe7c9be7e4f46..6c6ef95f92754d2 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3973,7 +3973,8 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
       (MCID.TSFlags & X86II::EncodingMask) != X86II::VEX)
     return Match_Unsupported;
 
-  if (MCID.TSFlags & X86II::ExplicitVEXPrefix &&
+  if ((MCID.TSFlags & X86II::ExplicitOpPrefixMask) ==
+          X86II::ExplicitVEXPrefix &&
       (ForcedVEXEncoding != VEXEncoding_VEX &&
        ForcedVEXEncoding != VEXEncoding_VEX2 &&
        ForcedVEXEncoding != VEXEncoding_VEX3))
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index 1db55851e8f766b..b140f932afb3594 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -370,7 +370,8 @@ void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O,
     O << "\trep\t";
 
   // These all require a pseudo prefix
-  if ((Flags & X86::IP_USE_VEX) || (TSFlags & X86II::ExplicitVEXPrefix))
+  if ((Flags & X86::IP_USE_VEX) ||
+      ((TSFlags & X86II::ExplicitOpPrefixMask) == X86II::ExplicitVEXPrefix))
     O << "\t{vex}";
   else if (Flags & X86::IP_USE_VEX2)
     O << "\t{vex2}";

>From ff7ab20f24dadf5a2aa21d838371a55837bfe0e1 Mon Sep 17 00:00:00 2001
From: XinWang10 <xin10.wang at intel.com>
Date: Mon, 27 Nov 2023 09:37:26 +0800
Subject: [PATCH 2/2] remove redundant brace

---
 llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index b140f932afb3594..aadbc3845b79c18 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -371,7 +371,7 @@ void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O,
 
   // These all require a pseudo prefix
   if ((Flags & X86::IP_USE_VEX) ||
-      ((TSFlags & X86II::ExplicitOpPrefixMask) == X86II::ExplicitVEXPrefix))
+      (TSFlags & X86II::ExplicitOpPrefixMask) == X86II::ExplicitVEXPrefix)
     O << "\t{vex}";
   else if (Flags & X86::IP_USE_VEX2)
     O << "\t{vex2}";